VirtualBox

Changeset 44645 in vbox for trunk/src/VBox/Devices/Audio


Ignore:
Timestamp:
Feb 11, 2013 8:04:41 PM (12 years ago)
Author:
vboxsync
svn:sync-xref-src-repo-rev:
83733
Message:

DevIchIntelHDA.cpp: uint64_t constants are not ULL suffixed but wrapped in UINT64_C(). Fixed some doxygen todos.

File:
1 edited

Legend:

Unmodified
Added
Removed
  • trunk/src/VBox/Devices/Audio/DevIchIntelHDA.cpp

    r44644 r44645  
    587587    { 0x00050, 0x00004, 0xFFFFFF80, 0xFFFFFF80, hdaRegReadU32          , hdaRegWriteBase         , "RIRBLBASE" , "RIRB Lower Base Address" },
    588588    { 0x00054, 0x00004, 0xFFFFFFFF, 0xFFFFFFFF, hdaRegReadU32          , hdaRegWriteBase         , "RIRBUBASE" , "RIRB Upper Base Address" },
    589     { 0x00058, 0x00002, 0x000000FF, 0x00008000, hdaRegReadU8,            hdaRegWriteRIRBWP       , "RIRBWP"    , "RIRB Write Pointer" },
     589    { 0x00058, 0x00002, 0x000000FF, 0x00008000, hdaRegReadU8           , hdaRegWriteRIRBWP       , "RIRBWP"    , "RIRB Write Pointer" },
    590590    { 0x0005A, 0x00002, 0x000000FF, 0x000000FF, hdaRegReadU16          , hdaRegWriteU16          , "RINTCNT"   , "Response Interrupt Count" },
    591591    { 0x0005C, 0x00001, 0x00000007, 0x00000007, hdaRegReadU8           , hdaRegWriteU8           , "RIRBCTL"   , "RIRB Control" },
     
    796796    {
    797797#ifdef DEBUG_vvl
    798             Assert(   idxHigh >= 0
    799                    && idxLow  >= 0);
     798        Assert(   idxHigh >= 0
     799               && idxLow  >= 0);
    800800#endif
    801             if (   idxHigh < idxLow
    802                 || idxHigh < 0)
    803                 break;
    804             int idxMiddle = idxLow + (idxHigh - idxLow) / 2;
    805             if (offReg < g_aIchIntelHDRegMap[idxMiddle].offset)
    806                 idxHigh = idxMiddle - 1;
    807             else if (offReg >= g_aIchIntelHDRegMap[idxMiddle].offset + g_aIchIntelHDRegMap[idxMiddle].size)
    808                 idxLow  = idxMiddle + 1;
    809             else if (   offReg >= g_aIchIntelHDRegMap[idxMiddle].offset
    810                      && offReg < g_aIchIntelHDRegMap[idxMiddle].offset + g_aIchIntelHDRegMap[idxMiddle].size)
    811                 return idxMiddle;
     801        if (   idxHigh < idxLow
     802            || idxHigh < 0)
     803            break;
     804        int idxMiddle = idxLow + (idxHigh - idxLow) / 2;
     805        if (offReg < g_aIchIntelHDRegMap[idxMiddle].offset)
     806            idxHigh = idxMiddle - 1;
     807        else if (offReg >= g_aIchIntelHDRegMap[idxMiddle].offset + g_aIchIntelHDRegMap[idxMiddle].size)
     808            idxLow  = idxMiddle + 1;
     809        else if (   offReg >= g_aIchIntelHDRegMap[idxMiddle].offset
     810                 && offReg < g_aIchIntelHDRegMap[idxMiddle].offset + g_aIchIntelHDRegMap[idxMiddle].size)
     811            return idxMiddle;
    812812    }
    813813    return -1;
     
    13621362{
    13631363#ifdef VBOX_WITH_HDA_CODEC_EMU
    1364     /* @todo a bit more investigation is required here. */
     1364    /** @todo a bit more investigation is required here. */
    13651365    int rc = 0;
    13661366    audsettings_t as;
     
    14771477    {
    14781478        case ICH6_HDA_REG_CORBLBASE:
    1479             pThis->u64CORBBase &= 0xFFFFFFFF00000000ULL;
     1479            pThis->u64CORBBase &= UINT64_C(0xFFFFFFFF00000000);
    14801480            pThis->u64CORBBase |= pThis->au32Regs[iReg];
    14811481            break;
    14821482        case ICH6_HDA_REG_CORBUBASE:
    1483             pThis->u64CORBBase &= 0x00000000FFFFFFFFULL;
     1483            pThis->u64CORBBase &= UINT64_C(0x00000000FFFFFFFF);
    14841484            pThis->u64CORBBase |= ((uint64_t)pThis->au32Regs[iReg] << 32);
    14851485            break;
    14861486        case ICH6_HDA_REG_RIRLBASE:
    1487             pThis->u64RIRBBase &= 0xFFFFFFFF00000000ULL;
     1487            pThis->u64RIRBBase &= UINT64_C(0xFFFFFFFF00000000);
    14881488            pThis->u64RIRBBase |= pThis->au32Regs[iReg];
    14891489            break;
    14901490        case ICH6_HDA_REG_RIRUBASE:
    1491             pThis->u64RIRBBase &= 0x00000000FFFFFFFFULL;
     1491            pThis->u64RIRBBase &= UINT64_C(0x00000000FFFFFFFF);
    14921492            pThis->u64RIRBBase |= ((uint64_t)pThis->au32Regs[iReg] << 32);
    14931493            break;
    14941494        case ICH6_HDA_REG_DPLBASE:
    1495             /* @todo: first bit has special meaning */
    1496             pThis->u64DPBase &= 0xFFFFFFFF00000000ULL;
     1495            /** @todo: first bit has special meaning */
     1496            pThis->u64DPBase &= UINT64_C(0xFFFFFFFF00000000);
    14971497            pThis->u64DPBase |= pThis->au32Regs[iReg];
    14981498            break;
    14991499        case ICH6_HDA_REG_DPUBASE:
    1500             pThis->u64DPBase &= 0x00000000FFFFFFFFULL;
     1500            pThis->u64DPBase &= UINT64_C(0x00000000FFFFFFFF);
    15011501            pThis->u64DPBase |= ((uint64_t)pThis->au32Regs[iReg] << 32);
    15021502            break;
     
    16981698             && pBdle->fBdleCviIoc)
    16991699        {
    1700             /*
     1700            /**
    17011701             * @todo - more carefully investigate BCIS flag.
    17021702             * Speech synthesis works fine on Mac Guest if this bit isn't set
     
    24322432                                N_ ("Invalid configuration for the Intel HDA device"));
    24332433
    2434     // ** @todo r=michaln: This device may need R0/RC enabling, especially if guests
    2435     // poll some register(pThis).
     2434    /// @todo r=michaln: This device may need R0/RC enabling, especially if guests
     2435    /// poll some register(pThis).
    24362436
    24372437    /*
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