Changeset 44668 in vbox for trunk/src/VBox/Devices
- Timestamp:
- Feb 13, 2013 2:53:36 PM (12 years ago)
- Location:
- trunk/src/VBox/Devices/Audio
- Files:
-
- 3 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/Devices/Audio/DevCodec.cpp
r44667 r44668 38 38 } 39 39 #include "DevCodec.h" 40 41 42 /******************************************************************************* 43 * Defined Constants And Macros * 44 *******************************************************************************/ 45 /* PRM 5.3.1 */ 46 #define CODEC_CAD_MASK 0xF0000000 47 #define CODEC_CAD_SHIFT 28 48 #define CODEC_DIRECT_MASK RT_BIT(27) 49 #define CODEC_NID_MASK 0x07F00000 50 #define CODEC_NID_SHIFT 20 51 #define CODEC_VERBDATA_MASK 0x000FFFFF 52 #define CODEC_VERB_4BIT_CMD 0x000FFFF0 53 #define CODEC_VERB_4BIT_DATA 0x0000000F 54 #define CODEC_VERB_8BIT_CMD 0x000FFF00 55 #define CODEC_VERB_8BIT_DATA 0x000000FF 56 #define CODEC_VERB_16BIT_CMD 0x000F0000 57 #define CODEC_VERB_16BIT_DATA 0x0000FFFF 58 59 #define CODEC_CAD(cmd) ((cmd) & CODEC_CAD_MASK) 60 #define CODEC_DIRECT(cmd) ((cmd) & CODEC_DIRECT_MASK) 61 #define CODEC_NID(cmd) ((((cmd) & CODEC_NID_MASK)) >> CODEC_NID_SHIFT) 62 #define CODEC_VERBDATA(cmd) ((cmd) & CODEC_VERBDATA_MASK) 63 #define CODEC_VERB_CMD(cmd, mask, x) (((cmd) & (mask)) >> (x)) 64 #define CODEC_VERB_CMD4(cmd) (CODEC_VERB_CMD((cmd), CODEC_VERB_4BIT_CMD, 4)) 65 #define CODEC_VERB_CMD8(cmd) (CODEC_VERB_CMD((cmd), CODEC_VERB_8BIT_CMD, 8)) 66 #define CODEC_VERB_CMD16(cmd) (CODEC_VERB_CMD((cmd), CODEC_VERB_16BIT_CMD, 16)) 67 #define CODEC_VERB_PAYLOAD4(cmd) ((cmd) & CODEC_VERB_4BIT_DATA) 68 #define CODEC_VERB_PAYLOAD8(cmd) ((cmd) & CODEC_VERB_8BIT_DATA) 69 #define CODEC_VERB_PAYLOAD16(cmd) ((cmd) & CODEC_VERB_16BIT_DATA) 70 71 #define CODEC_VERB_GET_AMP_DIRECTION RT_BIT(15) 72 #define CODEC_VERB_GET_AMP_SIDE RT_BIT(13) 73 #define CODEC_VERB_GET_AMP_INDEX 0x7 74 75 /* HDA spec 7.3.3.7 NoteA */ 76 #define CODEC_GET_AMP_DIRECTION(cmd) (((cmd) & CODEC_VERB_GET_AMP_DIRECTION) >> 15) 77 #define CODEC_GET_AMP_SIDE(cmd) (((cmd) & CODEC_VERB_GET_AMP_SIDE) >> 13) 78 #define CODEC_GET_AMP_INDEX(cmd) (CODEC_GET_AMP_DIRECTION(cmd) ? 0 : ((cmd) & CODEC_VERB_GET_AMP_INDEX)) 79 80 /* HDA spec 7.3.3.7 NoteC */ 81 #define CODEC_VERB_SET_AMP_OUT_DIRECTION RT_BIT(15) 82 #define CODEC_VERB_SET_AMP_IN_DIRECTION RT_BIT(14) 83 #define CODEC_VERB_SET_AMP_LEFT_SIDE RT_BIT(13) 84 #define CODEC_VERB_SET_AMP_RIGHT_SIDE RT_BIT(12) 85 #define CODEC_VERB_SET_AMP_INDEX (0x7 << 8) 86 87 #define CODEC_SET_AMP_IS_OUT_DIRECTION(cmd) (((cmd) & CODEC_VERB_SET_AMP_OUT_DIRECTION) != 0) 88 #define CODEC_SET_AMP_IS_IN_DIRECTION(cmd) (((cmd) & CODEC_VERB_SET_AMP_IN_DIRECTION) != 0) 89 #define CODEC_SET_AMP_IS_LEFT_SIDE(cmd) (((cmd) & CODEC_VERB_SET_AMP_LEFT_SIDE) != 0) 90 #define CODEC_SET_AMP_IS_RIGHT_SIDE(cmd) (((cmd) & CODEC_VERB_SET_AMP_RIGHT_SIDE) != 0) 91 #define CODEC_SET_AMP_INDEX(cmd) (((cmd) & CODEC_VERB_SET_AMP_INDEX) >> 7) 92 93 /* HDA spec 7.3.3.1 defines layout of configuration registers/verbs (0xF00) */ 94 /* VendorID (7.3.4.1) */ 95 #define CODEC_MAKE_F00_00(vendorID, deviceID) (((vendorID) << 16) | (deviceID)) 96 #define CODEC_F00_00_VENDORID(f00_00) (((f00_00) >> 16) & 0xFFFF) 97 #define CODEC_F00_00_DEVICEID(f00_00) ((f00_00) & 0xFFFF) 98 /* RevisionID (7.3.4.2)*/ 99 #define CODEC_MAKE_F00_02(MajRev, MinRev, RevisionID, SteppingID) (((MajRev) << 20)|((MinRev) << 16)|((RevisionID) << 8)|(SteppingID)) 100 /* Subordinate node count (7.3.4.3)*/ 101 #define CODEC_MAKE_F00_04(startNodeNumber, totalNodeNumber) ((((startNodeNumber) & 0xFF) << 16)|((totalNodeNumber) & 0xFF)) 102 #define CODEC_F00_04_TO_START_NODE_NUMBER(f00_04) (((f00_04) >> 16) & 0xFF) 103 #define CODEC_F00_04_TO_NODE_COUNT(f00_04) ((f00_04) & 0xFF) 104 /* 105 * Function Group Type (7.3.4.4) 106 * 0 & [0x3-0x7f] are reserved types 107 * [0x80 - 0xff] are vendor defined function groups 108 */ 109 #define CODEC_MAKE_F00_05(UnSol, NodeType) (((UnSol) << 8)|(NodeType)) 110 #define CODEC_F00_05_UNSOL RT_BIT(8) 111 #define CODEC_F00_05_AFG (0x1) 112 #define CODEC_F00_05_MFG (0x2) 113 #define CODEC_F00_05_IS_UNSOL(f00_05) RT_BOOL((f00_05) & RT_BIT(8)) 114 #define CODEC_F00_05_GROUP(f00_05) ((f00_05) & 0xff) 115 /* Audio Function Group capabilities (7.3.4.5) */ 116 #define CODEC_MAKE_F00_08(BeepGen, InputDelay, OutputDelay) ((((BeepGen) & 0x1) << 16)| (((InputDelay) & 0xF) << 8) | ((OutputDelay) & 0xF)) 117 #define CODEC_F00_08_BEEP_GEN(f00_08) ((f00_08) & RT_BIT(16) 118 119 /* Widget Capabilities (7.3.4.6) */ 120 #define CODEC_MAKE_F00_09(type, delay, chanel_count) \ 121 ( (((type) & 0xF) << 20) \ 122 | (((delay) & 0xF) << 16) \ 123 | (((chanel_count) & 0xF) << 13)) 124 /* note: types 0x8-0xe are reserved */ 125 #define CODEC_F00_09_TYPE_AUDIO_OUTPUT (0x0) 126 #define CODEC_F00_09_TYPE_AUDIO_INPUT (0x1) 127 #define CODEC_F00_09_TYPE_AUDIO_MIXER (0x2) 128 #define CODEC_F00_09_TYPE_AUDIO_SELECTOR (0x3) 129 #define CODEC_F00_09_TYPE_PIN_COMPLEX (0x4) 130 #define CODEC_F00_09_TYPE_POWER_WIDGET (0x5) 131 #define CODEC_F00_09_TYPE_VOLUME_KNOB (0x6) 132 #define CODEC_F00_09_TYPE_BEEP_GEN (0x7) 133 #define CODEC_F00_09_TYPE_VENDOR_DEFINED (0xF) 134 135 #define CODEC_F00_09_CAP_CP RT_BIT(12) 136 #define CODEC_F00_09_CAP_L_R_SWAP RT_BIT(11) 137 #define CODEC_F00_09_CAP_POWER_CTRL RT_BIT(10) 138 #define CODEC_F00_09_CAP_DIGITAL RT_BIT(9) 139 #define CODEC_F00_09_CAP_CONNECTION_LIST RT_BIT(8) 140 #define CODEC_F00_09_CAP_UNSOL RT_BIT(7) 141 #define CODEC_F00_09_CAP_PROC_WIDGET RT_BIT(6) 142 #define CODEC_F00_09_CAP_STRIPE RT_BIT(5) 143 #define CODEC_F00_09_CAP_FMT_OVERRIDE RT_BIT(4) 144 #define CODEC_F00_09_CAP_AMP_FMT_OVERRIDE RT_BIT(3) 145 #define CODEC_F00_09_CAP_OUT_AMP_PRESENT RT_BIT(2) 146 #define CODEC_F00_09_CAP_IN_AMP_PRESENT RT_BIT(1) 147 #define CODEC_F00_09_CAP_LSB RT_BIT(0) 148 149 #define CODEC_F00_09_TYPE(f00_09) (((f00_09) >> 20) & 0xF) 150 151 #define CODEC_F00_09_IS_CAP_CP(f00_09) RT_BOOL((f00_09) & RT_BIT(12)) 152 #define CODEC_F00_09_IS_CAP_L_R_SWAP(f00_09) RT_BOOL((f00_09) & RT_BIT(11)) 153 #define CODEC_F00_09_IS_CAP_POWER_CTRL(f00_09) RT_BOOL((f00_09) & RT_BIT(10)) 154 #define CODEC_F00_09_IS_CAP_DIGITAL(f00_09) RT_BOOL((f00_09) & RT_BIT(9)) 155 #define CODEC_F00_09_IS_CAP_CONNECTION_LIST(f00_09) RT_BOOL((f00_09) & RT_BIT(8)) 156 #define CODEC_F00_09_IS_CAP_UNSOL(f00_09) RT_BOOL((f00_09) & RT_BIT(7)) 157 #define CODEC_F00_09_IS_CAP_PROC_WIDGET(f00_09) RT_BOOL((f00_09) & RT_BIT(6)) 158 #define CODEC_F00_09_IS_CAP_STRIPE(f00_09) RT_BOOL((f00_09) & RT_BIT(5)) 159 #define CODEC_F00_09_IS_CAP_FMT_OVERRIDE(f00_09) RT_BOOL((f00_09) & RT_BIT(4)) 160 #define CODEC_F00_09_IS_CAP_AMP_OVERRIDE(f00_09) RT_BOOL((f00_09) & RT_BIT(3)) 161 #define CODEC_F00_09_IS_CAP_OUT_AMP_PRESENT(f00_09) RT_BOOL((f00_09) & RT_BIT(2)) 162 #define CODEC_F00_09_IS_CAP_IN_AMP_PRESENT(f00_09) RT_BOOL((f00_09) & RT_BIT(1)) 163 #define CODEC_F00_09_IS_CAP_LSB(f00_09) RT_BOOL((f00_09) & RT_BIT(0)) 164 165 /* Supported PCM size, rates (7.3.4.7) */ 166 #define CODEC_F00_0A_32_BIT RT_BIT(19) 167 #define CODEC_F00_0A_24_BIT RT_BIT(18) 168 #define CODEC_F00_0A_16_BIT RT_BIT(17) 169 #define CODEC_F00_0A_8_BIT RT_BIT(16) 170 171 #define CODEC_F00_0A_48KHZ_MULT_8X RT_BIT(11) 172 #define CODEC_F00_0A_48KHZ_MULT_4X RT_BIT(10) 173 #define CODEC_F00_0A_44_1KHZ_MULT_4X RT_BIT(9) 174 #define CODEC_F00_0A_48KHZ_MULT_2X RT_BIT(8) 175 #define CODEC_F00_0A_44_1KHZ_MULT_2X RT_BIT(7) 176 #define CODEC_F00_0A_48KHZ RT_BIT(6) 177 #define CODEC_F00_0A_44_1KHZ RT_BIT(5) 178 /* 2/3 * 48kHz */ 179 #define CODEC_F00_0A_48KHZ_2_3X RT_BIT(4) 180 /* 1/2 * 44.1kHz */ 181 #define CODEC_F00_0A_44_1KHZ_1_2X RT_BIT(3) 182 /* 1/3 * 48kHz */ 183 #define CODEC_F00_0A_48KHZ_1_3X RT_BIT(2) 184 /* 1/4 * 44.1kHz */ 185 #define CODEC_F00_0A_44_1KHZ_1_4X RT_BIT(1) 186 /* 1/6 * 48kHz */ 187 #define CODEC_F00_0A_48KHZ_1_6X RT_BIT(0) 188 189 /* Supported streams formats (7.3.4.8) */ 190 #define CODEC_F00_0B_AC3 RT_BIT(2) 191 #define CODEC_F00_0B_FLOAT32 RT_BIT(1) 192 #define CODEC_F00_0B_PCM RT_BIT(0) 193 194 /* Pin Capabilities (7.3.4.9)*/ 195 #define CODEC_MAKE_F00_0C(vref_ctrl) (((vref_ctrl) & 0xFF) << 8) 196 #define CODEC_F00_0C_CAP_HBR RT_BIT(27) 197 #define CODEC_F00_0C_CAP_DP RT_BIT(24) 198 #define CODEC_F00_0C_CAP_EAPD RT_BIT(16) 199 #define CODEC_F00_0C_CAP_HDMI RT_BIT(7) 200 #define CODEC_F00_0C_CAP_BALANCED_IO RT_BIT(6) 201 #define CODEC_F00_0C_CAP_INPUT RT_BIT(5) 202 #define CODEC_F00_0C_CAP_OUTPUT RT_BIT(4) 203 #define CODEC_F00_0C_CAP_HP RT_BIT(3) 204 #define CODEC_F00_0C_CAP_PRESENSE_DETECT RT_BIT(2) 205 #define CODEC_F00_0C_CAP_TRIGGER_REQUIRED RT_BIT(1) 206 #define CODEC_F00_0C_CAP_IMPENDANCE_SENSE RT_BIT(0) 207 208 #define CODEC_F00_0C_IS_CAP_HBR(f00_0c) ((f00_0c) & RT_BIT(27)) 209 #define CODEC_F00_0C_IS_CAP_DP(f00_0c) ((f00_0c) & RT_BIT(24)) 210 #define CODEC_F00_0C_IS_CAP_EAPD(f00_0c) ((f00_0c) & RT_BIT(16)) 211 #define CODEC_F00_0C_IS_CAP_HDMI(f00_0c) ((f00_0c) & RT_BIT(7)) 212 #define CODEC_F00_0C_IS_CAP_BALANCED_IO(f00_0c) ((f00_0c) & RT_BIT(6)) 213 #define CODEC_F00_0C_IS_CAP_INPUT(f00_0c) ((f00_0c) & RT_BIT(5)) 214 #define CODEC_F00_0C_IS_CAP_OUTPUT(f00_0c) ((f00_0c) & RT_BIT(4)) 215 #define CODEC_F00_0C_IS_CAP_HP(f00_0c) ((f00_0c) & RT_BIT(3)) 216 #define CODEC_F00_0C_IS_CAP_PRESENSE_DETECT(f00_0c) ((f00_0c) & RT_BIT(2)) 217 #define CODEC_F00_0C_IS_CAP_TRIGGER_REQUIRED(f00_0c) ((f00_0c) & RT_BIT(1)) 218 #define CODEC_F00_0C_IS_CAP_IMPENDANCE_SENSE(f00_0c) ((f00_0c) & RT_BIT(0)) 219 220 /* Input Amplifier capabilities (7.3.4.10) */ 221 #define CODEC_MAKE_F00_0D(mute_cap, step_size, num_steps, offset) \ 222 ( (((mute_cap) & 0x1) << 31) \ 223 | (((step_size) & 0xFF) << 16) \ 224 | (((num_steps) & 0xFF) << 8) \ 225 | ((offset) & 0xFF)) 226 227 /* Output Amplifier capabilities (7.3.4.10) */ 228 #define CODEC_MAKE_F00_12 CODEC_MAKE_F00_0D 229 230 /* Connection list lenght (7.3.4.11) */ 231 #define CODEC_MAKE_F00_0E(long_form, length) \ 232 ( (((long_form) & 0x1) << 7) \ 233 | ((length) & 0x7F)) 234 #define CODEC_F00_0E_IS_LONG(f00_0e) RT_BOOL((f00_0e) & RT_BIT(7)) 235 #define CODEC_F00_0E_COUNT(f00_0e) ((f00_0e) & 0x7F) 236 /* Supported Power States (7.3.4.12) */ 237 #define CODEC_F00_0F_EPSS RT_BIT(31) 238 #define CODEC_F00_0F_CLKSTOP RT_BIT(30) 239 #define CODEC_F00_0F_S3D3 RT_BIT(29) 240 #define CODEC_F00_0F_D3COLD RT_BIT(4) 241 #define CODEC_F00_0F_D3 RT_BIT(3) 242 #define CODEC_F00_0F_D2 RT_BIT(2) 243 #define CODEC_F00_0F_D1 RT_BIT(1) 244 #define CODEC_F00_0F_D0 RT_BIT(0) 245 246 /* Processing capabilities 7.3.4.13 */ 247 #define CODEC_MAKE_F00_10(num, benign) ((((num) & 0xFF) << 8) | ((benign) & 0x1)) 248 #define CODEC_F00_10_NUM(f00_10) (((f00_10) & (0xFF << 8)) >> 8) 249 #define CODEC_F00_10_BENING(f00_10) ((f00_10) & 0x1) 250 251 /* CP/IO Count (7.3.4.14) */ 252 #define CODEC_MAKE_F00_11(wake, unsol, numgpi, numgpo, numgpio) \ 253 ( (((wake) & 0x1) << 31) \ 254 | (((unsol) & 0x1) << 30) \ 255 | (((numgpi) & 0xFF) << 16) \ 256 | (((numgpo) & 0xFF) << 8) \ 257 | ((numgpio) & 0xFF)) 258 259 /* Processing States (7.3.3.4) */ 260 #define CODEC_F03_OFF (0) 261 #define CODEC_F03_ON RT_BIT(0) 262 #define CODEC_F03_BENING RT_BIT(1) 263 /* Power States (7.3.3.10) */ 264 #define CODEC_MAKE_F05(reset, stopok, error, act, set) \ 265 ( (((reset) & 0x1) << 10) \ 266 | (((stopok) & 0x1) << 9) \ 267 | (((error) & 0x1) << 8) \ 268 | (((act) & 0x7) << 4) \ 269 | ((set) & 0x7)) 270 #define CODEC_F05_D3COLD (4) 271 #define CODEC_F05_D3 (3) 272 #define CODEC_F05_D2 (2) 273 #define CODEC_F05_D1 (1) 274 #define CODEC_F05_D0 (0) 275 276 #define CODEC_F05_IS_RESET(value) (((value) & RT_BIT(10)) != 0) 277 #define CODEC_F05_IS_STOPOK(value) (((value) & RT_BIT(9)) != 0) 278 #define CODEC_F05_IS_ERROR(value) (((value) & RT_BIT(8)) != 0) 279 #define CODEC_F05_ACT(value) (((value) & 0x7) >> 4) 280 #define CODEC_F05_SET(value) (((value) & 0x7)) 281 282 #define CODEC_F05_GE(p0, p1) ((p0) <= (p1)) 283 #define CODEC_F05_LE(p0, p1) ((p0) >= (p1)) 284 285 /* Pin Widged Control (7.3.3.13) */ 286 #define CODEC_F07_VREF_HIZ (0) 287 #define CODEC_F07_VREF_50 (0x1) 288 #define CODEC_F07_VREF_GROUND (0x2) 289 #define CODEC_F07_VREF_80 (0x4) 290 #define CODEC_F07_VREF_100 (0x5) 291 #define CODEC_F07_IN_ENABLE RT_BIT(5) 292 #define CODEC_F07_OUT_ENABLE RT_BIT(6) 293 #define CODEC_F07_OUT_H_ENABLE RT_BIT(7) 294 295 /* Unsolicited enabled (7.3.3.14) */ 296 #define CODEC_MAKE_F08(enable, tag) ((((enable) & 1) << 7) | ((tag) & 0x3F)) 297 298 /* Converter formats (7.3.3.8) and (3.7.1) */ 299 #define CODEC_MAKE_A(fNonPCM, f44_1BaseRate, mult, div, bits, chan) \ 300 ( (((fNonPCM) & 0x1) << 15) \ 301 | (((f44_1BaseRate) & 0x1) << 14) \ 302 | (((mult) & 0x7) << 11) \ 303 | (((div) & 0x7) << 8) \ 304 | (((bits) & 0x7) << 4) \ 305 | ((chan) & 0xF)) 306 307 #define CODEC_A_MULT_1X (0) 308 #define CODEC_A_MULT_2X (1) 309 #define CODEC_A_MULT_3X (2) 310 #define CODEC_A_MULT_4X (3) 311 312 #define CODEC_A_DIV_1X (0) 313 #define CODEC_A_DIV_2X (1) 314 #define CODEC_A_DIV_3X (2) 315 #define CODEC_A_DIV_4X (3) 316 #define CODEC_A_DIV_5X (4) 317 #define CODEC_A_DIV_6X (5) 318 #define CODEC_A_DIV_7X (6) 319 #define CODEC_A_DIV_8X (7) 320 321 #define CODEC_A_8_BIT (0) 322 #define CODEC_A_16_BIT (1) 323 #define CODEC_A_20_BIT (2) 324 #define CODEC_A_24_BIT (3) 325 #define CODEC_A_32_BIT (4) 326 327 /* Pin Sense (7.3.3.15) */ 328 #define CODEC_MAKE_F09_ANALOG(fPresent, impedance) \ 329 ( (((fPresent) & 0x1) << 31) \ 330 | (((impedance) & 0x7FFFFFFF))) 331 #define CODEC_F09_ANALOG_NA 0x7FFFFFFF 332 #define CODEC_MAKE_F09_DIGITAL(fPresent, fELDValid) \ 333 ( (((fPresent) & 0x1) << 31) \ 334 | (((fELDValid) & 0x1) << 30)) 335 336 #define CODEC_MAKE_F0C(lrswap, eapd, btl) ((((lrswap) & 1) << 2) | (((eapd) & 1) << 1) | ((btl) & 1)) 337 #define CODEC_FOC_IS_LRSWAP(f0c) RT_BOOL((f0c) & RT_BIT(2)) 338 #define CODEC_FOC_IS_EAPD(f0c) RT_BOOL((f0c) & RT_BIT(1)) 339 #define CODEC_FOC_IS_BTL(f0c) RT_BOOL((f0c) & RT_BIT(0)) 340 /* HDA spec 7.3.3.31 defines layout of configuration registers/verbs (0xF1C) */ 341 /* Configuration's port connection */ 342 #define CODEC_F1C_PORT_MASK (0x3) 343 #define CODEC_F1C_PORT_SHIFT (30) 344 345 #define CODEC_F1C_PORT_COMPLEX (0x0) 346 #define CODEC_F1C_PORT_NO_PHYS (0x1) 347 #define CODEC_F1C_PORT_FIXED (0x2) 348 #define CODEC_F1C_BOTH (0x3) 349 350 /* Configuration's location */ 351 #define CODEC_F1C_LOCATION_MASK (0x3F) 352 #define CODEC_F1C_LOCATION_SHIFT (24) 353 /* [4:5] bits of location region means chassis attachment */ 354 #define CODEC_F1C_LOCATION_PRIMARY_CHASSIS (0) 355 #define CODEC_F1C_LOCATION_INTERNAL RT_BIT(4) 356 #define CODEC_F1C_LOCATION_SECONDRARY_CHASSIS RT_BIT(5) 357 #define CODEC_F1C_LOCATION_OTHER (RT_BIT(5)) 358 359 /* [0:3] bits of location region means geometry location attachment */ 360 #define CODEC_F1C_LOCATION_NA (0) 361 #define CODEC_F1C_LOCATION_REAR (0x1) 362 #define CODEC_F1C_LOCATION_FRONT (0x2) 363 #define CODEC_F1C_LOCATION_LEFT (0x3) 364 #define CODEC_F1C_LOCATION_RIGTH (0x4) 365 #define CODEC_F1C_LOCATION_TOP (0x5) 366 #define CODEC_F1C_LOCATION_BOTTOM (0x6) 367 #define CODEC_F1C_LOCATION_SPECIAL_0 (0x7) 368 #define CODEC_F1C_LOCATION_SPECIAL_1 (0x8) 369 #define CODEC_F1C_LOCATION_SPECIAL_2 (0x9) 370 371 /* Configuration's devices */ 372 #define CODEC_F1C_DEVICE_MASK (0xF) 373 #define CODEC_F1C_DEVICE_SHIFT (20) 374 #define CODEC_F1C_DEVICE_LINE_OUT (0) 375 #define CODEC_F1C_DEVICE_SPEAKER (0x1) 376 #define CODEC_F1C_DEVICE_HP (0x2) 377 #define CODEC_F1C_DEVICE_CD (0x3) 378 #define CODEC_F1C_DEVICE_SPDIF_OUT (0x4) 379 #define CODEC_F1C_DEVICE_DIGITAL_OTHER_OUT (0x5) 380 #define CODEC_F1C_DEVICE_MODEM_LINE_SIDE (0x6) 381 #define CODEC_F1C_DEVICE_MODEM_HANDSET_SIDE (0x7) 382 #define CODEC_F1C_DEVICE_LINE_IN (0x8) 383 #define CODEC_F1C_DEVICE_AUX (0x9) 384 #define CODEC_F1C_DEVICE_MIC (0xA) 385 #define CODEC_F1C_DEVICE_PHONE (0xB) 386 #define CODEC_F1C_DEVICE_SPDIF_IN (0xC) 387 #define CODEC_F1C_DEVICE_RESERVED (0xE) 388 #define CODEC_F1C_DEVICE_OTHER (0xF) 389 390 /* Configuration's Connection type */ 391 #define CODEC_F1C_CONNECTION_TYPE_MASK (0xF) 392 #define CODEC_F1C_CONNECTION_TYPE_SHIFT (16) 393 394 #define CODEC_F1C_CONNECTION_TYPE_UNKNOWN (0) 395 #define CODEC_F1C_CONNECTION_TYPE_1_8INCHES (0x1) 396 #define CODEC_F1C_CONNECTION_TYPE_1_4INCHES (0x2) 397 #define CODEC_F1C_CONNECTION_TYPE_ATAPI (0x3) 398 #define CODEC_F1C_CONNECTION_TYPE_RCA (0x4) 399 #define CODEC_F1C_CONNECTION_TYPE_OPTICAL (0x5) 400 #define CODEC_F1C_CONNECTION_TYPE_OTHER_DIGITAL (0x6) 401 #define CODEC_F1C_CONNECTION_TYPE_ANALOG (0x7) 402 #define CODEC_F1C_CONNECTION_TYPE_DIN (0x8) 403 #define CODEC_F1C_CONNECTION_TYPE_XLR (0x9) 404 #define CODEC_F1C_CONNECTION_TYPE_RJ_11 (0xA) 405 #define CODEC_F1C_CONNECTION_TYPE_COMBO (0xB) 406 #define CODEC_F1C_CONNECTION_TYPE_OTHER (0xF) 407 408 /* Configuration's color */ 409 #define CODEC_F1C_COLOR_MASK (0xF) 410 #define CODEC_F1C_COLOR_SHIFT (12) 411 #define CODEC_F1C_COLOR_UNKNOWN (0) 412 #define CODEC_F1C_COLOR_BLACK (0x1) 413 #define CODEC_F1C_COLOR_GREY (0x2) 414 #define CODEC_F1C_COLOR_BLUE (0x3) 415 #define CODEC_F1C_COLOR_GREEN (0x4) 416 #define CODEC_F1C_COLOR_RED (0x5) 417 #define CODEC_F1C_COLOR_ORANGE (0x6) 418 #define CODEC_F1C_COLOR_YELLOW (0x7) 419 #define CODEC_F1C_COLOR_PURPLE (0x8) 420 #define CODEC_F1C_COLOR_PINK (0x9) 421 #define CODEC_F1C_COLOR_RESERVED_0 (0xA) 422 #define CODEC_F1C_COLOR_RESERVED_1 (0xB) 423 #define CODEC_F1C_COLOR_RESERVED_2 (0xC) 424 #define CODEC_F1C_COLOR_RESERVED_3 (0xD) 425 #define CODEC_F1C_COLOR_WHITE (0xE) 426 #define CODEC_F1C_COLOR_OTHER (0xF) 427 428 /* Configuration's misc */ 429 #define CODEC_F1C_MISC_MASK (0xF) 430 #define CODEC_F1C_MISC_SHIFT (8) 431 #define CODEC_F1C_MISC_JACK_DETECT (0) 432 #define CODEC_F1C_MISC_RESERVED_0 (1) 433 #define CODEC_F1C_MISC_RESERVED_1 (2) 434 #define CODEC_F1C_MISC_RESERVED_2 (3) 435 436 /* Configuration's association */ 437 #define CODEC_F1C_ASSOCIATION_MASK (0xF) 438 #define CODEC_F1C_ASSOCIATION_SHIFT (4) 439 /* Connection's sequence */ 440 #define CODEC_F1C_SEQ_MASK (0xF) 441 #define CODEC_F1C_SEQ_SHIFT (0) 442 443 /* Implementation identification (7.3.3.30) */ 444 #define CODEC_MAKE_F20(bmid, bsku, aid) \ 445 ( (((bmid) & 0xFFFF) << 16) \ 446 | (((bsku) & 0xFF) << 8) \ 447 | (((aid) & 0xFF)) \ 448 ) 449 450 /* macro definition helping in filling the configuration registers. */ 451 #define CODEC_MAKE_F1C(port_connectivity, location, device, connection_type, color, misc, association, sequence) \ 452 ( ((port_connectivity) << CODEC_F1C_PORT_SHIFT) \ 453 | ((location) << CODEC_F1C_LOCATION_SHIFT) \ 454 | ((device) << CODEC_F1C_DEVICE_SHIFT) \ 455 | ((connection_type) << CODEC_F1C_CONNECTION_TYPE_SHIFT) \ 456 | ((color) << CODEC_F1C_COLOR_SHIFT) \ 457 | ((misc) << CODEC_F1C_MISC_SHIFT) \ 458 | ((association) << CODEC_F1C_ASSOCIATION_SHIFT) \ 459 | ((sequence))) 40 460 41 461 … … 321 741 322 742 323 /******************************************************************************* 324 * Internal Functions * 325 *******************************************************************************/ 326 static int stac9220ResetNode(PHDACODEC pState, uint8_t nodenum, PCODECNODE pNode); 327 328 329 330 static int stac9220Construct(PHDACODEC pState) 331 { 332 unconst(pState->cTotalNodes) = 0x1C; 333 pState->pfnCodecNodeReset = stac9220ResetNode; 334 pState->u16VendorId = 0x8384; 335 pState->u16DeviceId = 0x7680; 336 pState->u8BSKU = 0x76; 337 pState->u8AssemblyId = 0x80; 338 pState->paNodes = (PCODECNODE)RTMemAllocZ(sizeof(CODECNODE) * pState->cTotalNodes); 339 pState->fInReset = false; 340 #define STAC9220WIDGET(type) pState->au8##type##s = g_abStac9220##type##s 341 STAC9220WIDGET(Port); 342 STAC9220WIDGET(Dac); 343 STAC9220WIDGET(Adc); 344 STAC9220WIDGET(AdcVol); 345 STAC9220WIDGET(AdcMux); 346 STAC9220WIDGET(Pcbeep); 347 STAC9220WIDGET(SpdifIn); 348 STAC9220WIDGET(SpdifOut); 349 STAC9220WIDGET(DigInPin); 350 STAC9220WIDGET(DigOutPin); 351 STAC9220WIDGET(Cd); 352 STAC9220WIDGET(VolKnob); 353 STAC9220WIDGET(Reserved); 354 #undef STAC9220WIDGET 355 unconst(pState->u8AdcVolsLineIn) = 0x17; 356 unconst(pState->u8DacLineOut) = 0x2; 357 358 return VINF_SUCCESS; 359 } 360 361 static int stac9220ResetNode(PHDACODEC pState, uint8_t nodenum, PCODECNODE pNode) 743 744 745 static int stac9220ResetNode(PHDACODEC pThis, uint8_t nodenum, PCODECNODE pNode) 362 746 { 363 747 pNode->node.id = nodenum; … … 427 811 | CODEC_F00_09_CAP_FMT_OVERRIDE 428 812 | CODEC_F00_09_CAP_LSB;//(4 << 16) | RT_BIT(9)|RT_BIT(4)|0x1; 429 pNode->node.au32F00_param[0xa] = p State->paNodes[1].node.au32F00_param[0xA];813 pNode->node.au32F00_param[0xa] = pThis->paNodes[1].node.au32F00_param[0xA]; 430 814 pNode->spdifout.node.au32F00_param[0xB] = CODEC_F00_0B_PCM; 431 815 pNode->spdifout.u32F06_param = 0; … … 439 823 | CODEC_F00_09_CAP_FMT_OVERRIDE 440 824 | CODEC_F00_09_CAP_LSB;//(0x1 << 20)|(4 << 16) | RT_BIT(9)| RT_BIT(8)|RT_BIT(4)|0x1; 441 pNode->node.au32F00_param[0xA] = p State->paNodes[1].node.au32F00_param[0xA];825 pNode->node.au32F00_param[0xA] = pThis->paNodes[1].node.au32F00_param[0xA]; 442 826 pNode->node.au32F00_param[0xE] = CODEC_MAKE_F00_0E(0, 1);//RT_BIT(0); 443 827 pNode->node.au32F02_param[0] = 0x11; … … 458 842 | CODEC_F07_OUT_ENABLE; 459 843 pNode->port.u32F08_param = 0; 460 if (!p State->fInReset)844 if (!pThis->fInReset) 461 845 pNode->port.u32F1c_param = CODEC_MAKE_F1C(CODEC_F1C_PORT_COMPLEX, 462 846 CODEC_F1C_LOCATION_FRONT, … … 476 860 pNode->node.au32F02_param[0] = 0x4; 477 861 pNode->port.u32F07_param = CODEC_F07_IN_ENABLE; 478 if (!p State->fInReset)862 if (!pThis->fInReset) 479 863 pNode->port.u32F1c_param = CODEC_MAKE_F1C(CODEC_F1C_PORT_COMPLEX, 480 864 CODEC_F1C_LOCATION_INTERNAL|CODEC_F1C_LOCATION_REAR, … … 494 878 | CODEC_F00_0C_CAP_IMPENDANCE_SENSE;//0x1737; 495 879 pNode->port.u32F07_param = CODEC_F07_IN_ENABLE; 496 if (!p State->fInReset)880 if (!pThis->fInReset) 497 881 pNode->port.u32F1c_param = CODEC_MAKE_F1C(CODEC_F1C_PORT_COMPLEX, 498 882 CODEC_F1C_LOCATION_REAR, … … 511 895 pNode->port.u32F07_param = CODEC_F07_IN_ENABLE; 512 896 pNode->node.au32F02_param[0] = 0x2; 513 if (!p State->fInReset)897 if (!pThis->fInReset) 514 898 pNode->port.u32F1c_param = CODEC_MAKE_F1C(CODEC_F1C_PORT_COMPLEX, 515 899 CODEC_F1C_LOCATION_FRONT, … … 537 921 pNode->port.u32F07_param = CODEC_F07_IN_ENABLE; 538 922 pNode->port.u32F09_param = CODEC_MAKE_F09_ANALOG(0, CODEC_F09_ANALOG_NA);//0x7fffffff; 539 if (!p State->fInReset)923 if (!pThis->fInReset) 540 924 pNode->port.u32F1c_param = CODEC_MAKE_F1C(CODEC_F1C_PORT_COMPLEX, 541 925 CODEC_F1C_LOCATION_REAR, … … 560 944 pNode->port.u32F07_param = CODEC_F07_OUT_ENABLE 561 945 | CODEC_F07_IN_ENABLE; 562 if (!p State->fInReset)946 if (!pThis->fInReset) 563 947 pNode->port.u32F1c_param = CODEC_MAKE_F1C(CODEC_F1C_PORT_COMPLEX, 564 948 CODEC_F1C_LOCATION_INTERNAL, … … 578 962 pNode->node.au32F00_param[0xE] = CODEC_MAKE_F00_0E(0, 0x3); 579 963 pNode->node.au32F02_param[0] = RT_MAKE_U32_FROM_U8(0x08, 0x17, 0x19, 0); 580 if (!p State->fInReset)964 if (!pThis->fInReset) 581 965 pNode->digout.u32F1c_param = CODEC_MAKE_F1C(CODEC_F1C_PORT_COMPLEX, 582 966 CODEC_F1C_LOCATION_REAR, … … 596 980 pNode->digin.u32F09_param = 0; 597 981 pNode->digin.u32F0c_param = 0; 598 if (!p State->fInReset)982 if (!pThis->fInReset) 599 983 pNode->digin.u32F1c_param = CODEC_MAKE_F1C(CODEC_F1C_PORT_COMPLEX, 600 984 CODEC_F1C_LOCATION_REAR, … … 634 1018 | CODEC_F00_09_CAP_LSB;//(4 << 20)|RT_BIT(0); 635 1019 pNode->node.au32F00_param[0xc] = CODEC_F00_0C_CAP_INPUT;//RT_BIT(5); 636 if (!p State->fInReset)1020 if (!pThis->fInReset) 637 1021 pNode->cdnode.u32F1c_param = CODEC_MAKE_F1C(CODEC_F1C_PORT_FIXED, 638 1022 CODEC_F1C_LOCATION_INTERNAL, … … 699 1083 } 700 1084 701 /* generic */ 1085 1086 static int stac9220Construct(PHDACODEC pThis) 1087 { 1088 unconst(pThis->cTotalNodes) = 0x1C; 1089 pThis->pfnCodecNodeReset = stac9220ResetNode; 1090 pThis->u16VendorId = 0x8384; 1091 pThis->u16DeviceId = 0x7680; 1092 pThis->u8BSKU = 0x76; 1093 pThis->u8AssemblyId = 0x80; 1094 pThis->paNodes = (PCODECNODE)RTMemAllocZ(sizeof(CODECNODE) * pThis->cTotalNodes); 1095 pThis->fInReset = false; 1096 #define STAC9220WIDGET(type) pThis->au8##type##s = g_abStac9220##type##s 1097 STAC9220WIDGET(Port); 1098 STAC9220WIDGET(Dac); 1099 STAC9220WIDGET(Adc); 1100 STAC9220WIDGET(AdcVol); 1101 STAC9220WIDGET(AdcMux); 1102 STAC9220WIDGET(Pcbeep); 1103 STAC9220WIDGET(SpdifIn); 1104 STAC9220WIDGET(SpdifOut); 1105 STAC9220WIDGET(DigInPin); 1106 STAC9220WIDGET(DigOutPin); 1107 STAC9220WIDGET(Cd); 1108 STAC9220WIDGET(VolKnob); 1109 STAC9220WIDGET(Reserved); 1110 #undef STAC9220WIDGET 1111 unconst(pThis->u8AdcVolsLineIn) = 0x17; 1112 unconst(pThis->u8DacLineOut) = 0x2; 1113 1114 return VINF_SUCCESS; 1115 } 1116 1117 1118 /* 1119 * Some generic predicate functions. 1120 */ 702 1121 703 1122 #define DECLISNODEOFTYPE(type) \ 704 DECLINLINE(int) hdaCodecIs##type##Node(PHDACODEC p State, uint8_t cNode) \1123 DECLINLINE(int) hdaCodecIs##type##Node(PHDACODEC pThis, uint8_t cNode) \ 705 1124 { \ 706 Assert(p State->au8##type##s); \707 for (int i = 0; p State->au8##type##s[i] != 0; ++i) \708 if (p State->au8##type##s[i] == cNode) \1125 Assert(pThis->au8##type##s); \ 1126 for (int i = 0; pThis->au8##type##s[i] != 0; ++i) \ 1127 if (pThis->au8##type##s[i] == cNode) \ 709 1128 return 1; \ 710 1129 return 0; \ … … 737 1156 DECLISNODEOFTYPE(Reserved) 738 1157 739 static int hdaCodecToAudVolume(AMPLIFIER *pAmp, audmixerctl_t mt); 1158 1159 /* 1160 * Misc helpers. 1161 */ 1162 1163 static int hdaCodecToAudVolume(AMPLIFIER *pAmp, audmixerctl_t mt) 1164 { 1165 uint32_t dir = AMPLIFIER_OUT; 1166 switch (mt) 1167 { 1168 case AUD_MIXER_VOLUME: 1169 case AUD_MIXER_PCM: 1170 dir = AMPLIFIER_OUT; 1171 break; 1172 case AUD_MIXER_LINE_IN: 1173 dir = AMPLIFIER_IN; 1174 break; 1175 } 1176 int mute = AMPLIFIER_REGISTER(*pAmp, dir, AMPLIFIER_LEFT, 0) & RT_BIT(7); 1177 mute |= AMPLIFIER_REGISTER(*pAmp, dir, AMPLIFIER_RIGHT, 0) & RT_BIT(7); 1178 mute >>=7; 1179 mute &= 0x1; 1180 uint8_t lVol = AMPLIFIER_REGISTER(*pAmp, dir, AMPLIFIER_LEFT, 0) & 0x7f; 1181 uint8_t rVol = AMPLIFIER_REGISTER(*pAmp, dir, AMPLIFIER_RIGHT, 0) & 0x7f; 1182 AUD_set_volume(mt, &mute, &lVol, &rVol); 1183 return VINF_SUCCESS; 1184 } 740 1185 741 1186 DECLINLINE(void) hdaCodecSetRegister(uint32_t *pu32Reg, uint32_t u32Cmd, uint8_t u8Offset, uint32_t mask) … … 745 1190 *pu32Reg |= (u32Cmd & mask) << u8Offset; 746 1191 } 1192 747 1193 DECLINLINE(void) hdaCodecSetRegisterU8(uint32_t *pu32Reg, uint32_t u32Cmd, uint8_t u8Offset) 748 1194 { … … 760 1206 */ 761 1207 762 static DECLCALLBACK(int) vrbProcUnimplemented(PHDACODEC p State, uint32_t cmd, uint64_t *pResp)1208 static DECLCALLBACK(int) vrbProcUnimplemented(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp) 763 1209 { 764 1210 Log(("vrbProcUnimplemented: cmd(raw:%x: cad:%x, d:%c, nid:%x, verb:%x)\n", cmd, … … 768 1214 } 769 1215 770 static DECLCALLBACK(int) vrbProcBreak(PHDACODEC p State, uint32_t cmd, uint64_t *pResp)1216 static DECLCALLBACK(int) vrbProcBreak(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp) 771 1217 { 772 1218 int rc; 773 rc = vrbProcUnimplemented(p State, cmd, pResp);1219 rc = vrbProcUnimplemented(pThis, cmd, pResp); 774 1220 *pResp |= CODEC_RESPONSE_UNSOLICITED; 775 1221 return rc; … … 777 1223 778 1224 /* B-- */ 779 static DECLCALLBACK(int) vrbProcGetAmplifier(PHDACODEC p State, uint32_t cmd, uint64_t *pResp)780 { 781 Assert( (CODEC_CAD(cmd) == pState->id));782 Assert( (CODEC_NID(cmd) < pState->cTotalNodes));783 if (CODEC_NID(cmd) >= p State->cTotalNodes)1225 static DECLCALLBACK(int) vrbProcGetAmplifier(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp) 1226 { 1227 Assert(CODEC_CAD(cmd) == pThis->id); 1228 Assert(CODEC_NID(cmd) < pThis->cTotalNodes); 1229 if (CODEC_NID(cmd) >= pThis->cTotalNodes) 784 1230 { 785 1231 Log(("HdaCodec: invalid node address %d\n", CODEC_NID(cmd))); … … 788 1234 *pResp = 0; 789 1235 /* HDA spec 7.3.3.7 Note A */ 790 /* @todo: if index out of range response should be 0 */1236 /** @todo: if index out of range response should be 0 */ 791 1237 uint8_t u8Index = CODEC_GET_AMP_DIRECTION(cmd) == AMPLIFIER_OUT? 0 : CODEC_GET_AMP_INDEX(cmd); 792 1238 793 PCODECNODE pNode = &p State->paNodes[CODEC_NID(cmd)];794 if (hdaCodecIsDacNode(p State, CODEC_NID(cmd)))1239 PCODECNODE pNode = &pThis->paNodes[CODEC_NID(cmd)]; 1240 if (hdaCodecIsDacNode(pThis, CODEC_NID(cmd))) 795 1241 *pResp = AMPLIFIER_REGISTER(pNode->dac.B_params, 796 1242 CODEC_GET_AMP_DIRECTION(cmd), 797 1243 CODEC_GET_AMP_SIDE(cmd), 798 1244 u8Index); 799 else if (hdaCodecIsAdcVolNode(p State, CODEC_NID(cmd)))1245 else if (hdaCodecIsAdcVolNode(pThis, CODEC_NID(cmd))) 800 1246 *pResp = AMPLIFIER_REGISTER(pNode->adcvol.B_params, 801 1247 CODEC_GET_AMP_DIRECTION(cmd), 802 1248 CODEC_GET_AMP_SIDE(cmd), 803 1249 u8Index); 804 else if (hdaCodecIsAdcMuxNode(p State, CODEC_NID(cmd)))1250 else if (hdaCodecIsAdcMuxNode(pThis, CODEC_NID(cmd))) 805 1251 *pResp = AMPLIFIER_REGISTER(pNode->adcmux.B_params, 806 1252 CODEC_GET_AMP_DIRECTION(cmd), 807 1253 CODEC_GET_AMP_SIDE(cmd), 808 1254 u8Index); 809 else if (hdaCodecIsPcbeepNode(p State, CODEC_NID(cmd)))1255 else if (hdaCodecIsPcbeepNode(pThis, CODEC_NID(cmd))) 810 1256 *pResp = AMPLIFIER_REGISTER(pNode->pcbeep.B_params, 811 1257 CODEC_GET_AMP_DIRECTION(cmd), 812 1258 CODEC_GET_AMP_SIDE(cmd), 813 1259 u8Index); 814 else if (hdaCodecIsPortNode(p State, CODEC_NID(cmd)))1260 else if (hdaCodecIsPortNode(pThis, CODEC_NID(cmd))) 815 1261 *pResp = AMPLIFIER_REGISTER(pNode->port.B_params, 816 1262 CODEC_GET_AMP_DIRECTION(cmd), 817 1263 CODEC_GET_AMP_SIDE(cmd), 818 1264 u8Index); 819 else if (hdaCodecIsAdcNode(p State, CODEC_NID(cmd)))1265 else if (hdaCodecIsAdcNode(pThis, CODEC_NID(cmd))) 820 1266 *pResp = AMPLIFIER_REGISTER(pNode->adc.B_params, 821 1267 CODEC_GET_AMP_DIRECTION(cmd), 822 1268 CODEC_GET_AMP_SIDE(cmd), 823 1269 u8Index); 824 else{ 825 AssertMsgReturn(0, ("access to fields of %x need to be implemented\n", CODEC_NID(cmd)), VINF_SUCCESS); 826 } 1270 else 1271 AssertMsgFailedReturn(("access to fields of %x need to be implemented\n", CODEC_NID(cmd)), VINF_SUCCESS); 827 1272 return VINF_SUCCESS; 828 1273 } 829 1274 830 1275 /* 3-- */ 831 static DECLCALLBACK(int) vrbProcSetAmplifier(PHDACODEC pState, uint32_t cmd, uint64_t *pResp) 832 { 833 AMPLIFIER *pAmplifier = NULL; 1276 static DECLCALLBACK(int) vrbProcSetAmplifier(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp) 1277 { 834 1278 bool fIsLeft = false; 835 1279 bool fIsRight = false; … … 837 1281 bool fIsIn = false; 838 1282 uint8_t u8Index = 0; 839 Assert((CODEC_CAD(cmd) == pState->id)); 840 if (CODEC_NID(cmd) >= pState->cTotalNodes) 841 { 842 Log(("HdaCodec: invalid node address %d\n", CODEC_NID(cmd))); 843 return VINF_SUCCESS; 844 } 845 *pResp = 0; 846 PCODECNODE pNode = &pState->paNodes[CODEC_NID(cmd)]; 847 if (hdaCodecIsDacNode(pState, CODEC_NID(cmd))) 1283 Assert(CODEC_CAD(cmd) == pThis->id); 1284 if (CODEC_NID(cmd) >= pThis->cTotalNodes) 1285 { 1286 Log(("HdaCodec: invalid node address %d\n", CODEC_NID(cmd))); 1287 return VINF_SUCCESS; 1288 } 1289 *pResp = 0; 1290 PCODECNODE pNode = &pThis->paNodes[CODEC_NID(cmd)]; 1291 AMPLIFIER *pAmplifier; 1292 if (hdaCodecIsDacNode(pThis, CODEC_NID(cmd))) 848 1293 pAmplifier = &pNode->dac.B_params; 849 else if (hdaCodecIsAdcVolNode(p State, CODEC_NID(cmd)))1294 else if (hdaCodecIsAdcVolNode(pThis, CODEC_NID(cmd))) 850 1295 pAmplifier = &pNode->adcvol.B_params; 851 else if (hdaCodecIsAdcMuxNode(p State, CODEC_NID(cmd)))1296 else if (hdaCodecIsAdcMuxNode(pThis, CODEC_NID(cmd))) 852 1297 pAmplifier = &pNode->adcmux.B_params; 853 else if (hdaCodecIsPcbeepNode(p State, CODEC_NID(cmd)))1298 else if (hdaCodecIsPcbeepNode(pThis, CODEC_NID(cmd))) 854 1299 pAmplifier = &pNode->pcbeep.B_params; 855 else if (hdaCodecIsPortNode(p State, CODEC_NID(cmd)))1300 else if (hdaCodecIsPortNode(pThis, CODEC_NID(cmd))) 856 1301 pAmplifier = &pNode->port.B_params; 857 else if (hdaCodecIsAdcNode(p State, CODEC_NID(cmd)))1302 else if (hdaCodecIsAdcNode(pThis, CODEC_NID(cmd))) 858 1303 pAmplifier = &pNode->adc.B_params; 859 Assert(pAmplifier); 860 if (pAmplifier) 861 { 862 fIsOut = CODEC_SET_AMP_IS_OUT_DIRECTION(cmd); 863 fIsIn = CODEC_SET_AMP_IS_IN_DIRECTION(cmd); 864 fIsRight = CODEC_SET_AMP_IS_RIGHT_SIDE(cmd); 865 fIsLeft = CODEC_SET_AMP_IS_LEFT_SIDE(cmd); 866 u8Index = CODEC_SET_AMP_INDEX(cmd); 867 if ( (!fIsLeft && !fIsRight) 868 || (!fIsOut && !fIsIn)) 869 return VINF_SUCCESS; 870 if (fIsIn) 871 { 872 if (fIsLeft) 873 hdaCodecSetRegisterU8(&LIFIER_REGISTER(*pAmplifier, AMPLIFIER_IN, AMPLIFIER_LEFT, u8Index), cmd, 0); 874 if (fIsRight) 875 hdaCodecSetRegisterU8(&LIFIER_REGISTER(*pAmplifier, AMPLIFIER_IN, AMPLIFIER_RIGHT, u8Index), cmd, 0); 876 } 877 if (fIsOut) 878 { 879 if (fIsLeft) 880 hdaCodecSetRegisterU8(&LIFIER_REGISTER(*pAmplifier, AMPLIFIER_OUT, AMPLIFIER_LEFT, u8Index), cmd, 0); 881 if (fIsRight) 882 hdaCodecSetRegisterU8(&LIFIER_REGISTER(*pAmplifier, AMPLIFIER_OUT, AMPLIFIER_RIGHT, u8Index), cmd, 0); 883 } 884 if (CODEC_NID(cmd) == pState->u8DacLineOut) 885 hdaCodecToAudVolume(pAmplifier, AUD_MIXER_VOLUME); 886 if (CODEC_NID(cmd) == pState->u8AdcVolsLineIn) /* Microphone */ 887 hdaCodecToAudVolume(pAmplifier, AUD_MIXER_LINE_IN); 888 } 889 return VINF_SUCCESS; 890 } 891 892 static DECLCALLBACK(int) vrbProcGetParameter(PHDACODEC pState, uint32_t cmd, uint64_t *pResp) 893 { 894 Assert(CODEC_CAD(cmd) == pState->id); 895 if (CODEC_NID(cmd) >= pState->cTotalNodes) 1304 else 1305 AssertFailedReturn(VINF_SUCCESS); 1306 1307 fIsOut = CODEC_SET_AMP_IS_OUT_DIRECTION(cmd); 1308 fIsIn = CODEC_SET_AMP_IS_IN_DIRECTION(cmd); 1309 fIsRight = CODEC_SET_AMP_IS_RIGHT_SIDE(cmd); 1310 fIsLeft = CODEC_SET_AMP_IS_LEFT_SIDE(cmd); 1311 u8Index = CODEC_SET_AMP_INDEX(cmd); 1312 if ( (!fIsLeft && !fIsRight) 1313 || (!fIsOut && !fIsIn)) 1314 return VINF_SUCCESS; 1315 if (fIsIn) 1316 { 1317 if (fIsLeft) 1318 hdaCodecSetRegisterU8(&LIFIER_REGISTER(*pAmplifier, AMPLIFIER_IN, AMPLIFIER_LEFT, u8Index), cmd, 0); 1319 if (fIsRight) 1320 hdaCodecSetRegisterU8(&LIFIER_REGISTER(*pAmplifier, AMPLIFIER_IN, AMPLIFIER_RIGHT, u8Index), cmd, 0); 1321 } 1322 if (fIsOut) 1323 { 1324 if (fIsLeft) 1325 hdaCodecSetRegisterU8(&LIFIER_REGISTER(*pAmplifier, AMPLIFIER_OUT, AMPLIFIER_LEFT, u8Index), cmd, 0); 1326 if (fIsRight) 1327 hdaCodecSetRegisterU8(&LIFIER_REGISTER(*pAmplifier, AMPLIFIER_OUT, AMPLIFIER_RIGHT, u8Index), cmd, 0); 1328 } 1329 if (CODEC_NID(cmd) == pThis->u8DacLineOut) 1330 hdaCodecToAudVolume(pAmplifier, AUD_MIXER_VOLUME); 1331 if (CODEC_NID(cmd) == pThis->u8AdcVolsLineIn) /* Microphone */ 1332 hdaCodecToAudVolume(pAmplifier, AUD_MIXER_LINE_IN); 1333 return VINF_SUCCESS; 1334 } 1335 1336 static DECLCALLBACK(int) vrbProcGetParameter(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp) 1337 { 1338 Assert(CODEC_CAD(cmd) == pThis->id); 1339 if (CODEC_NID(cmd) >= pThis->cTotalNodes) 896 1340 { 897 1341 Log(("HdaCodec: invalid node address %d\n", CODEC_NID(cmd))); … … 904 1348 return VINF_SUCCESS; 905 1349 } 906 *pResp = 0; 907 *pResp = pState->paNodes[CODEC_NID(cmd)].node.au32F00_param[cmd & CODEC_VERB_8BIT_DATA]; 1350 *pResp = pThis->paNodes[CODEC_NID(cmd)].node.au32F00_param[cmd & CODEC_VERB_8BIT_DATA]; 908 1351 return VINF_SUCCESS; 909 1352 } 910 1353 911 1354 /* F01 */ 912 static DECLCALLBACK(int) vrbProcGetConSelectCtrl(PHDACODEC p State, uint32_t cmd, uint64_t *pResp)913 { 914 Assert(CODEC_CAD(cmd) == p State->id);915 Assert(CODEC_NID(cmd) < p State->cTotalNodes);916 if (CODEC_NID(cmd) >= p State->cTotalNodes)917 { 918 Log(("HdaCodec: invalid node address %d\n", CODEC_NID(cmd))); 919 return VINF_SUCCESS; 920 } 921 *pResp = 0; 922 if (hdaCodecIsAdcMuxNode(p State, CODEC_NID(cmd)))923 *pResp = p State->paNodes[CODEC_NID(cmd)].adcmux.u32F01_param;924 else if (hdaCodecIsDigOutPinNode(p State, CODEC_NID(cmd)))925 *pResp = p State->paNodes[CODEC_NID(cmd)].digout.u32F01_param;926 else if (hdaCodecIsPortNode(p State, CODEC_NID(cmd)))927 *pResp = p State->paNodes[CODEC_NID(cmd)].port.u32F01_param;928 else if (hdaCodecIsAdcNode(p State, CODEC_NID(cmd)))929 *pResp = p State->paNodes[CODEC_NID(cmd)].adc.u32F01_param;930 else if (hdaCodecIsAdcVolNode(p State, CODEC_NID(cmd)))931 *pResp = p State->paNodes[CODEC_NID(cmd)].adcvol.u32F01_param;1355 static DECLCALLBACK(int) vrbProcGetConSelectCtrl(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp) 1356 { 1357 Assert(CODEC_CAD(cmd) == pThis->id); 1358 Assert(CODEC_NID(cmd) < pThis->cTotalNodes); 1359 if (CODEC_NID(cmd) >= pThis->cTotalNodes) 1360 { 1361 Log(("HdaCodec: invalid node address %d\n", CODEC_NID(cmd))); 1362 return VINF_SUCCESS; 1363 } 1364 *pResp = 0; 1365 if (hdaCodecIsAdcMuxNode(pThis, CODEC_NID(cmd))) 1366 *pResp = pThis->paNodes[CODEC_NID(cmd)].adcmux.u32F01_param; 1367 else if (hdaCodecIsDigOutPinNode(pThis, CODEC_NID(cmd))) 1368 *pResp = pThis->paNodes[CODEC_NID(cmd)].digout.u32F01_param; 1369 else if (hdaCodecIsPortNode(pThis, CODEC_NID(cmd))) 1370 *pResp = pThis->paNodes[CODEC_NID(cmd)].port.u32F01_param; 1371 else if (hdaCodecIsAdcNode(pThis, CODEC_NID(cmd))) 1372 *pResp = pThis->paNodes[CODEC_NID(cmd)].adc.u32F01_param; 1373 else if (hdaCodecIsAdcVolNode(pThis, CODEC_NID(cmd))) 1374 *pResp = pThis->paNodes[CODEC_NID(cmd)].adcvol.u32F01_param; 932 1375 return VINF_SUCCESS; 933 1376 } 934 1377 935 1378 /* 701 */ 936 static DECLCALLBACK(int) vrbProcSetConSelectCtrl(PHDACODEC p State, uint32_t cmd, uint64_t *pResp)937 { 938 uint32_t *pu32Reg = NULL;939 Assert((CODEC_NID(cmd) < pState->cTotalNodes));940 if (CODEC_NID(cmd) >= pState->cTotalNodes)941 {942 Log(("HdaCodec: invalid node address %d\n", CODEC_NID(cmd)));943 return VINF_SUCCESS;944 }945 *pResp = 0;946 if (hdaCodecIsAdcMuxNode(p State, CODEC_NID(cmd)))947 pu32Reg = &p State->paNodes[CODEC_NID(cmd)].adcmux.u32F01_param;948 else if (hdaCodecIsDigOutPinNode(p State, CODEC_NID(cmd)))949 pu32Reg = &p State->paNodes[CODEC_NID(cmd)].digout.u32F01_param;950 else if (hdaCodecIsPortNode(p State, CODEC_NID(cmd)))951 pu32Reg = &p State->paNodes[CODEC_NID(cmd)].port.u32F01_param;952 else if (hdaCodecIsAdcNode(p State, CODEC_NID(cmd)))953 pu32Reg = &p State->paNodes[CODEC_NID(cmd)].adc.u32F01_param;954 else if (hdaCodecIsAdcVolNode(p State, CODEC_NID(cmd)))955 pu32Reg = &p State->paNodes[CODEC_NID(cmd)].adcvol.u32F01_param;956 Assert((pu32Reg));957 if (pu32Reg)958 1379 static DECLCALLBACK(int) vrbProcSetConSelectCtrl(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp) 1380 { 1381 Assert(CODEC_NID(cmd) < pThis->cTotalNodes); 1382 if (CODEC_NID(cmd) >= pThis->cTotalNodes) 1383 { 1384 Log(("HdaCodec: invalid node address %d\n", CODEC_NID(cmd))); 1385 return VINF_SUCCESS; 1386 } 1387 *pResp = 0; 1388 uint32_t *pu32Reg; 1389 if (hdaCodecIsAdcMuxNode(pThis, CODEC_NID(cmd))) 1390 pu32Reg = &pThis->paNodes[CODEC_NID(cmd)].adcmux.u32F01_param; 1391 else if (hdaCodecIsDigOutPinNode(pThis, CODEC_NID(cmd))) 1392 pu32Reg = &pThis->paNodes[CODEC_NID(cmd)].digout.u32F01_param; 1393 else if (hdaCodecIsPortNode(pThis, CODEC_NID(cmd))) 1394 pu32Reg = &pThis->paNodes[CODEC_NID(cmd)].port.u32F01_param; 1395 else if (hdaCodecIsAdcNode(pThis, CODEC_NID(cmd))) 1396 pu32Reg = &pThis->paNodes[CODEC_NID(cmd)].adc.u32F01_param; 1397 else if (hdaCodecIsAdcVolNode(pThis, CODEC_NID(cmd))) 1398 pu32Reg = &pThis->paNodes[CODEC_NID(cmd)].adcvol.u32F01_param; 1399 else 1400 AssertFailedReturn(VINF_SUCCESS); 1401 hdaCodecSetRegisterU8(pu32Reg, cmd, 0); 959 1402 return VINF_SUCCESS; 960 1403 } 961 1404 962 1405 /* F07 */ 963 static DECLCALLBACK(int) vrbProcGetPinCtrl(PHDACODEC p State, uint32_t cmd, uint64_t *pResp)964 { 965 Assert( (CODEC_CAD(cmd) == pState->id));966 Assert( (CODEC_NID(cmd) < pState->cTotalNodes));967 if (CODEC_NID(cmd) >= p State->cTotalNodes)968 { 969 Log(("HdaCodec: invalid node address %d\n", CODEC_NID(cmd))); 970 return VINF_SUCCESS; 971 } 972 *pResp = 0; 973 if (hdaCodecIsPortNode(p State, CODEC_NID(cmd)))974 *pResp = p State->paNodes[CODEC_NID(cmd)].port.u32F07_param;975 else if (hdaCodecIsDigOutPinNode(p State, CODEC_NID(cmd)))976 *pResp = p State->paNodes[CODEC_NID(cmd)].digout.u32F07_param;977 else if (hdaCodecIsDigInPinNode(p State, CODEC_NID(cmd)))978 *pResp = p State->paNodes[CODEC_NID(cmd)].digin.u32F07_param;979 else if (hdaCodecIsCdNode(p State, CODEC_NID(cmd)))980 *pResp = p State->paNodes[CODEC_NID(cmd)].cdnode.u32F07_param;981 else if (hdaCodecIsPcbeepNode(p State, CODEC_NID(cmd)))982 *pResp = p State->paNodes[CODEC_NID(cmd)].pcbeep.u32F07_param;983 else if (hdaCodecIsReservedNode(p State, CODEC_NID(cmd)))984 *pResp = p State->paNodes[CODEC_NID(cmd)].reserved.u32F07_param;1406 static DECLCALLBACK(int) vrbProcGetPinCtrl(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp) 1407 { 1408 Assert(CODEC_CAD(cmd) == pThis->id); 1409 Assert(CODEC_NID(cmd) < pThis->cTotalNodes); 1410 if (CODEC_NID(cmd) >= pThis->cTotalNodes) 1411 { 1412 Log(("HdaCodec: invalid node address %d\n", CODEC_NID(cmd))); 1413 return VINF_SUCCESS; 1414 } 1415 *pResp = 0; 1416 if (hdaCodecIsPortNode(pThis, CODEC_NID(cmd))) 1417 *pResp = pThis->paNodes[CODEC_NID(cmd)].port.u32F07_param; 1418 else if (hdaCodecIsDigOutPinNode(pThis, CODEC_NID(cmd))) 1419 *pResp = pThis->paNodes[CODEC_NID(cmd)].digout.u32F07_param; 1420 else if (hdaCodecIsDigInPinNode(pThis, CODEC_NID(cmd))) 1421 *pResp = pThis->paNodes[CODEC_NID(cmd)].digin.u32F07_param; 1422 else if (hdaCodecIsCdNode(pThis, CODEC_NID(cmd))) 1423 *pResp = pThis->paNodes[CODEC_NID(cmd)].cdnode.u32F07_param; 1424 else if (hdaCodecIsPcbeepNode(pThis, CODEC_NID(cmd))) 1425 *pResp = pThis->paNodes[CODEC_NID(cmd)].pcbeep.u32F07_param; 1426 else if (hdaCodecIsReservedNode(pThis, CODEC_NID(cmd))) 1427 *pResp = pThis->paNodes[CODEC_NID(cmd)].reserved.u32F07_param; 985 1428 else 986 1429 AssertMsgFailed(("Unsupported")); … … 989 1432 990 1433 /* 707 */ 991 static DECLCALLBACK(int) vrbProcSetPinCtrl(PHDACODEC p State, uint32_t cmd, uint64_t *pResp)992 { 993 Assert( (CODEC_CAD(cmd) == pState->id));994 Assert( (CODEC_NID(cmd) < pState->cTotalNodes));995 if (CODEC_NID(cmd) >= p State->cTotalNodes)996 { 997 Log(("HdaCodec: invalid node address %d\n", CODEC_NID(cmd))); 998 return VINF_SUCCESS; 999 } 1000 *pResp = 0; 1001 uint32_t *pu32Reg = NULL;1002 if (hdaCodecIsPortNode(p State, CODEC_NID(cmd)))1003 pu32Reg = &p State->paNodes[CODEC_NID(cmd)].port.u32F07_param;1004 else if (hdaCodecIsDigInPinNode(p State, CODEC_NID(cmd)))1005 pu32Reg = &p State->paNodes[CODEC_NID(cmd)].digin.u32F07_param;1006 else if (hdaCodecIsDigOutPinNode(p State, CODEC_NID(cmd)))1007 pu32Reg = &p State->paNodes[CODEC_NID(cmd)].digout.u32F07_param;1008 else if (hdaCodecIsCdNode(p State, CODEC_NID(cmd)))1009 pu32Reg = &p State->paNodes[CODEC_NID(cmd)].cdnode.u32F07_param;1010 else if (hdaCodecIsPcbeepNode(p State, CODEC_NID(cmd)))1011 pu32Reg = &p State->paNodes[CODEC_NID(cmd)].pcbeep.u32F07_param;1012 else if ( hdaCodecIsReservedNode(p State, CODEC_NID(cmd))1434 static DECLCALLBACK(int) vrbProcSetPinCtrl(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp) 1435 { 1436 Assert(CODEC_CAD(cmd) == pThis->id); 1437 Assert(CODEC_NID(cmd) < pThis->cTotalNodes); 1438 if (CODEC_NID(cmd) >= pThis->cTotalNodes) 1439 { 1440 Log(("HdaCodec: invalid node address %d\n", CODEC_NID(cmd))); 1441 return VINF_SUCCESS; 1442 } 1443 *pResp = 0; 1444 uint32_t *pu32Reg; 1445 if (hdaCodecIsPortNode(pThis, CODEC_NID(cmd))) 1446 pu32Reg = &pThis->paNodes[CODEC_NID(cmd)].port.u32F07_param; 1447 else if (hdaCodecIsDigInPinNode(pThis, CODEC_NID(cmd))) 1448 pu32Reg = &pThis->paNodes[CODEC_NID(cmd)].digin.u32F07_param; 1449 else if (hdaCodecIsDigOutPinNode(pThis, CODEC_NID(cmd))) 1450 pu32Reg = &pThis->paNodes[CODEC_NID(cmd)].digout.u32F07_param; 1451 else if (hdaCodecIsCdNode(pThis, CODEC_NID(cmd))) 1452 pu32Reg = &pThis->paNodes[CODEC_NID(cmd)].cdnode.u32F07_param; 1453 else if (hdaCodecIsPcbeepNode(pThis, CODEC_NID(cmd))) 1454 pu32Reg = &pThis->paNodes[CODEC_NID(cmd)].pcbeep.u32F07_param; 1455 else if ( hdaCodecIsReservedNode(pThis, CODEC_NID(cmd)) 1013 1456 && CODEC_NID(cmd) == 0x1b) 1014 pu32Reg = &p State->paNodes[CODEC_NID(cmd)].reserved.u32F07_param;1015 Assert((pu32Reg));1016 if (pu32Reg)1017 1457 pu32Reg = &pThis->paNodes[CODEC_NID(cmd)].reserved.u32F07_param; 1458 else 1459 AssertFailedReturn(VINF_SUCCESS); 1460 hdaCodecSetRegisterU8(pu32Reg, cmd, 0); 1018 1461 return VINF_SUCCESS; 1019 1462 } 1020 1463 1021 1464 /* F08 */ 1022 static DECLCALLBACK(int) vrbProcGetUnsolicitedEnabled(PHDACODEC p State, uint32_t cmd, uint64_t *pResp)1023 { 1024 Assert( (CODEC_CAD(cmd) == pState->id));1025 Assert( (CODEC_NID(cmd) < pState->cTotalNodes));1026 if (CODEC_NID(cmd) >= p State->cTotalNodes)1027 { 1028 Log(("HdaCodec: invalid node address %d\n", CODEC_NID(cmd))); 1029 return VINF_SUCCESS; 1030 } 1031 *pResp = 0; 1032 if (hdaCodecIsPortNode(p State, CODEC_NID(cmd)))1033 *pResp = p State->paNodes[CODEC_NID(cmd)].port.u32F08_param;1034 else if (hdaCodecIsDigInPinNode(p State, CODEC_NID(cmd)))1035 *pResp = p State->paNodes[CODEC_NID(cmd)].digin.u32F08_param;1465 static DECLCALLBACK(int) vrbProcGetUnsolicitedEnabled(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp) 1466 { 1467 Assert(CODEC_CAD(cmd) == pThis->id); 1468 Assert(CODEC_NID(cmd) < pThis->cTotalNodes); 1469 if (CODEC_NID(cmd) >= pThis->cTotalNodes) 1470 { 1471 Log(("HdaCodec: invalid node address %d\n", CODEC_NID(cmd))); 1472 return VINF_SUCCESS; 1473 } 1474 *pResp = 0; 1475 if (hdaCodecIsPortNode(pThis, CODEC_NID(cmd))) 1476 *pResp = pThis->paNodes[CODEC_NID(cmd)].port.u32F08_param; 1477 else if (hdaCodecIsDigInPinNode(pThis, CODEC_NID(cmd))) 1478 *pResp = pThis->paNodes[CODEC_NID(cmd)].digin.u32F08_param; 1036 1479 else if ((cmd) == 1 /* AFG */) 1037 *pResp = p State->paNodes[CODEC_NID(cmd)].afg.u32F08_param;1038 else if (hdaCodecIsVolKnobNode(p State, CODEC_NID(cmd)))1039 *pResp = p State->paNodes[CODEC_NID(cmd)].volumeKnob.u32F08_param;1040 else if (hdaCodecIsDigOutPinNode(p State, CODEC_NID(cmd)))1041 *pResp = p State->paNodes[CODEC_NID(cmd)].digout.u32F08_param;1042 else if (hdaCodecIsDigInPinNode(p State, CODEC_NID(cmd)))1043 *pResp = p State->paNodes[CODEC_NID(cmd)].digin.u32F08_param;1480 *pResp = pThis->paNodes[CODEC_NID(cmd)].afg.u32F08_param; 1481 else if (hdaCodecIsVolKnobNode(pThis, CODEC_NID(cmd))) 1482 *pResp = pThis->paNodes[CODEC_NID(cmd)].volumeKnob.u32F08_param; 1483 else if (hdaCodecIsDigOutPinNode(pThis, CODEC_NID(cmd))) 1484 *pResp = pThis->paNodes[CODEC_NID(cmd)].digout.u32F08_param; 1485 else if (hdaCodecIsDigInPinNode(pThis, CODEC_NID(cmd))) 1486 *pResp = pThis->paNodes[CODEC_NID(cmd)].digin.u32F08_param; 1044 1487 else 1045 1488 AssertMsgFailed(("unsupported operation %x on node: %x\n", CODEC_VERB_CMD8(cmd), CODEC_NID(cmd))); … … 1048 1491 1049 1492 /* 708 */ 1050 static DECLCALLBACK(int) vrbProcSetUnsolicitedEnabled(PHDACODEC p State, uint32_t cmd, uint64_t *pResp)1051 { 1052 Assert( (CODEC_CAD(cmd) == pState->id));1053 Assert( (CODEC_NID(cmd) < pState->cTotalNodes));1054 if (CODEC_NID(cmd) >= p State->cTotalNodes)1055 { 1056 Log(("HdaCodec: invalid node address %d\n", CODEC_NID(cmd))); 1057 return VINF_SUCCESS; 1058 } 1059 *pResp = 0; 1060 uint32_t *pu32Reg = NULL;1061 if (hdaCodecIsPortNode(p State, CODEC_NID(cmd)))1062 pu32Reg = &p State->paNodes[CODEC_NID(cmd)].port.u32F08_param;1063 else if (hdaCodecIsDigInPinNode(p State, CODEC_NID(cmd)))1064 pu32Reg = &p State->paNodes[CODEC_NID(cmd)].digin.u32F08_param;1493 static DECLCALLBACK(int) vrbProcSetUnsolicitedEnabled(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp) 1494 { 1495 Assert(CODEC_CAD(cmd) == pThis->id); 1496 Assert(CODEC_NID(cmd) < pThis->cTotalNodes); 1497 if (CODEC_NID(cmd) >= pThis->cTotalNodes) 1498 { 1499 Log(("HdaCodec: invalid node address %d\n", CODEC_NID(cmd))); 1500 return VINF_SUCCESS; 1501 } 1502 *pResp = 0; 1503 uint32_t *pu32Reg; 1504 if (hdaCodecIsPortNode(pThis, CODEC_NID(cmd))) 1505 pu32Reg = &pThis->paNodes[CODEC_NID(cmd)].port.u32F08_param; 1506 else if (hdaCodecIsDigInPinNode(pThis, CODEC_NID(cmd))) 1507 pu32Reg = &pThis->paNodes[CODEC_NID(cmd)].digin.u32F08_param; 1065 1508 else if (CODEC_NID(cmd) == 1 /* AFG */) 1066 pu32Reg = &pState->paNodes[CODEC_NID(cmd)].afg.u32F08_param; 1067 else if (hdaCodecIsVolKnobNode(pState, CODEC_NID(cmd))) 1068 pu32Reg = &pState->paNodes[CODEC_NID(cmd)].volumeKnob.u32F08_param; 1069 else if (hdaCodecIsDigInPinNode(pState, CODEC_NID(cmd))) 1070 pu32Reg = &pState->paNodes[CODEC_NID(cmd)].digin.u32F08_param; 1071 else if (hdaCodecIsDigOutPinNode(pState, CODEC_NID(cmd))) 1072 pu32Reg = &pState->paNodes[CODEC_NID(cmd)].digout.u32F08_param; 1509 pu32Reg = &pThis->paNodes[CODEC_NID(cmd)].afg.u32F08_param; 1510 else if (hdaCodecIsVolKnobNode(pThis, CODEC_NID(cmd))) 1511 pu32Reg = &pThis->paNodes[CODEC_NID(cmd)].volumeKnob.u32F08_param; 1512 else if (hdaCodecIsDigInPinNode(pThis, CODEC_NID(cmd))) 1513 pu32Reg = &pThis->paNodes[CODEC_NID(cmd)].digin.u32F08_param; 1514 else if (hdaCodecIsDigOutPinNode(pThis, CODEC_NID(cmd))) 1515 pu32Reg = &pThis->paNodes[CODEC_NID(cmd)].digout.u32F08_param; 1516 else 1517 AssertMsgFailedReturn(("unsupported operation %x on node: %x\n", CODEC_VERB_CMD8(cmd), CODEC_NID(cmd)), VINF_SUCCESS); 1518 hdaCodecSetRegisterU8(pu32Reg, cmd, 0); 1519 return VINF_SUCCESS; 1520 } 1521 1522 /* F09 */ 1523 static DECLCALLBACK(int) vrbProcGetPinSense(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp) 1524 { 1525 Assert(CODEC_CAD(cmd) == pThis->id); 1526 Assert(CODEC_NID(cmd) < pThis->cTotalNodes); 1527 if (CODEC_NID(cmd) >= pThis->cTotalNodes) 1528 { 1529 Log(("HdaCodec: invalid node address %d\n", CODEC_NID(cmd))); 1530 return VINF_SUCCESS; 1531 } 1532 *pResp = 0; 1533 if (hdaCodecIsPortNode(pThis, CODEC_NID(cmd))) 1534 *pResp = pThis->paNodes[CODEC_NID(cmd)].port.u32F09_param; 1535 else if (hdaCodecIsDigInPinNode(pThis, CODEC_NID(cmd))) 1536 *pResp = pThis->paNodes[CODEC_NID(cmd)].digin.u32F09_param; 1073 1537 else 1074 1538 AssertMsgFailed(("unsupported operation %x on node: %x\n", CODEC_VERB_CMD8(cmd), CODEC_NID(cmd))); 1075 Assert(pu32Reg); 1076 if(pu32Reg) 1077 hdaCodecSetRegisterU8(pu32Reg, cmd, 0); 1078 return VINF_SUCCESS; 1079 } 1080 1081 /* F09 */ 1082 static DECLCALLBACK(int) vrbProcGetPinSense(PHDACODEC pState, uint32_t cmd, uint64_t *pResp) 1083 { 1084 Assert((CODEC_CAD(cmd) == pState->id)); 1085 Assert((CODEC_NID(cmd) < pState->cTotalNodes)); 1086 if (CODEC_NID(cmd) >= pState->cTotalNodes) 1087 { 1088 Log(("HdaCodec: invalid node address %d\n", CODEC_NID(cmd))); 1089 return VINF_SUCCESS; 1090 } 1091 *pResp = 0; 1092 if (hdaCodecIsPortNode(pState, CODEC_NID(cmd))) 1093 *pResp = pState->paNodes[CODEC_NID(cmd)].port.u32F09_param; 1094 else if (hdaCodecIsDigInPinNode(pState, CODEC_NID(cmd))) 1095 *pResp = pState->paNodes[CODEC_NID(cmd)].digin.u32F09_param; 1539 return VINF_SUCCESS; 1540 } 1541 1542 /* 709 */ 1543 static DECLCALLBACK(int) vrbProcSetPinSense(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp) 1544 { 1545 Assert(CODEC_CAD(cmd) == pThis->id); 1546 Assert(CODEC_NID(cmd) < pThis->cTotalNodes); 1547 if (CODEC_NID(cmd) >= pThis->cTotalNodes) 1548 { 1549 Log(("HdaCodec: invalid node address %d\n", CODEC_NID(cmd))); 1550 return VINF_SUCCESS; 1551 } 1552 *pResp = 0; 1553 uint32_t *pu32Reg; 1554 if (hdaCodecIsPortNode(pThis, CODEC_NID(cmd))) 1555 pu32Reg = &pThis->paNodes[CODEC_NID(cmd)].port.u32F09_param; 1556 else if (hdaCodecIsDigInPinNode(pThis, CODEC_NID(cmd))) 1557 pu32Reg = &pThis->paNodes[CODEC_NID(cmd)].digin.u32F09_param; 1096 1558 else 1097 AssertMsgFailed(("unsupported operation %x on node: %x\n", CODEC_VERB_CMD8(cmd), CODEC_NID(cmd))); 1098 return VINF_SUCCESS; 1099 } 1100 1101 /* 709 */ 1102 static DECLCALLBACK(int) vrbProcSetPinSense(PHDACODEC pState, uint32_t cmd, uint64_t *pResp) 1103 { 1104 Assert((CODEC_CAD(cmd) == pState->id)); 1105 Assert((CODEC_NID(cmd) < pState->cTotalNodes)); 1106 if (CODEC_NID(cmd) >= pState->cTotalNodes) 1107 { 1108 Log(("HdaCodec: invalid node address %d\n", CODEC_NID(cmd))); 1109 return VINF_SUCCESS; 1110 } 1111 *pResp = 0; 1112 uint32_t *pu32Reg = NULL; 1113 if (hdaCodecIsPortNode(pState, CODEC_NID(cmd))) 1114 pu32Reg = &pState->paNodes[CODEC_NID(cmd)].port.u32F09_param; 1115 else if (hdaCodecIsDigInPinNode(pState, CODEC_NID(cmd))) 1116 pu32Reg = &pState->paNodes[CODEC_NID(cmd)].digin.u32F09_param; 1117 Assert(pu32Reg); 1118 if(pu32Reg) 1119 hdaCodecSetRegisterU8(pu32Reg, cmd, 0); 1120 return VINF_SUCCESS; 1121 } 1122 1123 static DECLCALLBACK(int) vrbProcGetConnectionListEntry(PHDACODEC pState, uint32_t cmd, uint64_t *pResp) 1124 { 1125 Assert((CODEC_CAD(cmd) == pState->id)); 1126 Assert((CODEC_NID(cmd) < pState->cTotalNodes)); 1127 *pResp = 0; 1128 if (CODEC_NID(cmd) >= pState->cTotalNodes) 1559 AssertFailedReturn(VINF_SUCCESS); 1560 hdaCodecSetRegisterU8(pu32Reg, cmd, 0); 1561 return VINF_SUCCESS; 1562 } 1563 1564 static DECLCALLBACK(int) vrbProcGetConnectionListEntry(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp) 1565 { 1566 Assert(CODEC_CAD(cmd) == pThis->id); 1567 Assert(CODEC_NID(cmd) < pThis->cTotalNodes); 1568 *pResp = 0; 1569 if (CODEC_NID(cmd) >= pThis->cTotalNodes) 1129 1570 { 1130 1571 Log(("HdaCodec: invalid node address %d\n", CODEC_NID(cmd))); … … 1137 1578 return VINF_SUCCESS; 1138 1579 } 1139 *pResp = p State->paNodes[CODEC_NID(cmd)].node.au32F02_param[cmd & CODEC_VERB_8BIT_DATA];1580 *pResp = pThis->paNodes[CODEC_NID(cmd)].node.au32F02_param[cmd & CODEC_VERB_8BIT_DATA]; 1140 1581 return VINF_SUCCESS; 1141 1582 } 1142 1583 1143 1584 /* F03 */ 1144 static DECLCALLBACK(int) vrbProcGetProcessingState(PHDACODEC p State, uint32_t cmd, uint64_t *pResp)1145 { 1146 Assert( (CODEC_CAD(cmd) == pState->id));1147 Assert( (CODEC_NID(cmd) < pState->cTotalNodes));1148 if (CODEC_NID(cmd) >= p State->cTotalNodes)1149 { 1150 Log(("HdaCodec: invalid node address %d\n", CODEC_NID(cmd))); 1151 return VINF_SUCCESS; 1152 } 1153 *pResp = 0; 1154 if (hdaCodecIsAdcNode(p State, CODEC_NID(cmd)))1155 *pResp = p State->paNodes[CODEC_NID(cmd)].adc.u32F03_param;1585 static DECLCALLBACK(int) vrbProcGetProcessingState(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp) 1586 { 1587 Assert(CODEC_CAD(cmd) == pThis->id); 1588 Assert(CODEC_NID(cmd) < pThis->cTotalNodes); 1589 if (CODEC_NID(cmd) >= pThis->cTotalNodes) 1590 { 1591 Log(("HdaCodec: invalid node address %d\n", CODEC_NID(cmd))); 1592 return VINF_SUCCESS; 1593 } 1594 *pResp = 0; 1595 if (hdaCodecIsAdcNode(pThis, CODEC_NID(cmd))) 1596 *pResp = pThis->paNodes[CODEC_NID(cmd)].adc.u32F03_param; 1156 1597 return VINF_SUCCESS; 1157 1598 } 1158 1599 1159 1600 /* 703 */ 1160 static DECLCALLBACK(int) vrbProcSetProcessingState(PHDACODEC pState, uint32_t cmd, uint64_t *pResp) 1161 { 1162 Assert((CODEC_CAD(cmd) == pState->id)); 1163 Assert((CODEC_NID(cmd) < pState->cTotalNodes)); 1164 if (CODEC_NID(cmd) >= pState->cTotalNodes) 1165 { 1166 Log(("HdaCodec: invalid node address %d\n", CODEC_NID(cmd))); 1167 return VINF_SUCCESS; 1168 } 1169 *pResp = 0; 1170 if (hdaCodecIsAdcNode(pState, CODEC_NID(cmd))) 1171 { 1172 hdaCodecSetRegisterU8(&pState->paNodes[CODEC_NID(cmd)].adc.u32F03_param, cmd, 0); 1173 } 1601 static DECLCALLBACK(int) vrbProcSetProcessingState(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp) 1602 { 1603 Assert(CODEC_CAD(cmd) == pThis->id); 1604 Assert(CODEC_NID(cmd) < pThis->cTotalNodes); 1605 if (CODEC_NID(cmd) >= pThis->cTotalNodes) 1606 { 1607 Log(("HdaCodec: invalid node address %d\n", CODEC_NID(cmd))); 1608 return VINF_SUCCESS; 1609 } 1610 *pResp = 0; 1611 if (hdaCodecIsAdcNode(pThis, CODEC_NID(cmd))) 1612 hdaCodecSetRegisterU8(&pThis->paNodes[CODEC_NID(cmd)].adc.u32F03_param, cmd, 0); 1174 1613 return VINF_SUCCESS; 1175 1614 } 1176 1615 1177 1616 /* F0D */ 1178 static DECLCALLBACK(int) vrbProcGetDigitalConverter(PHDACODEC p State, uint32_t cmd, uint64_t *pResp)1179 { 1180 Assert( (CODEC_CAD(cmd) == pState->id));1181 Assert( (CODEC_NID(cmd) < pState->cTotalNodes));1182 if (CODEC_NID(cmd) >= p State->cTotalNodes)1183 { 1184 Log(("HdaCodec: invalid node address %d\n", CODEC_NID(cmd))); 1185 return VINF_SUCCESS; 1186 } 1187 *pResp = 0; 1188 if (hdaCodecIsSpdifOutNode(p State, CODEC_NID(cmd)))1189 *pResp = p State->paNodes[CODEC_NID(cmd)].spdifout.u32F0d_param;1190 else if (hdaCodecIsSpdifInNode(p State, CODEC_NID(cmd)))1191 *pResp = p State->paNodes[CODEC_NID(cmd)].spdifin.u32F0d_param;1192 return VINF_SUCCESS; 1193 } 1194 1195 static int codecSetDigitalConverter(PHDACODEC p State, uint32_t cmd, uint8_t u8Offset, uint64_t *pResp)1196 { 1197 Assert( (CODEC_CAD(cmd) == pState->id));1198 Assert( (CODEC_NID(cmd) < pState->cTotalNodes));1199 if (CODEC_NID(cmd) >= p State->cTotalNodes)1200 { 1201 Log(("HdaCodec: invalid node address %d\n", CODEC_NID(cmd))); 1202 return VINF_SUCCESS; 1203 } 1204 *pResp = 0; 1205 if (hdaCodecIsSpdifOutNode(p State, CODEC_NID(cmd)))1206 hdaCodecSetRegisterU8(&p State->paNodes[CODEC_NID(cmd)].spdifout.u32F0d_param, cmd, u8Offset);1207 else if (hdaCodecIsSpdifInNode(p State, CODEC_NID(cmd)))1208 hdaCodecSetRegisterU8(&p State->paNodes[CODEC_NID(cmd)].spdifin.u32F0d_param, cmd, u8Offset);1617 static DECLCALLBACK(int) vrbProcGetDigitalConverter(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp) 1618 { 1619 Assert(CODEC_CAD(cmd) == pThis->id); 1620 Assert(CODEC_NID(cmd) < pThis->cTotalNodes); 1621 if (CODEC_NID(cmd) >= pThis->cTotalNodes) 1622 { 1623 Log(("HdaCodec: invalid node address %d\n", CODEC_NID(cmd))); 1624 return VINF_SUCCESS; 1625 } 1626 *pResp = 0; 1627 if (hdaCodecIsSpdifOutNode(pThis, CODEC_NID(cmd))) 1628 *pResp = pThis->paNodes[CODEC_NID(cmd)].spdifout.u32F0d_param; 1629 else if (hdaCodecIsSpdifInNode(pThis, CODEC_NID(cmd))) 1630 *pResp = pThis->paNodes[CODEC_NID(cmd)].spdifin.u32F0d_param; 1631 return VINF_SUCCESS; 1632 } 1633 1634 static int codecSetDigitalConverter(PHDACODEC pThis, uint32_t cmd, uint8_t u8Offset, uint64_t *pResp) 1635 { 1636 Assert(CODEC_CAD(cmd) == pThis->id); 1637 Assert(CODEC_NID(cmd) < pThis->cTotalNodes); 1638 if (CODEC_NID(cmd) >= pThis->cTotalNodes) 1639 { 1640 Log(("HdaCodec: invalid node address %d\n", CODEC_NID(cmd))); 1641 return VINF_SUCCESS; 1642 } 1643 *pResp = 0; 1644 if (hdaCodecIsSpdifOutNode(pThis, CODEC_NID(cmd))) 1645 hdaCodecSetRegisterU8(&pThis->paNodes[CODEC_NID(cmd)].spdifout.u32F0d_param, cmd, u8Offset); 1646 else if (hdaCodecIsSpdifInNode(pThis, CODEC_NID(cmd))) 1647 hdaCodecSetRegisterU8(&pThis->paNodes[CODEC_NID(cmd)].spdifin.u32F0d_param, cmd, u8Offset); 1209 1648 return VINF_SUCCESS; 1210 1649 } 1211 1650 1212 1651 /* 70D */ 1213 static DECLCALLBACK(int) vrbProcSetDigitalConverter1(PHDACODEC p State, uint32_t cmd, uint64_t *pResp)1214 { 1215 return codecSetDigitalConverter(p State, cmd, 0, pResp);1652 static DECLCALLBACK(int) vrbProcSetDigitalConverter1(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp) 1653 { 1654 return codecSetDigitalConverter(pThis, cmd, 0, pResp); 1216 1655 } 1217 1656 1218 1657 /* 70E */ 1219 static DECLCALLBACK(int) vrbProcSetDigitalConverter2(PHDACODEC p State, uint32_t cmd, uint64_t *pResp)1220 { 1221 return codecSetDigitalConverter(p State, cmd, 8, pResp);1658 static DECLCALLBACK(int) vrbProcSetDigitalConverter2(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp) 1659 { 1660 return codecSetDigitalConverter(pThis, cmd, 8, pResp); 1222 1661 } 1223 1662 1224 1663 /* F20 */ 1225 static DECLCALLBACK(int) vrbProcGetSubId(PHDACODEC pState, uint32_t cmd, uint64_t *pResp) 1226 { 1227 Assert((CODEC_CAD(cmd) == pState->id)); 1228 Assert((CODEC_NID(cmd) < pState->cTotalNodes)); 1229 if (CODEC_NID(cmd) >= pState->cTotalNodes) 1230 { 1231 Log(("HdaCodec: invalid node address %d\n", CODEC_NID(cmd))); 1232 return VINF_SUCCESS; 1233 } 1234 *pResp = 0; 1664 static DECLCALLBACK(int) vrbProcGetSubId(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp) 1665 { 1666 Assert(CODEC_CAD(cmd) == pThis->id); 1667 Assert(CODEC_NID(cmd) < pThis->cTotalNodes); 1668 if (CODEC_NID(cmd) >= pThis->cTotalNodes) 1669 { 1670 Log(("HdaCodec: invalid node address %d\n", CODEC_NID(cmd))); 1671 return VINF_SUCCESS; 1672 } 1235 1673 if (CODEC_NID(cmd) == 1 /* AFG */) 1236 {1237 *pResp = pState->paNodes[CODEC_NID(cmd)].afg.u32F20_param;1238 }1239 return VINF_SUCCESS; 1240 } 1241 1242 static int codecSetSubIdX(PHDACODEC p State, uint32_t cmd, uint8_t u8Offset)1243 { 1244 Assert( (CODEC_CAD(cmd) == pState->id));1245 Assert( (CODEC_NID(cmd) < pState->cTotalNodes));1246 if (CODEC_NID(cmd) >= p State->cTotalNodes)1247 { 1248 Log(("HdaCodec: invalid node address %d\n", CODEC_NID(cmd))); 1249 return VINF_SUCCESS; 1250 } 1251 uint32_t *pu32Reg = NULL;1674 *pResp = pThis->paNodes[CODEC_NID(cmd)].afg.u32F20_param; 1675 else 1676 *pResp = 0; 1677 return VINF_SUCCESS; 1678 } 1679 1680 static int codecSetSubIdX(PHDACODEC pThis, uint32_t cmd, uint8_t u8Offset) 1681 { 1682 Assert(CODEC_CAD(cmd) == pThis->id); 1683 Assert(CODEC_NID(cmd) < pThis->cTotalNodes); 1684 if (CODEC_NID(cmd) >= pThis->cTotalNodes) 1685 { 1686 Log(("HdaCodec: invalid node address %d\n", CODEC_NID(cmd))); 1687 return VINF_SUCCESS; 1688 } 1689 uint32_t *pu32Reg; 1252 1690 if (CODEC_NID(cmd) == 0x1 /* AFG */) 1253 pu32Reg = &p State->paNodes[CODEC_NID(cmd)].afg.u32F20_param;1254 Assert((pu32Reg));1255 if (pu32Reg)1256 1691 pu32Reg = &pThis->paNodes[CODEC_NID(cmd)].afg.u32F20_param; 1692 else 1693 AssertFailedReturn(VINF_SUCCESS); 1694 hdaCodecSetRegisterU8(pu32Reg, cmd, u8Offset); 1257 1695 return VINF_SUCCESS; 1258 1696 } 1259 1697 1260 1698 /* 720 */ 1261 static DECLCALLBACK(int) vrbProcSetSubId0(PHDACODEC p State, uint32_t cmd, uint64_t *pResp)1262 { 1263 *pResp = 0; 1264 return codecSetSubIdX(p State, cmd, 0);1699 static DECLCALLBACK(int) vrbProcSetSubId0(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp) 1700 { 1701 *pResp = 0; 1702 return codecSetSubIdX(pThis, cmd, 0); 1265 1703 } 1266 1704 1267 1705 /* 721 */ 1268 static DECLCALLBACK(int) vrbProcSetSubId1(PHDACODEC p State, uint32_t cmd, uint64_t *pResp)1269 { 1270 *pResp = 0; 1271 return codecSetSubIdX(p State, cmd, 8);1706 static DECLCALLBACK(int) vrbProcSetSubId1(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp) 1707 { 1708 *pResp = 0; 1709 return codecSetSubIdX(pThis, cmd, 8); 1272 1710 } 1273 1711 1274 1712 /* 722 */ 1275 static DECLCALLBACK(int) vrbProcSetSubId2(PHDACODEC p State, uint32_t cmd, uint64_t *pResp)1276 { 1277 *pResp = 0; 1278 return codecSetSubIdX(p State, cmd, 16);1713 static DECLCALLBACK(int) vrbProcSetSubId2(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp) 1714 { 1715 *pResp = 0; 1716 return codecSetSubIdX(pThis, cmd, 16); 1279 1717 } 1280 1718 1281 1719 /* 723 */ 1282 static DECLCALLBACK(int) vrbProcSetSubId3(PHDACODEC p State, uint32_t cmd, uint64_t *pResp)1283 { 1284 *pResp = 0; 1285 return codecSetSubIdX(p State, cmd, 24);1286 } 1287 1288 static DECLCALLBACK(int) vrbProcReset(PHDACODEC p State, uint32_t cmd, uint64_t *pResp)1289 { 1290 Assert( (CODEC_CAD(cmd) == pState->id));1720 static DECLCALLBACK(int) vrbProcSetSubId3(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp) 1721 { 1722 *pResp = 0; 1723 return codecSetSubIdX(pThis, cmd, 24); 1724 } 1725 1726 static DECLCALLBACK(int) vrbProcReset(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp) 1727 { 1728 Assert(CODEC_CAD(cmd) == pThis->id); 1291 1729 Assert(CODEC_NID(cmd) == 1 /* AFG */); 1292 if ( CODEC_NID(cmd) == 1 /* AFG */1293 && pState->pfnCodecNodeReset)1730 if ( CODEC_NID(cmd) == 1 /* AFG */ 1731 && pThis->pfnCodecNodeReset) 1294 1732 { 1295 1733 uint8_t i; 1296 1734 Log(("HdaCodec: enters reset\n")); 1297 Assert(p State->pfnCodecNodeReset);1298 for (i = 0; i < p State->cTotalNodes; ++i)1735 Assert(pThis->pfnCodecNodeReset); 1736 for (i = 0; i < pThis->cTotalNodes; ++i) 1299 1737 { 1300 p State->pfnCodecNodeReset(pState, i, &pState->paNodes[i]);1738 pThis->pfnCodecNodeReset(pThis, i, &pThis->paNodes[i]); 1301 1739 } 1302 p State->fInReset = false;1740 pThis->fInReset = false; 1303 1741 Log(("HdaCodec: exits reset\n")); 1304 1742 } … … 1308 1746 1309 1747 /* F05 */ 1310 static DECLCALLBACK(int) vrbProcGetPowerState(PHDACODEC p State, uint32_t cmd, uint64_t *pResp)1311 { 1312 Assert( (CODEC_CAD(cmd) == pState->id));1313 Assert( (CODEC_NID(cmd) < pState->cTotalNodes));1314 if (CODEC_NID(cmd) >= p State->cTotalNodes)1748 static DECLCALLBACK(int) vrbProcGetPowerState(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp) 1749 { 1750 Assert(CODEC_CAD(cmd) == pThis->id); 1751 Assert(CODEC_NID(cmd) < pThis->cTotalNodes); 1752 if (CODEC_NID(cmd) >= pThis->cTotalNodes) 1315 1753 { 1316 1754 Log(("HdaCodec: invalid node address %d\n", CODEC_NID(cmd))); … … 1319 1757 *pResp = 0; 1320 1758 if (CODEC_NID(cmd) == 1 /* AFG */) 1321 *pResp = p State->paNodes[CODEC_NID(cmd)].afg.u32F05_param;1322 else if (hdaCodecIsDacNode(p State, CODEC_NID(cmd)))1323 *pResp = p State->paNodes[CODEC_NID(cmd)].dac.u32F05_param;1324 else if (hdaCodecIsDigInPinNode(p State, CODEC_NID(cmd)))1325 *pResp = p State->paNodes[CODEC_NID(cmd)].digin.u32F05_param;1326 else if (hdaCodecIsAdcNode(p State, CODEC_NID(cmd)))1327 *pResp = p State->paNodes[CODEC_NID(cmd)].adc.u32F05_param;1328 else if (hdaCodecIsSpdifOutNode(p State, CODEC_NID(cmd)))1329 *pResp = p State->paNodes[CODEC_NID(cmd)].spdifout.u32F05_param;1330 else if (hdaCodecIsSpdifInNode(p State, CODEC_NID(cmd)))1331 *pResp = p State->paNodes[CODEC_NID(cmd)].spdifin.u32F05_param;1332 else if (hdaCodecIsReservedNode(p State, CODEC_NID(cmd)))1333 *pResp = p State->paNodes[CODEC_NID(cmd)].reserved.u32F05_param;1759 *pResp = pThis->paNodes[CODEC_NID(cmd)].afg.u32F05_param; 1760 else if (hdaCodecIsDacNode(pThis, CODEC_NID(cmd))) 1761 *pResp = pThis->paNodes[CODEC_NID(cmd)].dac.u32F05_param; 1762 else if (hdaCodecIsDigInPinNode(pThis, CODEC_NID(cmd))) 1763 *pResp = pThis->paNodes[CODEC_NID(cmd)].digin.u32F05_param; 1764 else if (hdaCodecIsAdcNode(pThis, CODEC_NID(cmd))) 1765 *pResp = pThis->paNodes[CODEC_NID(cmd)].adc.u32F05_param; 1766 else if (hdaCodecIsSpdifOutNode(pThis, CODEC_NID(cmd))) 1767 *pResp = pThis->paNodes[CODEC_NID(cmd)].spdifout.u32F05_param; 1768 else if (hdaCodecIsSpdifInNode(pThis, CODEC_NID(cmd))) 1769 *pResp = pThis->paNodes[CODEC_NID(cmd)].spdifin.u32F05_param; 1770 else if (hdaCodecIsReservedNode(pThis, CODEC_NID(cmd))) 1771 *pResp = pThis->paNodes[CODEC_NID(cmd)].reserved.u32F05_param; 1334 1772 return VINF_SUCCESS; 1335 1773 } … … 1348 1786 } 1349 1787 1350 static DECLCALLBACK(int) vrbProcSetPowerState(PHDACODEC p State, uint32_t cmd, uint64_t *pResp)1351 { 1352 Assert( (CODEC_CAD(cmd) == pState->id));1353 Assert( (CODEC_NID(cmd) < pState->cTotalNodes));1354 if (CODEC_NID(cmd) >= p State->cTotalNodes)1355 { 1356 Log(("HdaCodec: invalid node address %d\n", CODEC_NID(cmd))); 1357 return VINF_SUCCESS; 1358 } 1359 uint32_t *pu32Reg = NULL;1360 *pResp = 0;1788 static DECLCALLBACK(int) vrbProcSetPowerState(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp) 1789 { 1790 Assert(CODEC_CAD(cmd) == pThis->id); 1791 Assert(CODEC_NID(cmd) < pThis->cTotalNodes); 1792 if (CODEC_NID(cmd) >= pThis->cTotalNodes) 1793 { 1794 Log(("HdaCodec: invalid node address %d\n", CODEC_NID(cmd))); 1795 return VINF_SUCCESS; 1796 } 1797 *pResp = 0; 1798 uint32_t *pu32Reg; 1361 1799 if (CODEC_NID(cmd) == 1 /* AFG */) 1362 pu32Reg = &pState->paNodes[CODEC_NID(cmd)].afg.u32F05_param; 1363 else if (hdaCodecIsDacNode(pState, CODEC_NID(cmd))) 1364 pu32Reg = &pState->paNodes[CODEC_NID(cmd)].dac.u32F05_param; 1365 else if (hdaCodecIsDigInPinNode(pState, CODEC_NID(cmd))) 1366 pu32Reg = &pState->paNodes[CODEC_NID(cmd)].digin.u32F05_param; 1367 else if (hdaCodecIsAdcNode(pState, CODEC_NID(cmd))) 1368 pu32Reg = &pState->paNodes[CODEC_NID(cmd)].adc.u32F05_param; 1369 else if (hdaCodecIsSpdifOutNode(pState, CODEC_NID(cmd))) 1370 pu32Reg = &pState->paNodes[CODEC_NID(cmd)].spdifout.u32F05_param; 1371 else if (hdaCodecIsSpdifInNode(pState, CODEC_NID(cmd))) 1372 pu32Reg = &pState->paNodes[CODEC_NID(cmd)].spdifin.u32F05_param; 1373 else if (hdaCodecIsReservedNode(pState, CODEC_NID(cmd))) 1374 pu32Reg = &pState->paNodes[CODEC_NID(cmd)].reserved.u32F05_param; 1375 Assert((pu32Reg)); 1376 if (!pu32Reg) 1377 return VINF_SUCCESS; 1800 pu32Reg = &pThis->paNodes[CODEC_NID(cmd)].afg.u32F05_param; 1801 else if (hdaCodecIsDacNode(pThis, CODEC_NID(cmd))) 1802 pu32Reg = &pThis->paNodes[CODEC_NID(cmd)].dac.u32F05_param; 1803 else if (hdaCodecIsDigInPinNode(pThis, CODEC_NID(cmd))) 1804 pu32Reg = &pThis->paNodes[CODEC_NID(cmd)].digin.u32F05_param; 1805 else if (hdaCodecIsAdcNode(pThis, CODEC_NID(cmd))) 1806 pu32Reg = &pThis->paNodes[CODEC_NID(cmd)].adc.u32F05_param; 1807 else if (hdaCodecIsSpdifOutNode(pThis, CODEC_NID(cmd))) 1808 pu32Reg = &pThis->paNodes[CODEC_NID(cmd)].spdifout.u32F05_param; 1809 else if (hdaCodecIsSpdifInNode(pThis, CODEC_NID(cmd))) 1810 pu32Reg = &pThis->paNodes[CODEC_NID(cmd)].spdifin.u32F05_param; 1811 else if (hdaCodecIsReservedNode(pThis, CODEC_NID(cmd))) 1812 pu32Reg = &pThis->paNodes[CODEC_NID(cmd)].reserved.u32F05_param; 1813 else 1814 AssertFailedReturn(VINF_SUCCESS); 1378 1815 1379 1816 bool fReset = CODEC_F05_IS_RESET(*pu32Reg); … … 1386 1823 */ 1387 1824 *pu32Reg = CODEC_MAKE_F05(fReset, fStopOk, 0, 1388 CODEC_F05_ACT(p State->paNodes[1].afg.u32F05_param),1825 CODEC_F05_ACT(pThis->paNodes[1].afg.u32F05_param), 1389 1826 CODEC_F05_SET(cmd)); 1390 1827 } … … 1392 1829 /* Propagate next power state only if AFG is on or verb modifies AFG power state */ 1393 1830 if ( CODEC_NID(cmd) == 1 /* AFG */ 1394 || !CODEC_F05_ACT(p State->paNodes[1].afg.u32F05_param))1831 || !CODEC_F05_ACT(pThis->paNodes[1].afg.u32F05_param)) 1395 1832 { 1396 1833 *pu32Reg = CODEC_MAKE_F05(fReset, fStopOk, 0, CODEC_F05_SET(cmd), CODEC_F05_SET(cmd)); … … 1399 1836 { 1400 1837 /* now we're powered on AFG and may propogate power states on nodes */ 1401 const uint8_t *pu8NodeIndex = &p State->au8Dacs[0];1838 const uint8_t *pu8NodeIndex = &pThis->au8Dacs[0]; 1402 1839 while (*(++pu8NodeIndex)) 1403 codecPropogatePowerState(&p State->paNodes[*pu8NodeIndex].dac.u32F05_param);1404 1405 pu8NodeIndex = &p State->au8Adcs[0];1840 codecPropogatePowerState(&pThis->paNodes[*pu8NodeIndex].dac.u32F05_param); 1841 1842 pu8NodeIndex = &pThis->au8Adcs[0]; 1406 1843 while (*(++pu8NodeIndex)) 1407 codecPropogatePowerState(&p State->paNodes[*pu8NodeIndex].adc.u32F05_param);1408 1409 pu8NodeIndex = &p State->au8DigInPins[0];1844 codecPropogatePowerState(&pThis->paNodes[*pu8NodeIndex].adc.u32F05_param); 1845 1846 pu8NodeIndex = &pThis->au8DigInPins[0]; 1410 1847 while (*(++pu8NodeIndex)) 1411 codecPropogatePowerState(&p State->paNodes[*pu8NodeIndex].digin.u32F05_param);1848 codecPropogatePowerState(&pThis->paNodes[*pu8NodeIndex].digin.u32F05_param); 1412 1849 } 1413 1850 } … … 1415 1852 } 1416 1853 1417 static DECLCALLBACK(int) vrbProcGetStreamId(PHDACODEC p State, uint32_t cmd, uint64_t *pResp)1418 { 1419 Assert( (CODEC_CAD(cmd) == pState->id));1420 Assert( (CODEC_NID(cmd) < pState->cTotalNodes));1421 if (CODEC_NID(cmd) >= p State->cTotalNodes)1422 { 1423 Log(("HdaCodec: invalid node address %d\n", CODEC_NID(cmd))); 1424 return VINF_SUCCESS; 1425 } 1426 *pResp = 0; 1427 if (hdaCodecIsDacNode(p State, CODEC_NID(cmd)))1428 *pResp = p State->paNodes[CODEC_NID(cmd)].dac.u32F06_param;1429 else if (hdaCodecIsAdcNode(p State, CODEC_NID(cmd)))1430 *pResp = p State->paNodes[CODEC_NID(cmd)].adc.u32F06_param;1431 else if (hdaCodecIsSpdifInNode(p State, CODEC_NID(cmd)))1432 *pResp = p State->paNodes[CODEC_NID(cmd)].spdifin.u32F06_param;1433 else if (hdaCodecIsSpdifOutNode(p State, CODEC_NID(cmd)))1434 *pResp = p State->paNodes[CODEC_NID(cmd)].spdifout.u32F06_param;1854 static DECLCALLBACK(int) vrbProcGetStreamId(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp) 1855 { 1856 Assert(CODEC_CAD(cmd) == pThis->id); 1857 Assert(CODEC_NID(cmd) < pThis->cTotalNodes); 1858 if (CODEC_NID(cmd) >= pThis->cTotalNodes) 1859 { 1860 Log(("HdaCodec: invalid node address %d\n", CODEC_NID(cmd))); 1861 return VINF_SUCCESS; 1862 } 1863 *pResp = 0; 1864 if (hdaCodecIsDacNode(pThis, CODEC_NID(cmd))) 1865 *pResp = pThis->paNodes[CODEC_NID(cmd)].dac.u32F06_param; 1866 else if (hdaCodecIsAdcNode(pThis, CODEC_NID(cmd))) 1867 *pResp = pThis->paNodes[CODEC_NID(cmd)].adc.u32F06_param; 1868 else if (hdaCodecIsSpdifInNode(pThis, CODEC_NID(cmd))) 1869 *pResp = pThis->paNodes[CODEC_NID(cmd)].spdifin.u32F06_param; 1870 else if (hdaCodecIsSpdifOutNode(pThis, CODEC_NID(cmd))) 1871 *pResp = pThis->paNodes[CODEC_NID(cmd)].spdifout.u32F06_param; 1435 1872 else if (CODEC_NID(cmd) == 0x1A) 1436 *pResp = pState->paNodes[CODEC_NID(cmd)].reserved.u32F06_param; 1437 return VINF_SUCCESS; 1438 } 1439 1440 static DECLCALLBACK(int) vrbProcSetStreamId(PHDACODEC pState, uint32_t cmd, uint64_t *pResp) 1441 { 1442 Assert((CODEC_CAD(cmd) == pState->id)); 1443 Assert((CODEC_NID(cmd) < pState->cTotalNodes)); 1444 if (CODEC_NID(cmd) >= pState->cTotalNodes) 1445 { 1446 Log(("HdaCodec: invalid node address %d\n", CODEC_NID(cmd))); 1447 return VINF_SUCCESS; 1448 } 1449 *pResp = 0; 1450 uint32_t *pu32addr = NULL; 1451 *pResp = 0; 1452 if (hdaCodecIsDacNode(pState, CODEC_NID(cmd))) 1453 pu32addr = &pState->paNodes[CODEC_NID(cmd)].dac.u32F06_param; 1454 else if (hdaCodecIsAdcNode(pState, CODEC_NID(cmd))) 1455 pu32addr = &pState->paNodes[CODEC_NID(cmd)].adc.u32F06_param; 1456 else if (hdaCodecIsSpdifOutNode(pState, CODEC_NID(cmd))) 1457 pu32addr = &pState->paNodes[CODEC_NID(cmd)].spdifout.u32F06_param; 1458 else if (hdaCodecIsSpdifInNode(pState, CODEC_NID(cmd))) 1459 pu32addr = &pState->paNodes[CODEC_NID(cmd)].spdifin.u32F06_param; 1460 else if (hdaCodecIsReservedNode(pState, CODEC_NID(cmd))) 1461 pu32addr = &pState->paNodes[CODEC_NID(cmd)].reserved.u32F06_param; 1462 Assert((pu32addr)); 1463 if (pu32addr) 1464 hdaCodecSetRegisterU8(pu32addr, cmd, 0); 1465 return VINF_SUCCESS; 1466 } 1467 1468 static DECLCALLBACK(int) vrbProcGetConverterFormat(PHDACODEC pState, uint32_t cmd, uint64_t *pResp) 1469 { 1470 Assert((CODEC_CAD(cmd) == pState->id)); 1471 Assert((CODEC_NID(cmd) < pState->cTotalNodes)); 1472 if (CODEC_NID(cmd) >= pState->cTotalNodes) 1473 { 1474 Log(("HdaCodec: invalid node address %d\n", CODEC_NID(cmd))); 1475 return VINF_SUCCESS; 1476 } 1477 *pResp = 0; 1478 if (hdaCodecIsDacNode(pState, CODEC_NID(cmd))) 1479 *pResp = pState->paNodes[CODEC_NID(cmd)].dac.u32A_param; 1480 else if (hdaCodecIsAdcNode(pState, CODEC_NID(cmd))) 1481 *pResp = pState->paNodes[CODEC_NID(cmd)].adc.u32A_param; 1482 else if (hdaCodecIsSpdifOutNode(pState, CODEC_NID(cmd))) 1483 *pResp = pState->paNodes[CODEC_NID(cmd)].spdifout.u32A_param; 1484 else if (hdaCodecIsSpdifInNode(pState, CODEC_NID(cmd))) 1485 *pResp = pState->paNodes[CODEC_NID(cmd)].spdifin.u32A_param; 1486 return VINF_SUCCESS; 1487 } 1488 1489 static DECLCALLBACK(int) vrbProcSetConverterFormat(PHDACODEC pState, uint32_t cmd, uint64_t *pResp) 1490 { 1491 Assert((CODEC_CAD(cmd) == pState->id)); 1492 Assert((CODEC_NID(cmd) < pState->cTotalNodes)); 1493 if (CODEC_NID(cmd) >= pState->cTotalNodes) 1494 { 1495 Log(("HdaCodec: invalid node address %d\n", CODEC_NID(cmd))); 1496 return VINF_SUCCESS; 1497 } 1498 *pResp = 0; 1499 if (hdaCodecIsDacNode(pState, CODEC_NID(cmd))) 1500 hdaCodecSetRegisterU16(&pState->paNodes[CODEC_NID(cmd)].dac.u32A_param, cmd, 0); 1501 else if (hdaCodecIsAdcNode(pState, CODEC_NID(cmd))) 1502 hdaCodecSetRegisterU16(&pState->paNodes[CODEC_NID(cmd)].adc.u32A_param, cmd, 0); 1503 else if (hdaCodecIsSpdifOutNode(pState, CODEC_NID(cmd))) 1504 hdaCodecSetRegisterU16(&pState->paNodes[CODEC_NID(cmd)].spdifout.u32A_param, cmd, 0); 1505 else if (hdaCodecIsSpdifInNode(pState, CODEC_NID(cmd))) 1506 hdaCodecSetRegisterU16(&pState->paNodes[CODEC_NID(cmd)].spdifin.u32A_param, cmd, 0); 1873 *pResp = pThis->paNodes[CODEC_NID(cmd)].reserved.u32F06_param; 1874 return VINF_SUCCESS; 1875 } 1876 1877 static DECLCALLBACK(int) vrbProcSetStreamId(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp) 1878 { 1879 Assert(CODEC_CAD(cmd) == pThis->id); 1880 Assert(CODEC_NID(cmd) < pThis->cTotalNodes); 1881 if (CODEC_NID(cmd) >= pThis->cTotalNodes) 1882 { 1883 Log(("HdaCodec: invalid node address %d\n", CODEC_NID(cmd))); 1884 return VINF_SUCCESS; 1885 } 1886 *pResp = 0; 1887 uint32_t *pu32addr; 1888 if (hdaCodecIsDacNode(pThis, CODEC_NID(cmd))) 1889 pu32addr = &pThis->paNodes[CODEC_NID(cmd)].dac.u32F06_param; 1890 else if (hdaCodecIsAdcNode(pThis, CODEC_NID(cmd))) 1891 pu32addr = &pThis->paNodes[CODEC_NID(cmd)].adc.u32F06_param; 1892 else if (hdaCodecIsSpdifOutNode(pThis, CODEC_NID(cmd))) 1893 pu32addr = &pThis->paNodes[CODEC_NID(cmd)].spdifout.u32F06_param; 1894 else if (hdaCodecIsSpdifInNode(pThis, CODEC_NID(cmd))) 1895 pu32addr = &pThis->paNodes[CODEC_NID(cmd)].spdifin.u32F06_param; 1896 else if (hdaCodecIsReservedNode(pThis, CODEC_NID(cmd))) 1897 pu32addr = &pThis->paNodes[CODEC_NID(cmd)].reserved.u32F06_param; 1898 else 1899 AssertFailedReturn(VINF_SUCCESS); 1900 hdaCodecSetRegisterU8(pu32addr, cmd, 0); 1901 return VINF_SUCCESS; 1902 } 1903 1904 static DECLCALLBACK(int) vrbProcGetConverterFormat(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp) 1905 { 1906 Assert(CODEC_CAD(cmd) == pThis->id); 1907 Assert(CODEC_NID(cmd) < pThis->cTotalNodes); 1908 if (CODEC_NID(cmd) >= pThis->cTotalNodes) 1909 { 1910 Log(("HdaCodec: invalid node address %d\n", CODEC_NID(cmd))); 1911 return VINF_SUCCESS; 1912 } 1913 *pResp = 0; 1914 if (hdaCodecIsDacNode(pThis, CODEC_NID(cmd))) 1915 *pResp = pThis->paNodes[CODEC_NID(cmd)].dac.u32A_param; 1916 else if (hdaCodecIsAdcNode(pThis, CODEC_NID(cmd))) 1917 *pResp = pThis->paNodes[CODEC_NID(cmd)].adc.u32A_param; 1918 else if (hdaCodecIsSpdifOutNode(pThis, CODEC_NID(cmd))) 1919 *pResp = pThis->paNodes[CODEC_NID(cmd)].spdifout.u32A_param; 1920 else if (hdaCodecIsSpdifInNode(pThis, CODEC_NID(cmd))) 1921 *pResp = pThis->paNodes[CODEC_NID(cmd)].spdifin.u32A_param; 1922 return VINF_SUCCESS; 1923 } 1924 1925 static DECLCALLBACK(int) vrbProcSetConverterFormat(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp) 1926 { 1927 Assert(CODEC_CAD(cmd) == pThis->id); 1928 Assert(CODEC_NID(cmd) < pThis->cTotalNodes); 1929 if (CODEC_NID(cmd) >= pThis->cTotalNodes) 1930 { 1931 Log(("HdaCodec: invalid node address %d\n", CODEC_NID(cmd))); 1932 return VINF_SUCCESS; 1933 } 1934 *pResp = 0; 1935 if (hdaCodecIsDacNode(pThis, CODEC_NID(cmd))) 1936 hdaCodecSetRegisterU16(&pThis->paNodes[CODEC_NID(cmd)].dac.u32A_param, cmd, 0); 1937 else if (hdaCodecIsAdcNode(pThis, CODEC_NID(cmd))) 1938 hdaCodecSetRegisterU16(&pThis->paNodes[CODEC_NID(cmd)].adc.u32A_param, cmd, 0); 1939 else if (hdaCodecIsSpdifOutNode(pThis, CODEC_NID(cmd))) 1940 hdaCodecSetRegisterU16(&pThis->paNodes[CODEC_NID(cmd)].spdifout.u32A_param, cmd, 0); 1941 else if (hdaCodecIsSpdifInNode(pThis, CODEC_NID(cmd))) 1942 hdaCodecSetRegisterU16(&pThis->paNodes[CODEC_NID(cmd)].spdifin.u32A_param, cmd, 0); 1507 1943 return VINF_SUCCESS; 1508 1944 } 1509 1945 1510 1946 /* F0C */ 1511 static DECLCALLBACK(int) vrbProcGetEAPD_BTLEnabled(PHDACODEC p State, uint32_t cmd, uint64_t *pResp)1512 { 1513 Assert( (CODEC_CAD(cmd) == pState->id));1514 Assert( (CODEC_NID(cmd) < pState->cTotalNodes));1515 if (CODEC_NID(cmd) >= p State->cTotalNodes)1516 { 1517 Log(("HdaCodec: invalid node address %d\n", CODEC_NID(cmd))); 1518 return VINF_SUCCESS; 1519 } 1520 *pResp = 0; 1521 if (hdaCodecIsAdcVolNode(p State, CODEC_NID(cmd)))1522 *pResp = p State->paNodes[CODEC_NID(cmd)].adcvol.u32F0c_param;1523 else if (hdaCodecIsDacNode(p State, CODEC_NID(cmd)))1524 *pResp = p State->paNodes[CODEC_NID(cmd)].dac.u32F0c_param;1525 else if (hdaCodecIsDigInPinNode(p State, CODEC_NID(cmd)))1526 *pResp = p State->paNodes[CODEC_NID(cmd)].digin.u32F0c_param;1947 static DECLCALLBACK(int) vrbProcGetEAPD_BTLEnabled(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp) 1948 { 1949 Assert(CODEC_CAD(cmd) == pThis->id); 1950 Assert(CODEC_NID(cmd) < pThis->cTotalNodes); 1951 if (CODEC_NID(cmd) >= pThis->cTotalNodes) 1952 { 1953 Log(("HdaCodec: invalid node address %d\n", CODEC_NID(cmd))); 1954 return VINF_SUCCESS; 1955 } 1956 *pResp = 0; 1957 if (hdaCodecIsAdcVolNode(pThis, CODEC_NID(cmd))) 1958 *pResp = pThis->paNodes[CODEC_NID(cmd)].adcvol.u32F0c_param; 1959 else if (hdaCodecIsDacNode(pThis, CODEC_NID(cmd))) 1960 *pResp = pThis->paNodes[CODEC_NID(cmd)].dac.u32F0c_param; 1961 else if (hdaCodecIsDigInPinNode(pThis, CODEC_NID(cmd))) 1962 *pResp = pThis->paNodes[CODEC_NID(cmd)].digin.u32F0c_param; 1527 1963 return VINF_SUCCESS; 1528 1964 } 1529 1965 1530 1966 /* 70C */ 1531 static DECLCALLBACK(int) vrbProcSetEAPD_BTLEnabled(PHDACODEC pState, uint32_t cmd, uint64_t *pResp) 1532 { 1533 Assert((CODEC_CAD(cmd) == pState->id)); 1534 Assert((CODEC_NID(cmd) < pState->cTotalNodes)); 1535 if (CODEC_NID(cmd) >= pState->cTotalNodes) 1536 { 1537 Log(("HdaCodec: invalid node address %d\n", CODEC_NID(cmd))); 1538 return VINF_SUCCESS; 1539 } 1540 *pResp = 0; 1967 static DECLCALLBACK(int) vrbProcSetEAPD_BTLEnabled(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp) 1968 { 1969 Assert(CODEC_CAD(cmd) == pThis->id); 1970 Assert(CODEC_NID(cmd) < pThis->cTotalNodes); 1971 if (CODEC_NID(cmd) >= pThis->cTotalNodes) 1972 { 1973 Log(("HdaCodec: invalid node address %d\n", CODEC_NID(cmd))); 1974 return VINF_SUCCESS; 1975 } 1976 1977 *pResp = 0; 1978 uint32_t *pu32Reg; 1979 if (hdaCodecIsAdcVolNode(pThis, CODEC_NID(cmd))) 1980 pu32Reg = &pThis->paNodes[CODEC_NID(cmd)].adcvol.u32F0c_param; 1981 else if (hdaCodecIsDacNode(pThis, CODEC_NID(cmd))) 1982 pu32Reg = &pThis->paNodes[CODEC_NID(cmd)].dac.u32F0c_param; 1983 else if (hdaCodecIsDigInPinNode(pThis, CODEC_NID(cmd))) 1984 pu32Reg = &pThis->paNodes[CODEC_NID(cmd)].digin.u32F0c_param; 1985 else 1986 AssertFailedReturn(VINF_SUCCESS); 1987 hdaCodecSetRegisterU8(pu32Reg, cmd, 0); 1988 1989 return VINF_SUCCESS; 1990 } 1991 1992 /* F0F */ 1993 static DECLCALLBACK(int) vrbProcGetVolumeKnobCtrl(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp) 1994 { 1995 Assert(CODEC_CAD(cmd) == pThis->id); 1996 Assert(CODEC_NID(cmd) < pThis->cTotalNodes); 1997 if (CODEC_NID(cmd) >= pThis->cTotalNodes) 1998 { 1999 Log(("HdaCodec: invalid node address %d\n", CODEC_NID(cmd))); 2000 return VINF_SUCCESS; 2001 } 2002 *pResp = 0; 2003 if (hdaCodecIsVolKnobNode(pThis, CODEC_NID(cmd))) 2004 *pResp = pThis->paNodes[CODEC_NID(cmd)].volumeKnob.u32F0f_param; 2005 return VINF_SUCCESS; 2006 } 2007 2008 /* 70F */ 2009 static DECLCALLBACK(int) vrbProcSetVolumeKnobCtrl(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp) 2010 { 2011 Assert(CODEC_CAD(cmd) == pThis->id); 2012 Assert(CODEC_NID(cmd) < pThis->cTotalNodes); 2013 if (CODEC_NID(cmd) >= pThis->cTotalNodes) 2014 { 2015 Log(("HdaCodec: invalid node address %d\n", CODEC_NID(cmd))); 2016 return VINF_SUCCESS; 2017 } 1541 2018 uint32_t *pu32Reg = NULL; 1542 if (hdaCodecIsAdcVolNode(pState, CODEC_NID(cmd))) 1543 pu32Reg = &pState->paNodes[CODEC_NID(cmd)].adcvol.u32F0c_param; 1544 else if (hdaCodecIsDacNode(pState, CODEC_NID(cmd))) 1545 pu32Reg = &pState->paNodes[CODEC_NID(cmd)].dac.u32F0c_param; 1546 else if (hdaCodecIsDigInPinNode(pState, CODEC_NID(cmd))) 1547 pu32Reg = &pState->paNodes[CODEC_NID(cmd)].digin.u32F0c_param; 1548 *pResp = 0; 1549 Assert((pu32Reg)); 2019 *pResp = 0; 2020 if (hdaCodecIsVolKnobNode(pThis, CODEC_NID(cmd))) 2021 pu32Reg = &pThis->paNodes[CODEC_NID(cmd)].volumeKnob.u32F0f_param; 2022 Assert(pu32Reg); 1550 2023 if (pu32Reg) 1551 2024 hdaCodecSetRegisterU8(pu32Reg, cmd, 0); … … 1553 2026 } 1554 2027 1555 /* F0F */ 1556 static DECLCALLBACK(int) vrbProcGetVolumeKnobCtrl(PHDACODEC pState, uint32_t cmd, uint64_t *pResp) 1557 { 1558 Assert((CODEC_CAD(cmd) == pState->id)); 1559 Assert((CODEC_NID(cmd) < pState->cTotalNodes)); 1560 if (CODEC_NID(cmd) >= pState->cTotalNodes) 1561 { 1562 Log(("HdaCodec: invalid node address %d\n", CODEC_NID(cmd))); 1563 return VINF_SUCCESS; 1564 } 1565 *pResp = 0; 1566 if (hdaCodecIsVolKnobNode(pState, CODEC_NID(cmd))) 1567 *pResp = pState->paNodes[CODEC_NID(cmd)].volumeKnob.u32F0f_param; 1568 return VINF_SUCCESS; 1569 } 1570 1571 /* 70F */ 1572 static DECLCALLBACK(int) vrbProcSetVolumeKnobCtrl(PHDACODEC pState, uint32_t cmd, uint64_t *pResp) 1573 { 1574 Assert((CODEC_CAD(cmd) == pState->id)); 1575 Assert((CODEC_NID(cmd) < pState->cTotalNodes)); 1576 if (CODEC_NID(cmd) >= pState->cTotalNodes) 2028 /* F17 */ 2029 static DECLCALLBACK(int) vrbProcGetGPIOUnsolisted(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp) 2030 { 2031 Assert(CODEC_CAD(cmd) == pThis->id); 2032 Assert(CODEC_NID(cmd) < pThis->cTotalNodes); 2033 if (CODEC_NID(cmd) >= pThis->cTotalNodes) 2034 { 2035 Log(("HdaCodec: invalid node address %d\n", CODEC_NID(cmd))); 2036 return VINF_SUCCESS; 2037 } 2038 *pResp = 0; 2039 /* note: this is true for ALC885 */ 2040 if (CODEC_NID(cmd) == 0x1 /* AFG */) 2041 *pResp = pThis->paNodes[1].afg.u32F17_param; 2042 return VINF_SUCCESS; 2043 } 2044 2045 /* 717 */ 2046 static DECLCALLBACK(int) vrbProcSetGPIOUnsolisted(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp) 2047 { 2048 Assert(CODEC_CAD(cmd) == pThis->id); 2049 Assert(CODEC_NID(cmd) < pThis->cTotalNodes); 2050 if (CODEC_NID(cmd) >= pThis->cTotalNodes) 1577 2051 { 1578 2052 Log(("HdaCodec: invalid node address %d\n", CODEC_NID(cmd))); … … 1581 2055 uint32_t *pu32Reg = NULL; 1582 2056 *pResp = 0; 1583 if ( hdaCodecIsVolKnobNode(pState, CODEC_NID(cmd)))1584 pu32Reg = &p State->paNodes[CODEC_NID(cmd)].volumeKnob.u32F0f_param;1585 Assert( (pu32Reg));2057 if (CODEC_NID(cmd) == 1 /* AFG */) 2058 pu32Reg = &pThis->paNodes[1].afg.u32F17_param; 2059 Assert(pu32Reg); 1586 2060 if (pu32Reg) 1587 2061 hdaCodecSetRegisterU8(pu32Reg, cmd, 0); … … 1589 2063 } 1590 2064 1591 /* F17 */ 1592 static DECLCALLBACK(int) vrbProcGetGPIOUnsolisted(PHDACODEC pState, uint32_t cmd, uint64_t *pResp) 1593 { 1594 Assert((CODEC_CAD(cmd) == pState->id)); 1595 Assert((CODEC_NID(cmd) < pState->cTotalNodes)); 1596 if (CODEC_NID(cmd) >= pState->cTotalNodes) 1597 { 1598 Log(("HdaCodec: invalid node address %d\n", CODEC_NID(cmd))); 1599 return VINF_SUCCESS; 1600 } 1601 *pResp = 0; 1602 /* note: this is true for ALC885 */ 1603 if (CODEC_NID(cmd) == 0x1 /* AFG */) 1604 *pResp = pState->paNodes[1].afg.u32F17_param; 1605 return VINF_SUCCESS; 1606 } 1607 1608 /* 717 */ 1609 static DECLCALLBACK(int) vrbProcSetGPIOUnsolisted(PHDACODEC pState, uint32_t cmd, uint64_t *pResp) 1610 { 1611 Assert((CODEC_CAD(cmd) == pState->id)); 1612 Assert((CODEC_NID(cmd) < pState->cTotalNodes)); 1613 if (CODEC_NID(cmd) >= pState->cTotalNodes) 2065 /* F1C */ 2066 static DECLCALLBACK(int) vrbProcGetConfig(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp) 2067 { 2068 Assert(CODEC_CAD(cmd) == pThis->id); 2069 Assert(CODEC_NID(cmd) < pThis->cTotalNodes); 2070 if (CODEC_NID(cmd) >= pThis->cTotalNodes) 2071 { 2072 Log(("HdaCodec: invalid node address %d\n", CODEC_NID(cmd))); 2073 return VINF_SUCCESS; 2074 } 2075 *pResp = 0; 2076 if (hdaCodecIsPortNode(pThis, CODEC_NID(cmd))) 2077 *pResp = pThis->paNodes[CODEC_NID(cmd)].port.u32F1c_param; 2078 else if (hdaCodecIsDigOutPinNode(pThis, CODEC_NID(cmd))) 2079 *pResp = pThis->paNodes[CODEC_NID(cmd)].digout.u32F1c_param; 2080 else if (hdaCodecIsDigInPinNode(pThis, CODEC_NID(cmd))) 2081 *pResp = pThis->paNodes[CODEC_NID(cmd)].digin.u32F1c_param; 2082 else if (hdaCodecIsPcbeepNode(pThis, CODEC_NID(cmd))) 2083 *pResp = pThis->paNodes[CODEC_NID(cmd)].pcbeep.u32F1c_param; 2084 else if (hdaCodecIsCdNode(pThis, CODEC_NID(cmd))) 2085 *pResp = pThis->paNodes[CODEC_NID(cmd)].cdnode.u32F1c_param; 2086 else if (hdaCodecIsReservedNode(pThis, CODEC_NID(cmd))) 2087 *pResp = pThis->paNodes[CODEC_NID(cmd)].reserved.u32F1c_param; 2088 return VINF_SUCCESS; 2089 } 2090 2091 static int codecSetConfigX(PHDACODEC pThis, uint32_t cmd, uint8_t u8Offset) 2092 { 2093 Assert(CODEC_CAD(cmd) == pThis->id); 2094 Assert(CODEC_NID(cmd) < pThis->cTotalNodes); 2095 if (CODEC_NID(cmd) >= pThis->cTotalNodes) 1614 2096 { 1615 2097 Log(("HdaCodec: invalid node address %d\n", CODEC_NID(cmd))); … … 1617 2099 } 1618 2100 uint32_t *pu32Reg = NULL; 1619 *pResp = 0; 1620 if (CODEC_NID(cmd) == 1 /* AFG */) 1621 pu32Reg = &pState->paNodes[1].afg.u32F17_param; 1622 Assert((pu32Reg)); 1623 if (pu32Reg) 1624 hdaCodecSetRegisterU8(pu32Reg, cmd, 0); 1625 return VINF_SUCCESS; 1626 } 1627 1628 /* F1C */ 1629 static DECLCALLBACK(int) vrbProcGetConfig(PHDACODEC pState, uint32_t cmd, uint64_t *pResp) 1630 { 1631 Assert((CODEC_CAD(cmd) == pState->id)); 1632 Assert((CODEC_NID(cmd) < pState->cTotalNodes)); 1633 if (CODEC_NID(cmd) >= pState->cTotalNodes) 1634 { 1635 Log(("HdaCodec: invalid node address %d\n", CODEC_NID(cmd))); 1636 return VINF_SUCCESS; 1637 } 1638 *pResp = 0; 1639 if (hdaCodecIsPortNode(pState, CODEC_NID(cmd))) 1640 *pResp = pState->paNodes[CODEC_NID(cmd)].port.u32F1c_param; 1641 else if (hdaCodecIsDigOutPinNode(pState, CODEC_NID(cmd))) 1642 *pResp = pState->paNodes[CODEC_NID(cmd)].digout.u32F1c_param; 1643 else if (hdaCodecIsDigInPinNode(pState, CODEC_NID(cmd))) 1644 *pResp = pState->paNodes[CODEC_NID(cmd)].digin.u32F1c_param; 1645 else if (hdaCodecIsPcbeepNode(pState, CODEC_NID(cmd))) 1646 *pResp = pState->paNodes[CODEC_NID(cmd)].pcbeep.u32F1c_param; 1647 else if (hdaCodecIsCdNode(pState, CODEC_NID(cmd))) 1648 *pResp = pState->paNodes[CODEC_NID(cmd)].cdnode.u32F1c_param; 1649 else if (hdaCodecIsReservedNode(pState, CODEC_NID(cmd))) 1650 *pResp = pState->paNodes[CODEC_NID(cmd)].reserved.u32F1c_param; 1651 return VINF_SUCCESS; 1652 } 1653 1654 static int codecSetConfigX(PHDACODEC pState, uint32_t cmd, uint8_t u8Offset) 1655 { 1656 Assert((CODEC_CAD(cmd) == pState->id)); 1657 Assert((CODEC_NID(cmd) < pState->cTotalNodes)); 1658 if (CODEC_NID(cmd) >= pState->cTotalNodes) 1659 { 1660 Log(("HdaCodec: invalid node address %d\n", CODEC_NID(cmd))); 1661 return VINF_SUCCESS; 1662 } 1663 uint32_t *pu32Reg = NULL; 1664 if (hdaCodecIsPortNode(pState, CODEC_NID(cmd))) 1665 pu32Reg = &pState->paNodes[CODEC_NID(cmd)].port.u32F1c_param; 1666 else if (hdaCodecIsDigInPinNode(pState, CODEC_NID(cmd))) 1667 pu32Reg = &pState->paNodes[CODEC_NID(cmd)].digin.u32F1c_param; 1668 else if (hdaCodecIsDigOutPinNode(pState, CODEC_NID(cmd))) 1669 pu32Reg = &pState->paNodes[CODEC_NID(cmd)].digout.u32F1c_param; 1670 else if (hdaCodecIsCdNode(pState, CODEC_NID(cmd))) 1671 pu32Reg = &pState->paNodes[CODEC_NID(cmd)].cdnode.u32F1c_param; 1672 else if (hdaCodecIsPcbeepNode(pState, CODEC_NID(cmd))) 1673 pu32Reg = &pState->paNodes[CODEC_NID(cmd)].pcbeep.u32F1c_param; 1674 else if (hdaCodecIsReservedNode(pState, CODEC_NID(cmd))) 1675 pu32Reg = &pState->paNodes[CODEC_NID(cmd)].reserved.u32F1c_param; 1676 Assert((pu32Reg)); 2101 if (hdaCodecIsPortNode(pThis, CODEC_NID(cmd))) 2102 pu32Reg = &pThis->paNodes[CODEC_NID(cmd)].port.u32F1c_param; 2103 else if (hdaCodecIsDigInPinNode(pThis, CODEC_NID(cmd))) 2104 pu32Reg = &pThis->paNodes[CODEC_NID(cmd)].digin.u32F1c_param; 2105 else if (hdaCodecIsDigOutPinNode(pThis, CODEC_NID(cmd))) 2106 pu32Reg = &pThis->paNodes[CODEC_NID(cmd)].digout.u32F1c_param; 2107 else if (hdaCodecIsCdNode(pThis, CODEC_NID(cmd))) 2108 pu32Reg = &pThis->paNodes[CODEC_NID(cmd)].cdnode.u32F1c_param; 2109 else if (hdaCodecIsPcbeepNode(pThis, CODEC_NID(cmd))) 2110 pu32Reg = &pThis->paNodes[CODEC_NID(cmd)].pcbeep.u32F1c_param; 2111 else if (hdaCodecIsReservedNode(pThis, CODEC_NID(cmd))) 2112 pu32Reg = &pThis->paNodes[CODEC_NID(cmd)].reserved.u32F1c_param; 2113 Assert(pu32Reg); 1677 2114 if (pu32Reg) 1678 2115 hdaCodecSetRegisterU8(pu32Reg, cmd, u8Offset); … … 1681 2118 1682 2119 /* 71C */ 1683 static DECLCALLBACK(int) vrbProcSetConfig0(PHDACODEC p State, uint32_t cmd, uint64_t *pResp)1684 { 1685 *pResp = 0; 1686 return codecSetConfigX(p State, cmd, 0);2120 static DECLCALLBACK(int) vrbProcSetConfig0(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp) 2121 { 2122 *pResp = 0; 2123 return codecSetConfigX(pThis, cmd, 0); 1687 2124 } 1688 2125 1689 2126 /* 71D */ 1690 static DECLCALLBACK(int) vrbProcSetConfig1(PHDACODEC p State, uint32_t cmd, uint64_t *pResp)1691 { 1692 *pResp = 0; 1693 return codecSetConfigX(p State, cmd, 8);2127 static DECLCALLBACK(int) vrbProcSetConfig1(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp) 2128 { 2129 *pResp = 0; 2130 return codecSetConfigX(pThis, cmd, 8); 1694 2131 } 1695 2132 1696 2133 /* 71E */ 1697 static DECLCALLBACK(int) vrbProcSetConfig2(PHDACODEC p State, uint32_t cmd, uint64_t *pResp)1698 { 1699 *pResp = 0; 1700 return codecSetConfigX(p State, cmd, 16);2134 static DECLCALLBACK(int) vrbProcSetConfig2(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp) 2135 { 2136 *pResp = 0; 2137 return codecSetConfigX(pThis, cmd, 16); 1701 2138 } 1702 2139 1703 2140 /* 71E */ 1704 static DECLCALLBACK(int) vrbProcSetConfig3(PHDACODEC pState, uint32_t cmd, uint64_t *pResp) 1705 { 1706 *pResp = 0; 1707 return codecSetConfigX(pState, cmd, 24); 1708 } 1709 1710 1711 static int hdaCodecToAudVolume(AMPLIFIER *pAmp, audmixerctl_t mt) 1712 { 1713 uint32_t dir = AMPLIFIER_OUT; 1714 switch (mt) 1715 { 1716 case AUD_MIXER_VOLUME: 1717 case AUD_MIXER_PCM: 1718 dir = AMPLIFIER_OUT; 1719 break; 1720 case AUD_MIXER_LINE_IN: 1721 dir = AMPLIFIER_IN; 1722 break; 1723 } 1724 int mute = AMPLIFIER_REGISTER(*pAmp, dir, AMPLIFIER_LEFT, 0) & RT_BIT(7); 1725 mute |= AMPLIFIER_REGISTER(*pAmp, dir, AMPLIFIER_RIGHT, 0) & RT_BIT(7); 1726 mute >>=7; 1727 mute &= 0x1; 1728 uint8_t lVol = AMPLIFIER_REGISTER(*pAmp, dir, AMPLIFIER_LEFT, 0) & 0x7f; 1729 uint8_t rVol = AMPLIFIER_REGISTER(*pAmp, dir, AMPLIFIER_RIGHT, 0) & 0x7f; 1730 AUD_set_volume(mt, &mute, &lVol, &rVol); 1731 return VINF_SUCCESS; 1732 } 2141 static DECLCALLBACK(int) vrbProcSetConfig3(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp) 2142 { 2143 *pResp = 0; 2144 return codecSetConfigX(pThis, cmd, 24); 2145 } 2146 1733 2147 1734 2148 /** … … 1782 2196 }; 1783 2197 1784 static int codecLookup(PHDACODEC pState, uint32_t cmd, PPFNCODECVERBPROCESSOR pfn) 1785 { 1786 int rc = VINF_SUCCESS; 1787 Assert(CODEC_CAD(cmd) == pState->id); 1788 if (hdaCodecIsReservedNode(pState, CODEC_NID(cmd))) 2198 static int codecLookup(PHDACODEC pThis, uint32_t cmd, PPFNHDACODECVERBPROCESSOR pfn) 2199 { 2200 Assert(CODEC_CAD(cmd) == pThis->id); 2201 if (hdaCodecIsReservedNode(pThis, CODEC_NID(cmd))) 1789 2202 Log(("HdaCodec: cmd %x was addressed to reserved node\n", cmd)); 1790 2203 1791 2204 if ( CODEC_VERBDATA(cmd) == 0 1792 || CODEC_NID(cmd) >= p State->cTotalNodes)2205 || CODEC_NID(cmd) >= pThis->cTotalNodes) 1793 2206 { 1794 2207 *pfn = vrbProcUnimplemented; … … 1798 2211 } 1799 2212 1800 for (int i = 0; i < p State->cVerbs; ++i)1801 { 1802 if ((CODEC_VERBDATA(cmd) & p State->paVerbs[i].mask) == pState->paVerbs[i].verb)2213 for (int i = 0; i < pThis->cVerbs; ++i) 2214 { 2215 if ((CODEC_VERBDATA(cmd) & pThis->paVerbs[i].mask) == pThis->paVerbs[i].verb) 1803 2216 { 1804 *pfn = p State->paVerbs[i].pfn;2217 *pfn = pThis->paVerbs[i].pfn; 1805 2218 return VINF_SUCCESS; 1806 2219 } … … 1809 2222 *pfn = vrbProcUnimplemented; 1810 2223 Log(("HdaCodec: callback for %x wasn't found\n", CODEC_VERBDATA(cmd))); 1811 return rc;2224 return VINF_SUCCESS; 1812 2225 } 1813 2226 1814 2227 static void pi_callback(void *opaque, int avail) 1815 2228 { 1816 PHDACODEC p State= (PHDACODEC)opaque;1817 p State->pfnTransfer(pState, PI_INDEX, avail);2229 PHDACODEC pThis = (PHDACODEC)opaque; 2230 pThis->pfnTransfer(pThis, PI_INDEX, avail); 1818 2231 } 1819 2232 1820 2233 static void po_callback(void *opaque, int avail) 1821 2234 { 1822 PHDACODEC p State= (PHDACODEC)opaque;1823 p State->pfnTransfer(pState, PO_INDEX, avail);2235 PHDACODEC pThis = (PHDACODEC)opaque; 2236 pThis->pfnTransfer(pThis, PO_INDEX, avail); 1824 2237 } 1825 2238 … … 1839 2252 * format) before enabling. 1840 2253 */ 1841 int hdaCodecOpenVoice(PHDACODEC p State, ENMSOUNDSOURCE enmSoundSource, audsettings_t *pAudioSettings)1842 { 1843 int rc = 0;1844 Assert( (pState && pAudioSettings));1845 if ( !p State2254 int hdaCodecOpenVoice(PHDACODEC pThis, ENMSOUNDSOURCE enmSoundSource, audsettings_t *pAudioSettings) 2255 { 2256 int rc; 2257 Assert(pThis && pAudioSettings); 2258 if ( !pThis 1846 2259 || !pAudioSettings) 1847 2260 return -1; … … 1849 2262 { 1850 2263 case PI_INDEX: 1851 p State->SwVoiceIn = AUD_open_in(&pState->card, pState->SwVoiceIn, "hda.in", pState, pi_callback, pAudioSettings);1852 rc = p State->SwVoiceIn ? 0 : 1;2264 pThis->SwVoiceIn = AUD_open_in(&pThis->card, pThis->SwVoiceIn, "hda.in", pThis, pi_callback, pAudioSettings); 2265 rc = pThis->SwVoiceIn ? 0 : 1; 1853 2266 break; 1854 2267 case PO_INDEX: 1855 p State->SwVoiceOut = AUD_open_out(&pState->card, pState->SwVoiceOut, "hda.out", pState, po_callback, pAudioSettings);1856 rc = p State->SwVoiceOut ? 0 : 1;2268 pThis->SwVoiceOut = AUD_open_out(&pThis->card, pThis->SwVoiceOut, "hda.out", pThis, po_callback, pAudioSettings); 2269 rc = pThis->SwVoiceOut ? 0 : 1; 1857 2270 break; 1858 2271 default: … … 1865 2278 1866 2279 1867 int hdaCodecSaveState( CODECState *pCodecState, PSSMHANDLE pSSM)1868 { 1869 AssertLogRelMsgReturn(p CodecState->cTotalNodes == 0x1c, ("cTotalNodes=%#x, should be 0x1c", pCodecState->cTotalNodes),2280 int hdaCodecSaveState(PHDACODEC pThis, PSSMHANDLE pSSM) 2281 { 2282 AssertLogRelMsgReturn(pThis->cTotalNodes == 0x1c, ("cTotalNodes=%#x, should be 0x1c", pThis->cTotalNodes), 1870 2283 VERR_INTERNAL_ERROR); 1871 SSMR3PutU32(pSSM, p CodecState->cTotalNodes);1872 for (unsigned idxNode = 0; idxNode < p CodecState->cTotalNodes; ++idxNode)1873 SSMR3PutStructEx(pSSM, &p CodecState->paNodes[idxNode].SavedState, sizeof(pCodecState->paNodes[idxNode].SavedState),2284 SSMR3PutU32(pSSM, pThis->cTotalNodes); 2285 for (unsigned idxNode = 0; idxNode < pThis->cTotalNodes; ++idxNode) 2286 SSMR3PutStructEx(pSSM, &pThis->paNodes[idxNode].SavedState, sizeof(pThis->paNodes[idxNode].SavedState), 1874 2287 0 /*fFlags*/, g_aCodecNodeFields, NULL /*pvUser*/); 1875 2288 return VINF_SUCCESS; … … 1877 2290 1878 2291 1879 int hdaCodecLoadState( CODECState *pCodecState, PSSMHANDLE pSSM, uint32_t uVersion)2292 int hdaCodecLoadState(PHDACODEC pThis, PSSMHANDLE pSSM, uint32_t uVersion) 1880 2293 { 1881 2294 PCSSMFIELD pFields; … … 1884 2297 { 1885 2298 case HDA_SSM_VERSION_1: 1886 AssertReturn(p CodecState->cTotalNodes == 0x1c, VERR_INTERNAL_ERROR);2299 AssertReturn(pThis->cTotalNodes == 0x1c, VERR_INTERNAL_ERROR); 1887 2300 pFields = g_aCodecNodeFieldsV1; 1888 2301 fFlags = SSMSTRUCT_FLAGS_MEM_BAND_AID_RELAXED; … … 1891 2304 case HDA_SSM_VERSION_2: 1892 2305 case HDA_SSM_VERSION_3: 1893 AssertReturn(p CodecState->cTotalNodes == 0x1c, VERR_INTERNAL_ERROR);2306 AssertReturn(pThis->cTotalNodes == 0x1c, VERR_INTERNAL_ERROR); 1894 2307 pFields = g_aCodecNodeFields; 1895 2308 fFlags = SSMSTRUCT_FLAGS_MEM_BAND_AID_RELAXED; … … 1903 2316 if (cNodes != 0x1c) 1904 2317 return VERR_SSM_DATA_UNIT_FORMAT_CHANGED; 1905 AssertReturn(p CodecState->cTotalNodes == 0x1c, VERR_INTERNAL_ERROR);2318 AssertReturn(pThis->cTotalNodes == 0x1c, VERR_INTERNAL_ERROR); 1906 2319 1907 2320 pFields = g_aCodecNodeFields; … … 1914 2327 } 1915 2328 1916 for (unsigned idxNode = 0; idxNode < p CodecState->cTotalNodes; ++idxNode)1917 { 1918 uint8_t idOld = p CodecState->paNodes[idxNode].SavedState.Core.id;1919 int rc = SSMR3GetStructEx(pSSM, &p CodecState->paNodes[idxNode].SavedState,1920 sizeof(p CodecState->paNodes[idxNode].SavedState),2329 for (unsigned idxNode = 0; idxNode < pThis->cTotalNodes; ++idxNode) 2330 { 2331 uint8_t idOld = pThis->paNodes[idxNode].SavedState.Core.id; 2332 int rc = SSMR3GetStructEx(pSSM, &pThis->paNodes[idxNode].SavedState, 2333 sizeof(pThis->paNodes[idxNode].SavedState), 1921 2334 fFlags, pFields, NULL); 1922 2335 if (RT_FAILURE(rc)) 1923 2336 return rc; 1924 AssertLogRelMsgReturn(idOld == p CodecState->paNodes[idxNode].SavedState.Core.id,1925 ("loaded %#x, expected \n", p CodecState->paNodes[idxNode].SavedState.Core.id, idOld),2337 AssertLogRelMsgReturn(idOld == pThis->paNodes[idxNode].SavedState.Core.id, 2338 ("loaded %#x, expected \n", pThis->paNodes[idxNode].SavedState.Core.id, idOld), 1926 2339 VERR_SSM_DATA_UNIT_FORMAT_CHANGED); 1927 2340 } … … 1930 2343 * Update stuff after changing the state. 1931 2344 */ 1932 if (hdaCodecIsDacNode(p CodecState, pCodecState->u8DacLineOut))1933 hdaCodecToAudVolume(&p CodecState->paNodes[pCodecState->u8DacLineOut].dac.B_params, AUD_MIXER_VOLUME);1934 else if (hdaCodecIsSpdifOutNode(p CodecState, pCodecState->u8DacLineOut))1935 hdaCodecToAudVolume(&p CodecState->paNodes[pCodecState->u8DacLineOut].spdifout.B_params, AUD_MIXER_VOLUME);1936 hdaCodecToAudVolume(&p CodecState->paNodes[pCodecState->u8AdcVolsLineIn].adcvol.B_params, AUD_MIXER_LINE_IN);1937 1938 return VINF_SUCCESS; 1939 } 1940 1941 1942 int hdaCodecDestruct( CODECState *pCodecState)1943 { 1944 RTMemFree(p CodecState->paNodes);1945 p CodecState->paNodes = NULL;1946 return VINF_SUCCESS; 1947 } 1948 1949 1950 int hdaCodecConstruct(PPDMDEVINS pDevIns, PHDACODEC p State, PCFGMNODE pCfg)1951 { 1952 p State->paVerbs = &g_aCodecVerbs[0];1953 p State->cVerbs = RT_ELEMENTS(g_aCodecVerbs);1954 p State->pfnLookup = codecLookup;1955 int rc = stac9220Construct(p State);2345 if (hdaCodecIsDacNode(pThis, pThis->u8DacLineOut)) 2346 hdaCodecToAudVolume(&pThis->paNodes[pThis->u8DacLineOut].dac.B_params, AUD_MIXER_VOLUME); 2347 else if (hdaCodecIsSpdifOutNode(pThis, pThis->u8DacLineOut)) 2348 hdaCodecToAudVolume(&pThis->paNodes[pThis->u8DacLineOut].spdifout.B_params, AUD_MIXER_VOLUME); 2349 hdaCodecToAudVolume(&pThis->paNodes[pThis->u8AdcVolsLineIn].adcvol.B_params, AUD_MIXER_LINE_IN); 2350 2351 return VINF_SUCCESS; 2352 } 2353 2354 2355 int hdaCodecDestruct(PHDACODEC pThis) 2356 { 2357 RTMemFree(pThis->paNodes); 2358 pThis->paNodes = NULL; 2359 return VINF_SUCCESS; 2360 } 2361 2362 2363 int hdaCodecConstruct(PPDMDEVINS pDevIns, PHDACODEC pThis, PCFGMNODE pCfg) 2364 { 2365 pThis->paVerbs = &g_aCodecVerbs[0]; 2366 pThis->cVerbs = RT_ELEMENTS(g_aCodecVerbs); 2367 pThis->pfnLookup = codecLookup; 2368 int rc = stac9220Construct(pThis); 1956 2369 AssertRC(rc); 1957 2370 1958 2371 /* common root node initializers */ 1959 p State->paNodes[0].node.au32F00_param[0] = CODEC_MAKE_F00_00(pState->u16VendorId, pState->u16DeviceId);1960 p State->paNodes[0].node.au32F00_param[4] = CODEC_MAKE_F00_04(0x1, 0x1);2372 pThis->paNodes[0].node.au32F00_param[0] = CODEC_MAKE_F00_00(pThis->u16VendorId, pThis->u16DeviceId); 2373 pThis->paNodes[0].node.au32F00_param[4] = CODEC_MAKE_F00_04(0x1, 0x1); 1961 2374 /* common AFG node initializers */ 1962 p State->paNodes[1].node.au32F00_param[4] = CODEC_MAKE_F00_04(0x2, pState->cTotalNodes - 2);1963 p State->paNodes[1].node.au32F00_param[5] = CODEC_MAKE_F00_05(1, CODEC_F00_05_AFG);1964 p State->paNodes[1].afg.u32F20_param = CODEC_MAKE_F20(pState->u16VendorId, pState->u8BSKU, pState->u8AssemblyId);1965 1966 // **@todo r=michaln: Was this meant to be 'HDA' or something like that? (AC'97 was on ICH0)1967 AUD_register_card ("ICH0", &p State->card);2375 pThis->paNodes[1].node.au32F00_param[4] = CODEC_MAKE_F00_04(0x2, pThis->cTotalNodes - 2); 2376 pThis->paNodes[1].node.au32F00_param[5] = CODEC_MAKE_F00_05(1, CODEC_F00_05_AFG); 2377 pThis->paNodes[1].afg.u32F20_param = CODEC_MAKE_F20(pThis->u16VendorId, pThis->u8BSKU, pThis->u8AssemblyId); 2378 2379 /// @todo r=michaln: Was this meant to be 'HDA' or something like that? (AC'97 was on ICH0) 2380 AUD_register_card ("ICH0", &pThis->card); 1968 2381 1969 2382 /* 44.1 kHz */ … … 1974 2387 as.endianness = 0; 1975 2388 1976 p State->paNodes[1].node.au32F00_param[0xA] = CODEC_F00_0A_16_BIT;1977 hdaCodecOpenVoice(p State, PI_INDEX, &as);1978 hdaCodecOpenVoice(p State, PO_INDEX, &as);1979 p State->paNodes[1].node.au32F00_param[0xA] |= CODEC_F00_0A_44_1KHZ;2389 pThis->paNodes[1].node.au32F00_param[0xA] = CODEC_F00_0A_16_BIT; 2390 hdaCodecOpenVoice(pThis, PI_INDEX, &as); 2391 hdaCodecOpenVoice(pThis, PO_INDEX, &as); 2392 pThis->paNodes[1].node.au32F00_param[0xA] |= CODEC_F00_0A_44_1KHZ; 1980 2393 1981 2394 uint8_t i; 1982 Assert(p State->paNodes);1983 Assert(p State->pfnCodecNodeReset);1984 for (i = 0; i < p State->cTotalNodes; ++i)1985 { 1986 p State->pfnCodecNodeReset(pState, i, &pState->paNodes[i]);1987 } 1988 1989 hdaCodecToAudVolume(&p State->paNodes[pState->u8DacLineOut].dac.B_params, AUD_MIXER_VOLUME);1990 hdaCodecToAudVolume(&p State->paNodes[pState->u8AdcVolsLineIn].adcvol.B_params, AUD_MIXER_LINE_IN);2395 Assert(pThis->paNodes); 2396 Assert(pThis->pfnCodecNodeReset); 2397 for (i = 0; i < pThis->cTotalNodes; ++i) 2398 { 2399 pThis->pfnCodecNodeReset(pThis, i, &pThis->paNodes[i]); 2400 } 2401 2402 hdaCodecToAudVolume(&pThis->paNodes[pThis->u8DacLineOut].dac.B_params, AUD_MIXER_VOLUME); 2403 hdaCodecToAudVolume(&pThis->paNodes[pThis->u8AdcVolsLineIn].adcvol.B_params, AUD_MIXER_LINE_IN); 1991 2404 1992 2405 /* If no host voices were created, then fallback to nul audio. */ 1993 if (!AUD_is_host_voice_in_ok(p State->SwVoiceIn))2406 if (!AUD_is_host_voice_in_ok(pThis->SwVoiceIn)) 1994 2407 LogRel (("HDA: WARNING: Unable to open PCM IN!\n")); 1995 if (!AUD_is_host_voice_out_ok(p State->SwVoiceOut))2408 if (!AUD_is_host_voice_out_ok(pThis->SwVoiceOut)) 1996 2409 LogRel (("HDA: WARNING: Unable to open PCM OUT!\n")); 1997 2410 1998 if ( !AUD_is_host_voice_in_ok(p State->SwVoiceIn)1999 && !AUD_is_host_voice_out_ok(p State->SwVoiceOut))2411 if ( !AUD_is_host_voice_in_ok(pThis->SwVoiceIn) 2412 && !AUD_is_host_voice_out_ok(pThis->SwVoiceOut)) 2000 2413 { 2001 2414 /* Was not able initialize *any* voice. Select the NULL audio driver instead */ 2002 AUD_close_in (&p State->card, pState->SwVoiceIn);2003 AUD_close_out (&p State->card, pState->SwVoiceOut);2004 p State->SwVoiceOut = NULL;2005 p State->SwVoiceIn = NULL;2415 AUD_close_in (&pThis->card, pThis->SwVoiceIn); 2416 AUD_close_out (&pThis->card, pThis->SwVoiceOut); 2417 pThis->SwVoiceOut = NULL; 2418 pThis->SwVoiceIn = NULL; 2006 2419 AUD_init_null (); 2007 2420 … … 2010 2423 "with the consequence that no sound is audible")); 2011 2424 } 2012 else if ( !AUD_is_host_voice_in_ok(p State->SwVoiceIn)2013 || !AUD_is_host_voice_out_ok(p State->SwVoiceOut))2425 else if ( !AUD_is_host_voice_in_ok(pThis->SwVoiceIn) 2426 || !AUD_is_host_voice_out_ok(pThis->SwVoiceOut)) 2014 2427 { 2015 2428 char szMissingVoices[128]; 2016 2429 size_t len = 0; 2017 if (!AUD_is_host_voice_in_ok(p State->SwVoiceIn))2430 if (!AUD_is_host_voice_in_ok(pThis->SwVoiceIn)) 2018 2431 len = RTStrPrintf (szMissingVoices, sizeof(szMissingVoices), "PCM_in"); 2019 if (!AUD_is_host_voice_out_ok(p State->SwVoiceOut))2432 if (!AUD_is_host_voice_out_ok(pThis->SwVoiceOut)) 2020 2433 len += RTStrPrintf (szMissingVoices + len, sizeof(szMissingVoices) - len, len ? ", PCM_out" : "PCM_out"); 2021 2434 -
trunk/src/VBox/Devices/Audio/DevCodec.h
r44667 r44668 19 19 #define DEV_CODEC_H 20 20 21 struct CODECState; 21 /** The ICH HDA (Intel) codec state. */ 22 typedef struct HDACODEC HDACODEC; 23 /** Pointer to the Intel ICH HDA codec state. */ 24 typedef HDACODEC *PHDACODEC; 22 25 23 typedef DECLCALLBACK(int) FNCODECVERBPROCESSOR(struct CODECState *pThis, uint32_t cmd, uint64_t *pResp); 24 typedef FNCODECVERBPROCESSOR *PFNCODECVERBPROCESSOR; 25 typedef FNCODECVERBPROCESSOR **PPFNCODECVERBPROCESSOR; 26 /** 27 * Verb processor method. 28 */ 29 typedef DECLCALLBACK(int) FNHDACODECVERBPROCESSOR(PHDACODEC pThis, uint32_t cmd, uint64_t *pResp); 30 typedef FNHDACODECVERBPROCESSOR *PFNHDACODECVERBPROCESSOR; 31 typedef FNHDACODECVERBPROCESSOR **PPFNHDACODECVERBPROCESSOR; 26 32 27 33 /* PRM 5.3.1 */ 28 34 #define CODEC_RESPONSE_UNSOLICITED RT_BIT_64(34) 29 30 #define CODEC_CAD_MASK 0xF000000031 #define CODEC_CAD_SHIFT 2832 #define CODEC_DIRECT_MASK RT_BIT(27)33 #define CODEC_NID_MASK 0x07F0000034 #define CODEC_NID_SHIFT 2035 #define CODEC_VERBDATA_MASK 0x000FFFFF36 #define CODEC_VERB_4BIT_CMD 0x000FFFF037 #define CODEC_VERB_4BIT_DATA 0x0000000F38 #define CODEC_VERB_8BIT_CMD 0x000FFF0039 #define CODEC_VERB_8BIT_DATA 0x000000FF40 #define CODEC_VERB_16BIT_CMD 0x000F000041 #define CODEC_VERB_16BIT_DATA 0x0000FFFF42 43 #define CODEC_CAD(cmd) ((cmd) & CODEC_CAD_MASK)44 #define CODEC_DIRECT(cmd) ((cmd) & CODEC_DIRECT_MASK)45 #define CODEC_NID(cmd) ((((cmd) & CODEC_NID_MASK)) >> CODEC_NID_SHIFT)46 #define CODEC_VERBDATA(cmd) ((cmd) & CODEC_VERBDATA_MASK)47 #define CODEC_VERB_CMD(cmd, mask, x) (((cmd) & (mask)) >> (x))48 #define CODEC_VERB_CMD4(cmd) (CODEC_VERB_CMD((cmd), CODEC_VERB_4BIT_CMD, 4))49 #define CODEC_VERB_CMD8(cmd) (CODEC_VERB_CMD((cmd), CODEC_VERB_8BIT_CMD, 8))50 #define CODEC_VERB_CMD16(cmd) (CODEC_VERB_CMD((cmd), CODEC_VERB_16BIT_CMD, 16))51 #define CODEC_VERB_PAYLOAD4(cmd) ((cmd) & CODEC_VERB_4BIT_DATA)52 #define CODEC_VERB_PAYLOAD8(cmd) ((cmd) & CODEC_VERB_8BIT_DATA)53 #define CODEC_VERB_PAYLOAD16(cmd) ((cmd) & CODEC_VERB_16BIT_DATA)54 55 #define CODEC_VERB_GET_AMP_DIRECTION RT_BIT(15)56 #define CODEC_VERB_GET_AMP_SIDE RT_BIT(13)57 #define CODEC_VERB_GET_AMP_INDEX 0x758 59 /* HDA spec 7.3.3.7 NoteA */60 #define CODEC_GET_AMP_DIRECTION(cmd) (((cmd) & CODEC_VERB_GET_AMP_DIRECTION) >> 15)61 #define CODEC_GET_AMP_SIDE(cmd) (((cmd) & CODEC_VERB_GET_AMP_SIDE) >> 13)62 #define CODEC_GET_AMP_INDEX(cmd) (CODEC_GET_AMP_DIRECTION(cmd) ? 0 : ((cmd) & CODEC_VERB_GET_AMP_INDEX))63 64 /* HDA spec 7.3.3.7 NoteC */65 #define CODEC_VERB_SET_AMP_OUT_DIRECTION RT_BIT(15)66 #define CODEC_VERB_SET_AMP_IN_DIRECTION RT_BIT(14)67 #define CODEC_VERB_SET_AMP_LEFT_SIDE RT_BIT(13)68 #define CODEC_VERB_SET_AMP_RIGHT_SIDE RT_BIT(12)69 #define CODEC_VERB_SET_AMP_INDEX (0x7 << 8)70 71 #define CODEC_SET_AMP_IS_OUT_DIRECTION(cmd) (((cmd) & CODEC_VERB_SET_AMP_OUT_DIRECTION) != 0)72 #define CODEC_SET_AMP_IS_IN_DIRECTION(cmd) (((cmd) & CODEC_VERB_SET_AMP_IN_DIRECTION) != 0)73 #define CODEC_SET_AMP_IS_LEFT_SIDE(cmd) (((cmd) & CODEC_VERB_SET_AMP_LEFT_SIDE) != 0)74 #define CODEC_SET_AMP_IS_RIGHT_SIDE(cmd) (((cmd) & CODEC_VERB_SET_AMP_RIGHT_SIDE) != 0)75 #define CODEC_SET_AMP_INDEX(cmd) (((cmd) & CODEC_VERB_SET_AMP_INDEX) >> 7)76 77 /* HDA spec 7.3.3.1 defines layout of configuration registers/verbs (0xF00) */78 /* VendorID (7.3.4.1) */79 #define CODEC_MAKE_F00_00(vendorID, deviceID) (((vendorID) << 16) | (deviceID))80 #define CODEC_F00_00_VENDORID(f00_00) (((f00_00) >> 16) & 0xFFFF)81 #define CODEC_F00_00_DEVICEID(f00_00) ((f00_00) & 0xFFFF)82 /* RevisionID (7.3.4.2)*/83 #define CODEC_MAKE_F00_02(MajRev, MinRev, RevisionID, SteppingID) (((MajRev) << 20)|((MinRev) << 16)|((RevisionID) << 8)|(SteppingID))84 /* Subordinate node count (7.3.4.3)*/85 #define CODEC_MAKE_F00_04(startNodeNumber, totalNodeNumber) ((((startNodeNumber) & 0xFF) << 16)|((totalNodeNumber) & 0xFF))86 #define CODEC_F00_04_TO_START_NODE_NUMBER(f00_04) (((f00_04) >> 16) & 0xFF)87 #define CODEC_F00_04_TO_NODE_COUNT(f00_04) ((f00_04) & 0xFF)88 /*89 * Function Group Type (7.3.4.4)90 * 0 & [0x3-0x7f] are reserved types91 * [0x80 - 0xff] are vendor defined function groups92 */93 #define CODEC_MAKE_F00_05(UnSol, NodeType) (((UnSol) << 8)|(NodeType))94 #define CODEC_F00_05_UNSOL RT_BIT(8)95 #define CODEC_F00_05_AFG (0x1)96 #define CODEC_F00_05_MFG (0x2)97 #define CODEC_F00_05_IS_UNSOL(f00_05) RT_BOOL((f00_05) & RT_BIT(8))98 #define CODEC_F00_05_GROUP(f00_05) ((f00_05) & 0xff)99 /* Audio Function Group capabilities (7.3.4.5) */100 #define CODEC_MAKE_F00_08(BeepGen, InputDelay, OutputDelay) ((((BeepGen) & 0x1) << 16)| (((InputDelay) & 0xF) << 8) | ((OutputDelay) & 0xF))101 #define CODEC_F00_08_BEEP_GEN(f00_08) ((f00_08) & RT_BIT(16)102 103 /* Widget Capabilities (7.3.4.6) */104 #define CODEC_MAKE_F00_09(type, delay, chanel_count) \105 ( (((type) & 0xF) << 20) \106 | (((delay) & 0xF) << 16) \107 | (((chanel_count) & 0xF) << 13))108 /* note: types 0x8-0xe are reserved */109 #define CODEC_F00_09_TYPE_AUDIO_OUTPUT (0x0)110 #define CODEC_F00_09_TYPE_AUDIO_INPUT (0x1)111 #define CODEC_F00_09_TYPE_AUDIO_MIXER (0x2)112 #define CODEC_F00_09_TYPE_AUDIO_SELECTOR (0x3)113 #define CODEC_F00_09_TYPE_PIN_COMPLEX (0x4)114 #define CODEC_F00_09_TYPE_POWER_WIDGET (0x5)115 #define CODEC_F00_09_TYPE_VOLUME_KNOB (0x6)116 #define CODEC_F00_09_TYPE_BEEP_GEN (0x7)117 #define CODEC_F00_09_TYPE_VENDOR_DEFINED (0xF)118 119 #define CODEC_F00_09_CAP_CP RT_BIT(12)120 #define CODEC_F00_09_CAP_L_R_SWAP RT_BIT(11)121 #define CODEC_F00_09_CAP_POWER_CTRL RT_BIT(10)122 #define CODEC_F00_09_CAP_DIGITAL RT_BIT(9)123 #define CODEC_F00_09_CAP_CONNECTION_LIST RT_BIT(8)124 #define CODEC_F00_09_CAP_UNSOL RT_BIT(7)125 #define CODEC_F00_09_CAP_PROC_WIDGET RT_BIT(6)126 #define CODEC_F00_09_CAP_STRIPE RT_BIT(5)127 #define CODEC_F00_09_CAP_FMT_OVERRIDE RT_BIT(4)128 #define CODEC_F00_09_CAP_AMP_FMT_OVERRIDE RT_BIT(3)129 #define CODEC_F00_09_CAP_OUT_AMP_PRESENT RT_BIT(2)130 #define CODEC_F00_09_CAP_IN_AMP_PRESENT RT_BIT(1)131 #define CODEC_F00_09_CAP_LSB RT_BIT(0)132 133 #define CODEC_F00_09_TYPE(f00_09) (((f00_09) >> 20) & 0xF)134 135 #define CODEC_F00_09_IS_CAP_CP(f00_09) RT_BOOL((f00_09) & RT_BIT(12))136 #define CODEC_F00_09_IS_CAP_L_R_SWAP(f00_09) RT_BOOL((f00_09) & RT_BIT(11))137 #define CODEC_F00_09_IS_CAP_POWER_CTRL(f00_09) RT_BOOL((f00_09) & RT_BIT(10))138 #define CODEC_F00_09_IS_CAP_DIGITAL(f00_09) RT_BOOL((f00_09) & RT_BIT(9))139 #define CODEC_F00_09_IS_CAP_CONNECTION_LIST(f00_09) RT_BOOL((f00_09) & RT_BIT(8))140 #define CODEC_F00_09_IS_CAP_UNSOL(f00_09) RT_BOOL((f00_09) & RT_BIT(7))141 #define CODEC_F00_09_IS_CAP_PROC_WIDGET(f00_09) RT_BOOL((f00_09) & RT_BIT(6))142 #define CODEC_F00_09_IS_CAP_STRIPE(f00_09) RT_BOOL((f00_09) & RT_BIT(5))143 #define CODEC_F00_09_IS_CAP_FMT_OVERRIDE(f00_09) RT_BOOL((f00_09) & RT_BIT(4))144 #define CODEC_F00_09_IS_CAP_AMP_OVERRIDE(f00_09) RT_BOOL((f00_09) & RT_BIT(3))145 #define CODEC_F00_09_IS_CAP_OUT_AMP_PRESENT(f00_09) RT_BOOL((f00_09) & RT_BIT(2))146 #define CODEC_F00_09_IS_CAP_IN_AMP_PRESENT(f00_09) RT_BOOL((f00_09) & RT_BIT(1))147 #define CODEC_F00_09_IS_CAP_LSB(f00_09) RT_BOOL((f00_09) & RT_BIT(0))148 149 /* Supported PCM size, rates (7.3.4.7) */150 #define CODEC_F00_0A_32_BIT RT_BIT(19)151 #define CODEC_F00_0A_24_BIT RT_BIT(18)152 #define CODEC_F00_0A_16_BIT RT_BIT(17)153 #define CODEC_F00_0A_8_BIT RT_BIT(16)154 155 #define CODEC_F00_0A_48KHZ_MULT_8X RT_BIT(11)156 #define CODEC_F00_0A_48KHZ_MULT_4X RT_BIT(10)157 #define CODEC_F00_0A_44_1KHZ_MULT_4X RT_BIT(9)158 #define CODEC_F00_0A_48KHZ_MULT_2X RT_BIT(8)159 #define CODEC_F00_0A_44_1KHZ_MULT_2X RT_BIT(7)160 #define CODEC_F00_0A_48KHZ RT_BIT(6)161 #define CODEC_F00_0A_44_1KHZ RT_BIT(5)162 /* 2/3 * 48kHz */163 #define CODEC_F00_0A_48KHZ_2_3X RT_BIT(4)164 /* 1/2 * 44.1kHz */165 #define CODEC_F00_0A_44_1KHZ_1_2X RT_BIT(3)166 /* 1/3 * 48kHz */167 #define CODEC_F00_0A_48KHZ_1_3X RT_BIT(2)168 /* 1/4 * 44.1kHz */169 #define CODEC_F00_0A_44_1KHZ_1_4X RT_BIT(1)170 /* 1/6 * 48kHz */171 #define CODEC_F00_0A_48KHZ_1_6X RT_BIT(0)172 173 /* Supported streams formats (7.3.4.8) */174 #define CODEC_F00_0B_AC3 RT_BIT(2)175 #define CODEC_F00_0B_FLOAT32 RT_BIT(1)176 #define CODEC_F00_0B_PCM RT_BIT(0)177 178 /* Pin Capabilities (7.3.4.9)*/179 #define CODEC_MAKE_F00_0C(vref_ctrl) (((vref_ctrl) & 0xFF) << 8)180 #define CODEC_F00_0C_CAP_HBR RT_BIT(27)181 #define CODEC_F00_0C_CAP_DP RT_BIT(24)182 #define CODEC_F00_0C_CAP_EAPD RT_BIT(16)183 #define CODEC_F00_0C_CAP_HDMI RT_BIT(7)184 #define CODEC_F00_0C_CAP_BALANCED_IO RT_BIT(6)185 #define CODEC_F00_0C_CAP_INPUT RT_BIT(5)186 #define CODEC_F00_0C_CAP_OUTPUT RT_BIT(4)187 #define CODEC_F00_0C_CAP_HP RT_BIT(3)188 #define CODEC_F00_0C_CAP_PRESENSE_DETECT RT_BIT(2)189 #define CODEC_F00_0C_CAP_TRIGGER_REQUIRED RT_BIT(1)190 #define CODEC_F00_0C_CAP_IMPENDANCE_SENSE RT_BIT(0)191 192 #define CODEC_F00_0C_IS_CAP_HBR(f00_0c) ((f00_0c) & RT_BIT(27))193 #define CODEC_F00_0C_IS_CAP_DP(f00_0c) ((f00_0c) & RT_BIT(24))194 #define CODEC_F00_0C_IS_CAP_EAPD(f00_0c) ((f00_0c) & RT_BIT(16))195 #define CODEC_F00_0C_IS_CAP_HDMI(f00_0c) ((f00_0c) & RT_BIT(7))196 #define CODEC_F00_0C_IS_CAP_BALANCED_IO(f00_0c) ((f00_0c) & RT_BIT(6))197 #define CODEC_F00_0C_IS_CAP_INPUT(f00_0c) ((f00_0c) & RT_BIT(5))198 #define CODEC_F00_0C_IS_CAP_OUTPUT(f00_0c) ((f00_0c) & RT_BIT(4))199 #define CODEC_F00_0C_IS_CAP_HP(f00_0c) ((f00_0c) & RT_BIT(3))200 #define CODEC_F00_0C_IS_CAP_PRESENSE_DETECT(f00_0c) ((f00_0c) & RT_BIT(2))201 #define CODEC_F00_0C_IS_CAP_TRIGGER_REQUIRED(f00_0c) ((f00_0c) & RT_BIT(1))202 #define CODEC_F00_0C_IS_CAP_IMPENDANCE_SENSE(f00_0c) ((f00_0c) & RT_BIT(0))203 204 /* Input Amplifier capabilities (7.3.4.10) */205 #define CODEC_MAKE_F00_0D(mute_cap, step_size, num_steps, offset) \206 ( (((mute_cap) & 0x1) << 31) \207 | (((step_size) & 0xFF) << 16) \208 | (((num_steps) & 0xFF) << 8) \209 | ((offset) & 0xFF))210 211 /* Output Amplifier capabilities (7.3.4.10) */212 #define CODEC_MAKE_F00_12 CODEC_MAKE_F00_0D213 214 /* Connection list lenght (7.3.4.11) */215 #define CODEC_MAKE_F00_0E(long_form, length) \216 ( (((long_form) & 0x1) << 7) \217 | ((length) & 0x7F))218 #define CODEC_F00_0E_IS_LONG(f00_0e) RT_BOOL((f00_0e) & RT_BIT(7))219 #define CODEC_F00_0E_COUNT(f00_0e) ((f00_0e) & 0x7F)220 /* Supported Power States (7.3.4.12) */221 #define CODEC_F00_0F_EPSS RT_BIT(31)222 #define CODEC_F00_0F_CLKSTOP RT_BIT(30)223 #define CODEC_F00_0F_S3D3 RT_BIT(29)224 #define CODEC_F00_0F_D3COLD RT_BIT(4)225 #define CODEC_F00_0F_D3 RT_BIT(3)226 #define CODEC_F00_0F_D2 RT_BIT(2)227 #define CODEC_F00_0F_D1 RT_BIT(1)228 #define CODEC_F00_0F_D0 RT_BIT(0)229 230 /* Processing capabilities 7.3.4.13 */231 #define CODEC_MAKE_F00_10(num, benign) ((((num) & 0xFF) << 8) | ((benign) & 0x1))232 #define CODEC_F00_10_NUM(f00_10) (((f00_10) & (0xFF << 8)) >> 8)233 #define CODEC_F00_10_BENING(f00_10) ((f00_10) & 0x1)234 235 /* CP/IO Count (7.3.4.14) */236 #define CODEC_MAKE_F00_11(wake, unsol, numgpi, numgpo, numgpio) \237 ( (((wake) & 0x1) << 31) \238 | (((unsol) & 0x1) << 30) \239 | (((numgpi) & 0xFF) << 16) \240 | (((numgpo) & 0xFF) << 8) \241 | ((numgpio) & 0xFF))242 243 /* Processing States (7.3.3.4) */244 #define CODEC_F03_OFF (0)245 #define CODEC_F03_ON RT_BIT(0)246 #define CODEC_F03_BENING RT_BIT(1)247 /* Power States (7.3.3.10) */248 #define CODEC_MAKE_F05(reset, stopok, error, act, set) \249 ( (((reset) & 0x1) << 10) \250 | (((stopok) & 0x1) << 9) \251 | (((error) & 0x1) << 8) \252 | (((act) & 0x7) << 4) \253 | ((set) & 0x7))254 #define CODEC_F05_D3COLD (4)255 #define CODEC_F05_D3 (3)256 #define CODEC_F05_D2 (2)257 #define CODEC_F05_D1 (1)258 #define CODEC_F05_D0 (0)259 260 #define CODEC_F05_IS_RESET(value) (((value) & RT_BIT(10)) != 0)261 #define CODEC_F05_IS_STOPOK(value) (((value) & RT_BIT(9)) != 0)262 #define CODEC_F05_IS_ERROR(value) (((value) & RT_BIT(8)) != 0)263 #define CODEC_F05_ACT(value) (((value) & 0x7) >> 4)264 #define CODEC_F05_SET(value) (((value) & 0x7))265 266 #define CODEC_F05_GE(p0, p1) ((p0) <= (p1))267 #define CODEC_F05_LE(p0, p1) ((p0) >= (p1))268 269 /* Pin Widged Control (7.3.3.13) */270 #define CODEC_F07_VREF_HIZ (0)271 #define CODEC_F07_VREF_50 (0x1)272 #define CODEC_F07_VREF_GROUND (0x2)273 #define CODEC_F07_VREF_80 (0x4)274 #define CODEC_F07_VREF_100 (0x5)275 #define CODEC_F07_IN_ENABLE RT_BIT(5)276 #define CODEC_F07_OUT_ENABLE RT_BIT(6)277 #define CODEC_F07_OUT_H_ENABLE RT_BIT(7)278 279 /* Unsolicited enabled (7.3.3.14) */280 #define CODEC_MAKE_F08(enable, tag) ((((enable) & 1) << 7) | ((tag) & 0x3F))281 282 /* Converter formats (7.3.3.8) and (3.7.1) */283 #define CODEC_MAKE_A(fNonPCM, f44_1BaseRate, mult, div, bits, chan) \284 ( (((fNonPCM) & 0x1) << 15) \285 | (((f44_1BaseRate) & 0x1) << 14) \286 | (((mult) & 0x7) << 11) \287 | (((div) & 0x7) << 8) \288 | (((bits) & 0x7) << 4) \289 | ((chan) & 0xF))290 291 #define CODEC_A_MULT_1X (0)292 #define CODEC_A_MULT_2X (1)293 #define CODEC_A_MULT_3X (2)294 #define CODEC_A_MULT_4X (3)295 296 #define CODEC_A_DIV_1X (0)297 #define CODEC_A_DIV_2X (1)298 #define CODEC_A_DIV_3X (2)299 #define CODEC_A_DIV_4X (3)300 #define CODEC_A_DIV_5X (4)301 #define CODEC_A_DIV_6X (5)302 #define CODEC_A_DIV_7X (6)303 #define CODEC_A_DIV_8X (7)304 305 #define CODEC_A_8_BIT (0)306 #define CODEC_A_16_BIT (1)307 #define CODEC_A_20_BIT (2)308 #define CODEC_A_24_BIT (3)309 #define CODEC_A_32_BIT (4)310 311 /* Pin Sense (7.3.3.15) */312 #define CODEC_MAKE_F09_ANALOG(fPresent, impedance) \313 ( (((fPresent) & 0x1) << 31) \314 | (((impedance) & 0x7FFFFFFF)))315 #define CODEC_F09_ANALOG_NA 0x7FFFFFFF316 #define CODEC_MAKE_F09_DIGITAL(fPresent, fELDValid) \317 ( (((fPresent) & 0x1) << 31) \318 | (((fELDValid) & 0x1) << 30))319 320 #define CODEC_MAKE_F0C(lrswap, eapd, btl) ((((lrswap) & 1) << 2) | (((eapd) & 1) << 1) | ((btl) & 1))321 #define CODEC_FOC_IS_LRSWAP(f0c) RT_BOOL((f0c) & RT_BIT(2))322 #define CODEC_FOC_IS_EAPD(f0c) RT_BOOL((f0c) & RT_BIT(1))323 #define CODEC_FOC_IS_BTL(f0c) RT_BOOL((f0c) & RT_BIT(0))324 /* HDA spec 7.3.3.31 defines layout of configuration registers/verbs (0xF1C) */325 /* Configuration's port connection */326 #define CODEC_F1C_PORT_MASK (0x3)327 #define CODEC_F1C_PORT_SHIFT (30)328 329 #define CODEC_F1C_PORT_COMPLEX (0x0)330 #define CODEC_F1C_PORT_NO_PHYS (0x1)331 #define CODEC_F1C_PORT_FIXED (0x2)332 #define CODEC_F1C_BOTH (0x3)333 334 /* Configuration's location */335 #define CODEC_F1C_LOCATION_MASK (0x3F)336 #define CODEC_F1C_LOCATION_SHIFT (24)337 /* [4:5] bits of location region means chassis attachment */338 #define CODEC_F1C_LOCATION_PRIMARY_CHASSIS (0)339 #define CODEC_F1C_LOCATION_INTERNAL RT_BIT(4)340 #define CODEC_F1C_LOCATION_SECONDRARY_CHASSIS RT_BIT(5)341 #define CODEC_F1C_LOCATION_OTHER (RT_BIT(5))342 343 /* [0:3] bits of location region means geometry location attachment */344 #define CODEC_F1C_LOCATION_NA (0)345 #define CODEC_F1C_LOCATION_REAR (0x1)346 #define CODEC_F1C_LOCATION_FRONT (0x2)347 #define CODEC_F1C_LOCATION_LEFT (0x3)348 #define CODEC_F1C_LOCATION_RIGTH (0x4)349 #define CODEC_F1C_LOCATION_TOP (0x5)350 #define CODEC_F1C_LOCATION_BOTTOM (0x6)351 #define CODEC_F1C_LOCATION_SPECIAL_0 (0x7)352 #define CODEC_F1C_LOCATION_SPECIAL_1 (0x8)353 #define CODEC_F1C_LOCATION_SPECIAL_2 (0x9)354 355 /* Configuration's devices */356 #define CODEC_F1C_DEVICE_MASK (0xF)357 #define CODEC_F1C_DEVICE_SHIFT (20)358 #define CODEC_F1C_DEVICE_LINE_OUT (0)359 #define CODEC_F1C_DEVICE_SPEAKER (0x1)360 #define CODEC_F1C_DEVICE_HP (0x2)361 #define CODEC_F1C_DEVICE_CD (0x3)362 #define CODEC_F1C_DEVICE_SPDIF_OUT (0x4)363 #define CODEC_F1C_DEVICE_DIGITAL_OTHER_OUT (0x5)364 #define CODEC_F1C_DEVICE_MODEM_LINE_SIDE (0x6)365 #define CODEC_F1C_DEVICE_MODEM_HANDSET_SIDE (0x7)366 #define CODEC_F1C_DEVICE_LINE_IN (0x8)367 #define CODEC_F1C_DEVICE_AUX (0x9)368 #define CODEC_F1C_DEVICE_MIC (0xA)369 #define CODEC_F1C_DEVICE_PHONE (0xB)370 #define CODEC_F1C_DEVICE_SPDIF_IN (0xC)371 #define CODEC_F1C_DEVICE_RESERVED (0xE)372 #define CODEC_F1C_DEVICE_OTHER (0xF)373 374 /* Configuration's Connection type */375 #define CODEC_F1C_CONNECTION_TYPE_MASK (0xF)376 #define CODEC_F1C_CONNECTION_TYPE_SHIFT (16)377 378 #define CODEC_F1C_CONNECTION_TYPE_UNKNOWN (0)379 #define CODEC_F1C_CONNECTION_TYPE_1_8INCHES (0x1)380 #define CODEC_F1C_CONNECTION_TYPE_1_4INCHES (0x2)381 #define CODEC_F1C_CONNECTION_TYPE_ATAPI (0x3)382 #define CODEC_F1C_CONNECTION_TYPE_RCA (0x4)383 #define CODEC_F1C_CONNECTION_TYPE_OPTICAL (0x5)384 #define CODEC_F1C_CONNECTION_TYPE_OTHER_DIGITAL (0x6)385 #define CODEC_F1C_CONNECTION_TYPE_ANALOG (0x7)386 #define CODEC_F1C_CONNECTION_TYPE_DIN (0x8)387 #define CODEC_F1C_CONNECTION_TYPE_XLR (0x9)388 #define CODEC_F1C_CONNECTION_TYPE_RJ_11 (0xA)389 #define CODEC_F1C_CONNECTION_TYPE_COMBO (0xB)390 #define CODEC_F1C_CONNECTION_TYPE_OTHER (0xF)391 392 /* Configuration's color */393 #define CODEC_F1C_COLOR_MASK (0xF)394 #define CODEC_F1C_COLOR_SHIFT (12)395 #define CODEC_F1C_COLOR_UNKNOWN (0)396 #define CODEC_F1C_COLOR_BLACK (0x1)397 #define CODEC_F1C_COLOR_GREY (0x2)398 #define CODEC_F1C_COLOR_BLUE (0x3)399 #define CODEC_F1C_COLOR_GREEN (0x4)400 #define CODEC_F1C_COLOR_RED (0x5)401 #define CODEC_F1C_COLOR_ORANGE (0x6)402 #define CODEC_F1C_COLOR_YELLOW (0x7)403 #define CODEC_F1C_COLOR_PURPLE (0x8)404 #define CODEC_F1C_COLOR_PINK (0x9)405 #define CODEC_F1C_COLOR_RESERVED_0 (0xA)406 #define CODEC_F1C_COLOR_RESERVED_1 (0xB)407 #define CODEC_F1C_COLOR_RESERVED_2 (0xC)408 #define CODEC_F1C_COLOR_RESERVED_3 (0xD)409 #define CODEC_F1C_COLOR_WHITE (0xE)410 #define CODEC_F1C_COLOR_OTHER (0xF)411 412 /* Configuration's misc */413 #define CODEC_F1C_MISC_MASK (0xF)414 #define CODEC_F1C_MISC_SHIFT (8)415 #define CODEC_F1C_MISC_JACK_DETECT (0)416 #define CODEC_F1C_MISC_RESERVED_0 (1)417 #define CODEC_F1C_MISC_RESERVED_1 (2)418 #define CODEC_F1C_MISC_RESERVED_2 (3)419 420 /* Configuration's association */421 #define CODEC_F1C_ASSOCIATION_MASK (0xF)422 #define CODEC_F1C_ASSOCIATION_SHIFT (4)423 /* Connection's sequence */424 #define CODEC_F1C_SEQ_MASK (0xF)425 #define CODEC_F1C_SEQ_SHIFT (0)426 427 /* Implementation identification (7.3.3.30) */428 #define CODEC_MAKE_F20(bmid, bsku, aid) \429 ( (((bmid) & 0xFFFF) << 16) \430 | (((bsku) & 0xFF) << 8) \431 | (((aid) & 0xFF)) \432 )433 434 /* macro definition helping in filling the configuration registers. */435 #define CODEC_MAKE_F1C(port_connectivity, location, device, connection_type, color, misc, association, sequence) \436 ( ((port_connectivity) << CODEC_F1C_PORT_SHIFT) \437 | ((location) << CODEC_F1C_LOCATION_SHIFT) \438 | ((device) << CODEC_F1C_DEVICE_SHIFT) \439 | ((connection_type) << CODEC_F1C_CONNECTION_TYPE_SHIFT) \440 | ((color) << CODEC_F1C_COLOR_SHIFT) \441 | ((misc) << CODEC_F1C_MISC_SHIFT) \442 | ((association) << CODEC_F1C_ASSOCIATION_SHIFT) \443 | ((sequence)))444 35 445 36 … … 450 41 /* operation bitness mask */ 451 42 uint32_t mask; 452 PFN CODECVERBPROCESSOR pfn;43 PFNHDACODECVERBPROCESSOR pfn; 453 44 } CODECVERB; 454 45 #endif … … 465 56 typedef TYPE CODECNODE *PCODECNODE; 466 57 467 468 58 typedef enum 469 59 { … … 475 65 476 66 477 typedef struct CODECState67 typedef struct HDACODEC 478 68 { 479 69 uint16_t id; … … 514 104 const uint8_t u8DacLineOut; 515 105 #endif 516 DECLR3CALLBACKMEMBER(int, pfnProcess, (struct CODECState *)); 517 DECLR3CALLBACKMEMBER(void, pfnTransfer, (struct CODECState *pState, ENMSOUNDSOURCE, int avail)); 518 /* These callbacks are set by Codec implementation */ 519 DECLR3CALLBACKMEMBER(int, pfnLookup, (struct CODECState *pState, uint32_t verb, PPFNCODECVERBPROCESSOR)); 520 DECLR3CALLBACKMEMBER(int, pfnReset, (struct CODECState *pState)); 521 DECLR3CALLBACKMEMBER(int, pfnCodecNodeReset, (struct CODECState *pState, uint8_t, PCODECNODE)); 522 /* These callbacks are set by codec implementation to answer debugger requests */ 523 DECLR3CALLBACKMEMBER(void, pfnCodecDbgListNodes, (struct CODECState *pState, PCDBGFINFOHLP pHlp, const char *pszArgs)); 524 DECLR3CALLBACKMEMBER(void, pfnCodecDbgSelector, (struct CODECState *pState, PCDBGFINFOHLP pHlp, const char *pszArgs)); 525 } CODECState, *PCODECState; 526 /** The ICH HDA (Intel) codec state. */ 527 typedef CODECState HDACODEC; 528 /** Pointer to the Intel ICH HDA codec state. */ 529 typedef HDACODEC *PHDACODEC; 106 DECLR3CALLBACKMEMBER(int, pfnProcess, (PHDACODEC pCodec)); 107 DECLR3CALLBACKMEMBER(void, pfnTransfer, (PHDACODEC pCodec, ENMSOUNDSOURCE, int avail)); 108 /* These callbacks are set by Codec implementation. */ 109 DECLR3CALLBACKMEMBER(int, pfnLookup, (PHDACODEC pThis, uint32_t verb, PPFNHDACODECVERBPROCESSOR)); 110 DECLR3CALLBACKMEMBER(int, pfnReset, (PHDACODEC pThis)); 111 DECLR3CALLBACKMEMBER(int, pfnCodecNodeReset, (PHDACODEC pThis, uint8_t, PCODECNODE)); 112 /* These callbacks are set by codec implementation to answer debugger requests. */ 113 DECLR3CALLBACKMEMBER(void, pfnCodecDbgListNodes, (PHDACODEC pThis, PCDBGFINFOHLP pHlp, const char *pszArgs)); 114 DECLR3CALLBACKMEMBER(void, pfnCodecDbgSelector, (PHDACODEC pThis, PCDBGFINFOHLP pHlp, const char *pszArgs)); 115 } CODECState; 530 116 531 117 int hdaCodecConstruct(PPDMDEVINS pDevIns, PHDACODEC pThis, PCFGMNODE pCfg); -
trunk/src/VBox/Devices/Audio/DevIchIntelHDA.cpp
r44667 r44668 482 482 /** indicates if HDA in reset. */ 483 483 bool fInReset; 484 CODECState Codec; 484 /** The HDA codec state. */ 485 HDACODEC Codec; 485 486 /** 1.2.3.4.5.6.7. - someone please tell me what I'm counting! - .8.9.10... */ 486 487 uint8_t u8Counter; … … 985 986 uint8_t rirbWp; 986 987 987 PFN CODECVERBPROCESSOR pfn = (PFNCODECVERBPROCESSOR)NULL;988 PFNHDACODECVERBPROCESSOR pfn = (PFNHDACODECVERBPROCESSOR)NULL; 988 989 989 990 rc = hdaCmdSync(pThis, true); … … 999 1000 uint32_t cmd; 1000 1001 uint64_t resp; 1001 pfn = (PFNCODECVERBPROCESSOR)NULL;1002 pfn = NULL; 1002 1003 corbRp++; 1003 1004 cmd = pThis->pu32CorbBuf[corbRp]; … … 1524 1525 static int hdaRegWriteIRS(PHDASTATE pThis, uint32_t iReg, uint32_t u32Value) 1525 1526 { 1526 int rc = VINF_SUCCESS; 1527 uint64_t resp; 1528 PFNCODECVERBPROCESSOR pfn = (PFNCODECVERBPROCESSOR)NULL; 1527 int rc = VINF_SUCCESS; 1528 PFNHDACODECVERBPROCESSOR pfn = NULL; 1529 uint64_t resp; 1530 1529 1531 /* 1530 1532 * if guest set the ICB bit of IRS register, HDA should process the verb in IC register, … … 1919 1921 * @interface_method_impl{HDACODEC,pfnReset} 1920 1922 */ 1921 DECLCALLBACK(int) hdaCodecReset(CODECState *pCodecState) 1922 { 1923 PHDASTATE pThis = (PHDASTATE)pCodecState->pvHDAState; 1923 DECLCALLBACK(int) hdaCodecReset(PHDACODEC pCodec) 1924 { 1925 PHDASTATE pThis = (PHDASTATE)pCodec->pvHDAState; 1926 NOREF(pThis); 1924 1927 return VINF_SUCCESS; 1925 1928 } … … 1956 1959 * @interface_method_impl{HDACODEC,pfnTransfer} 1957 1960 */ 1958 static DECLCALLBACK(void) hdaTransfer( CODECState *pCodecState, ENMSOUNDSOURCE src, int avail)1959 { 1960 PHDASTATE pThis = (PHDASTATE)pCodecState->pvHDAState;1961 uint8_t 1962 PHDABDLEDESC pBdle= NULL;1961 static DECLCALLBACK(void) hdaTransfer(PHDACODEC pCodec, ENMSOUNDSOURCE src, int avail) 1962 { 1963 PHDASTATE pThis = (PHDASTATE)pCodec->pvHDAState; 1964 uint8_t u8Strm = 0; 1965 PHDABDLEDESC pBdle = NULL; 1963 1966 1964 1967 switch (src)
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