Changeset 44769 in vbox for trunk/src/VBox/VMM
- Timestamp:
- Feb 20, 2013 5:20:27 PM (12 years ago)
- Location:
- trunk/src/VBox/VMM
- Files:
-
- 4 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/VMM/VMMR0/HWVMXR0.cpp
r44724 r44769 266 266 PVMCPU pVCpu = &pVM->aCpus[i]; 267 267 268 pVCpu->hm.s.vmx.hMemObjV MCS= NIL_RTR0MEMOBJ;268 pVCpu->hm.s.vmx.hMemObjVmcs = NIL_RTR0MEMOBJ; 269 269 270 270 /* Allocate one page for the VM control structure (VMCS). */ 271 rc = RTR0MemObjAllocCont(&pVCpu->hm.s.vmx.hMemObjV MCS, PAGE_SIZE, false /* fExecutable */);271 rc = RTR0MemObjAllocCont(&pVCpu->hm.s.vmx.hMemObjVmcs, PAGE_SIZE, false /* fExecutable */); 272 272 AssertRC(rc); 273 273 if (RT_FAILURE(rc)) 274 274 return rc; 275 275 276 pVCpu->hm.s.vmx.pvV MCS = RTR0MemObjAddress(pVCpu->hm.s.vmx.hMemObjVMCS);277 pVCpu->hm.s.vmx.HCPhysV MCS = RTR0MemObjGetPagePhysAddr(pVCpu->hm.s.vmx.hMemObjVMCS, 0);278 ASMMemZeroPage(pVCpu->hm.s.vmx.pvV MCS);276 pVCpu->hm.s.vmx.pvVmcs = RTR0MemObjAddress(pVCpu->hm.s.vmx.hMemObjVmcs); 277 pVCpu->hm.s.vmx.HCPhysVmcs = RTR0MemObjGetPagePhysAddr(pVCpu->hm.s.vmx.hMemObjVmcs, 0); 278 ASMMemZeroPage(pVCpu->hm.s.vmx.pvVmcs); 279 279 280 280 pVCpu->hm.s.vmx.cr0_mask = 0; … … 332 332 333 333 #ifdef LOG_ENABLED 334 SUPR0Printf("VMXR0InitVM %x VMCS=%x (%x)\n", pVM, pVCpu->hm.s.vmx.pvV MCS, (uint32_t)pVCpu->hm.s.vmx.HCPhysVMCS);334 SUPR0Printf("VMXR0InitVM %x VMCS=%x (%x)\n", pVM, pVCpu->hm.s.vmx.pvVmcs, (uint32_t)pVCpu->hm.s.vmx.HCPhysVmcs); 335 335 #endif 336 336 } … … 352 352 PVMCPU pVCpu = &pVM->aCpus[i]; 353 353 354 if (pVCpu->hm.s.vmx.hMemObjV MCS!= NIL_RTR0MEMOBJ)355 { 356 RTR0MemObjFree(pVCpu->hm.s.vmx.hMemObjV MCS, false);357 pVCpu->hm.s.vmx.hMemObjV MCS= NIL_RTR0MEMOBJ;358 pVCpu->hm.s.vmx.pvV MCS= 0;359 pVCpu->hm.s.vmx.HCPhysV MCS= 0;354 if (pVCpu->hm.s.vmx.hMemObjVmcs != NIL_RTR0MEMOBJ) 355 { 356 RTR0MemObjFree(pVCpu->hm.s.vmx.hMemObjVmcs, false); 357 pVCpu->hm.s.vmx.hMemObjVmcs = NIL_RTR0MEMOBJ; 358 pVCpu->hm.s.vmx.pvVmcs = 0; 359 pVCpu->hm.s.vmx.HCPhysVmcs = 0; 360 360 } 361 361 if (pVCpu->hm.s.vmx.hMemObjVirtApic != NIL_RTR0MEMOBJ) … … 496 496 PVMCPU pVCpu = &pVM->aCpus[i]; 497 497 498 AssertPtr(pVCpu->hm.s.vmx.pvV MCS);498 AssertPtr(pVCpu->hm.s.vmx.pvVmcs); 499 499 500 500 /* Set revision dword at the beginning of the VMCS structure. */ 501 *(uint32_t *)pVCpu->hm.s.vmx.pvV MCS= MSR_IA32_VMX_BASIC_INFO_VMCS_ID(pVM->hm.s.vmx.msr.vmx_basic_info);501 *(uint32_t *)pVCpu->hm.s.vmx.pvVmcs = MSR_IA32_VMX_BASIC_INFO_VMCS_ID(pVM->hm.s.vmx.msr.vmx_basic_info); 502 502 503 503 /* 504 504 * Clear and activate the VMCS. 505 505 */ 506 Log(("HCPhysV MCS = %RHp\n", pVCpu->hm.s.vmx.HCPhysVMCS));507 rc = VMXClearVMCS(pVCpu->hm.s.vmx.HCPhysV MCS);506 Log(("HCPhysVmcs = %RHp\n", pVCpu->hm.s.vmx.HCPhysVmcs)); 507 rc = VMXClearVMCS(pVCpu->hm.s.vmx.HCPhysVmcs); 508 508 if (RT_FAILURE(rc)) 509 509 goto vmx_end; 510 510 511 rc = VMXActivateVMCS(pVCpu->hm.s.vmx.HCPhysV MCS);511 rc = VMXActivateVMCS(pVCpu->hm.s.vmx.HCPhysVmcs); 512 512 if (RT_FAILURE(rc)) 513 513 goto vmx_end; … … 722 722 * VMCS data back to memory. 723 723 */ 724 rc = VMXClearVMCS(pVCpu->hm.s.vmx.HCPhysV MCS);724 rc = VMXClearVMCS(pVCpu->hm.s.vmx.HCPhysVmcs); 725 725 AssertRC(rc); 726 726 … … 4911 4911 /* Try to extract more information about what might have gone wrong here. */ 4912 4912 VMXGetActivateVMCS(&pVCpu->hm.s.vmx.lasterror.u64VMCSPhys); 4913 pVCpu->hm.s.vmx.lasterror.u32VMCSRevision = *(uint32_t *)pVCpu->hm.s.vmx.pvV MCS;4913 pVCpu->hm.s.vmx.lasterror.u32VMCSRevision = *(uint32_t *)pVCpu->hm.s.vmx.pvVmcs; 4914 4914 pVCpu->hm.s.vmx.lasterror.idEnteredCpu = pVCpu->hm.s.idEnteredCpu; 4915 4915 pVCpu->hm.s.vmx.lasterror.idCurrentCpu = RTMpCpuId(); … … 4954 4954 4955 4955 /* Activate the VMCS. */ 4956 int rc = VMXActivateVMCS(pVCpu->hm.s.vmx.HCPhysV MCS);4956 int rc = VMXActivateVMCS(pVCpu->hm.s.vmx.HCPhysVmcs); 4957 4957 if (RT_FAILURE(rc)) 4958 4958 return rc; … … 5006 5006 * VMCS data back to memory. 5007 5007 */ 5008 int rc = VMXClearVMCS(pVCpu->hm.s.vmx.HCPhysV MCS);5008 int rc = VMXClearVMCS(pVCpu->hm.s.vmx.HCPhysVmcs); 5009 5009 AssertRC(rc); 5010 5010 … … 5330 5330 #ifdef DEBUG 5331 5331 pCache->TestIn.HCPhysCpuPage= 0; 5332 pCache->TestIn.HCPhysV MCS= 0;5332 pCache->TestIn.HCPhysVmcs = 0; 5333 5333 pCache->TestIn.pCache = 0; 5334 pCache->TestOut.HCPhysV MCS= 0;5334 pCache->TestOut.HCPhysVmcs = 0; 5335 5335 pCache->TestOut.pCache = 0; 5336 5336 pCache->TestOut.pCtx = 0; … … 5340 5340 aParam[0] = (uint32_t)(HCPhysCpuPage); /* Param 1: VMXON physical address - Lo. */ 5341 5341 aParam[1] = (uint32_t)(HCPhysCpuPage >> 32); /* Param 1: VMXON physical address - Hi. */ 5342 aParam[2] = (uint32_t)(pVCpu->hm.s.vmx.HCPhysV MCS); /* Param 2: VMCS physical address - Lo. */5343 aParam[3] = (uint32_t)(pVCpu->hm.s.vmx.HCPhysV MCS>> 32); /* Param 2: VMCS physical address - Hi. */5342 aParam[2] = (uint32_t)(pVCpu->hm.s.vmx.HCPhysVmcs); /* Param 2: VMCS physical address - Lo. */ 5343 aParam[3] = (uint32_t)(pVCpu->hm.s.vmx.HCPhysVmcs >> 32); /* Param 2: VMCS physical address - Hi. */ 5344 5344 aParam[4] = VM_RC_ADDR(pVM, &pVM->aCpus[pVCpu->idCpu].hm.s.vmx.VMCSCache); 5345 5345 aParam[5] = 0; … … 5359 5359 #ifdef DEBUG 5360 5360 AssertMsg(pCache->TestIn.HCPhysCpuPage== HCPhysCpuPage, ("%RHp vs %RHp\n", pCache->TestIn.HCPhysCpuPage, HCPhysCpuPage)); 5361 AssertMsg(pCache->TestIn.HCPhysV MCS == pVCpu->hm.s.vmx.HCPhysVMCS, ("%RHp vs %RHp\n", pCache->TestIn.HCPhysVMCS,5362 pVCpu->hm.s.vmx.HCPhysV MCS));5363 AssertMsg(pCache->TestIn.HCPhysV MCS == pCache->TestOut.HCPhysVMCS, ("%RHp vs %RHp\n", pCache->TestIn.HCPhysVMCS,5364 pCache->TestOut.HCPhysV MCS));5361 AssertMsg(pCache->TestIn.HCPhysVmcs == pVCpu->hm.s.vmx.HCPhysVmcs, ("%RHp vs %RHp\n", pCache->TestIn.HCPhysVmcs, 5362 pVCpu->hm.s.vmx.HCPhysVmcs)); 5363 AssertMsg(pCache->TestIn.HCPhysVmcs == pCache->TestOut.HCPhysVmcs, ("%RHp vs %RHp\n", pCache->TestIn.HCPhysVmcs, 5364 pCache->TestOut.HCPhysVmcs)); 5365 5365 AssertMsg(pCache->TestIn.pCache == pCache->TestOut.pCache, ("%RGv vs %RGv\n", pCache->TestIn.pCache, 5366 5366 pCache->TestOut.pCache)); … … 5518 5518 5519 5519 /* Clear VMCS. Marking it inactive, clearing implementation-specific data and writing VMCS data back to memory. */ 5520 VMXClearVMCS(pVCpu->hm.s.vmx.HCPhysV MCS);5520 VMXClearVMCS(pVCpu->hm.s.vmx.HCPhysVmcs); 5521 5521 5522 5522 /* Leave VMX Root Mode. */ … … 5548 5548 } 5549 5549 5550 rc2 = VMXActivateVMCS(pVCpu->hm.s.vmx.HCPhysV MCS);5550 rc2 = VMXActivateVMCS(pVCpu->hm.s.vmx.HCPhysVmcs); 5551 5551 AssertRC(rc2); 5552 5552 Assert(!(ASMGetFlags() & X86_EFL_IF)); -
trunk/src/VBox/VMM/VMMR3/HM.cpp
r44724 r44769 1141 1141 { 1142 1142 LogRel(("HM: VCPU%d: MSR bitmap physaddr = %RHp\n", i, pVM->aCpus[i].hm.s.vmx.HCPhysMsrBitmap)); 1143 LogRel(("HM: VCPU%d: VMCS physaddr = %RHp\n", i, pVM->aCpus[i].hm.s.vmx.HCPhysV MCS));1143 LogRel(("HM: VCPU%d: VMCS physaddr = %RHp\n", i, pVM->aCpus[i].hm.s.vmx.HCPhysVmcs)); 1144 1144 } 1145 1145 … … 2731 2731 2732 2732 case VERR_VMX_INVALID_VMCS_PTR: 2733 LogRel(("VERR_VMX_INVALID_VMCS_PTR: CPU%d Current pointer %RGp vs %RGp\n", i, pVM->aCpus[i].hm.s.vmx.lasterror.u64VMCSPhys, pVM->aCpus[i].hm.s.vmx.HCPhysV MCS));2733 LogRel(("VERR_VMX_INVALID_VMCS_PTR: CPU%d Current pointer %RGp vs %RGp\n", i, pVM->aCpus[i].hm.s.vmx.lasterror.u64VMCSPhys, pVM->aCpus[i].hm.s.vmx.HCPhysVmcs)); 2734 2734 LogRel(("VERR_VMX_INVALID_VMCS_PTR: CPU%d Current VMCS version %x\n", i, pVM->aCpus[i].hm.s.vmx.lasterror.u32VMCSRevision)); 2735 2735 LogRel(("VERR_VMX_INVALID_VMCS_PTR: CPU%d Entered Cpu %d\n", i, pVM->aCpus[i].hm.s.vmx.lasterror.idEnteredCpu)); -
trunk/src/VBox/VMM/include/HMInternal.h
r44528 r44769 529 529 { 530 530 /** Physical address of the VM control structure (VMCS). */ 531 RTHCPHYS HCPhysV MCS;531 RTHCPHYS HCPhysVmcs; 532 532 /** R0 memory object for the VM control structure (VMCS). */ 533 RTR0MEMOBJ hMemObjV MCS;533 RTR0MEMOBJ hMemObjVmcs; 534 534 /** Virtual address of the VM control structure (VMCS). */ 535 R0PTRTYPE(void *) pvV MCS;535 R0PTRTYPE(void *) pvVmcs; 536 536 /** Ring 0 handlers for VT-x. */ 537 537 PFNHMVMXSTARTVM pfnStartVM; -
trunk/src/VBox/VMM/testcase/tstVMStructSize.cpp
r44528 r44769 400 400 CHECK_MEMBER_ALIGNMENT(HM, StatTprPatchSuccess, 8); 401 401 CHECK_MEMBER_ALIGNMENT(HMCPU, StatEntry, 8); 402 CHECK_MEMBER_ALIGNMENT(HMCPU, vmx.HCPhysV MCS, sizeof(RTHCPHYS));402 CHECK_MEMBER_ALIGNMENT(HMCPU, vmx.HCPhysVmcs, sizeof(RTHCPHYS)); 403 403 CHECK_MEMBER_ALIGNMENT(HMCPU, vmx.u32ProcCtls, 8); 404 404 CHECK_MEMBER_ALIGNMENT(HMCPU, Event.u64IntrInfo, 8);
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