- Timestamp:
- Mar 1, 2013 8:37:37 PM (12 years ago)
- File:
-
- 1 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/Devices/Network/DevPCNet.cpp
r44892 r44895 3400 3400 { 3401 3401 PPCNETSTATE pThis = PDMINS_2_DATA(pDevIns, PPCNETSTATE); 3402 int rc; 3403 3402 int rc = VINF_SUCCESS; 3404 3403 STAM_PROFILE_ADV_START(&pThis->StatAPROMRead, a); 3405 rc = PDMCritSectEnter(&pThis->CritSect, VINF_IOM_R3_IOPORT_WRITE); 3406 if (rc == VINF_SUCCESS) 3407 { 3408 3409 /* FreeBSD is accessing in dwords. */ 3410 if (cb == 1) 3411 *pu32 = pcnetAPROMReadU8(pThis, Port); 3412 else if (cb == 2 && !BCR_DWIO(pThis)) 3413 *pu32 = pcnetAPROMReadU8(pThis, Port) 3414 | (pcnetAPROMReadU8(pThis, Port + 1) << 8); 3415 else if (cb == 4 && BCR_DWIO(pThis)) 3416 *pu32 = pcnetAPROMReadU8(pThis, Port) 3417 | (pcnetAPROMReadU8(pThis, Port + 1) << 8) 3418 | (pcnetAPROMReadU8(pThis, Port + 2) << 16) 3419 | (pcnetAPROMReadU8(pThis, Port + 3) << 24); 3420 else 3421 { 3422 Log(("#%d pcnetIOPortAPromRead: Port=%RTiop cb=%d BCR_DWIO !!\n", PCNET_INST_NR, Port, cb)); 3423 rc = VERR_IOM_IOPORT_UNUSED; 3424 } 3425 PDMCritSectLeave(&pThis->CritSect); 3426 } 3404 Assert(PDMCritSectIsOwner(&pThis->CritSect)); 3405 3406 3407 /* FreeBSD is accessing in dwords. */ 3408 if (cb == 1) 3409 *pu32 = pcnetAPROMReadU8(pThis, Port); 3410 else if (cb == 2 && !BCR_DWIO(pThis)) 3411 *pu32 = pcnetAPROMReadU8(pThis, Port) 3412 | (pcnetAPROMReadU8(pThis, Port + 1) << 8); 3413 else if (cb == 4 && BCR_DWIO(pThis)) 3414 *pu32 = pcnetAPROMReadU8(pThis, Port) 3415 | (pcnetAPROMReadU8(pThis, Port + 1) << 8) 3416 | (pcnetAPROMReadU8(pThis, Port + 2) << 16) 3417 | (pcnetAPROMReadU8(pThis, Port + 3) << 24); 3418 else 3419 { 3420 Log(("#%d pcnetIOPortAPromRead: Port=%RTiop cb=%d BCR_DWIO !!\n", PCNET_INST_NR, Port, cb)); 3421 rc = VERR_IOM_IOPORT_UNUSED; 3422 } 3423 3427 3424 STAM_PROFILE_ADV_STOP(&pThis->StatAPROMRead, a); 3428 3425 LogFlow(("#%d pcnetIOPortAPromRead: Port=%RTiop *pu32=%#RX32 cb=%d rc=%Rrc\n", PCNET_INST_NR, Port, *pu32, cb, rc)); … … 3437 3434 { 3438 3435 PPCNETSTATE pThis = PDMINS_2_DATA(pDevIns, PPCNETSTATE); 3439 int rc; 3436 int rc = VINF_SUCCESS; 3437 Assert(PDMCritSectIsOwner(&pThis->CritSect)); 3440 3438 3441 3439 if (cb == 1) 3442 3440 { 3443 3441 STAM_PROFILE_ADV_START(&pThis->StatAPROMWrite, a); 3444 rc = PDMCritSectEnter(&pThis->CritSect, VINF_IOM_R3_IOPORT_WRITE); 3445 if (RT_LIKELY(rc == VINF_SUCCESS)) 3446 { 3447 pcnetAPROMWriteU8(pThis, Port, u32); 3448 PDMCritSectLeave(&pThis->CritSect); 3449 } 3442 pcnetAPROMWriteU8(pThis, Port, u32); 3450 3443 STAM_PROFILE_ADV_STOP(&pThis->StatAPROMWrite, a); 3451 3444 } 3452 3445 else 3453 { 3454 AssertMsgFailed(("Port=%#x cb=%d u32=%#x\n", Port, cb, u32)); 3455 rc = VINF_SUCCESS; 3456 } 3446 rc = PDMDevHlpDBGFStop(pDevIns, RT_SRC_POS, "Port=%#x cb=%d u32=%#x\n", Port, cb, u32); 3447 3457 3448 LogFlow(("#%d pcnetIOPortAPromWrite: Port=%RTiop u32=%#RX32 cb=%d rc=%Rrc\n", PCNET_INST_NR, Port, u32, cb, rc)); 3458 #ifdef LOG_ENABLED3459 if (rc == VINF_IOM_R3_IOPORT_WRITE)3460 LogFlow(("#%d => HC\n", PCNET_INST_NR));3461 #endif3462 3449 return rc; 3463 3450 } … … 3681 3668 PPCNETSTATE pThis = PDMINS_2_DATA(pDevIns, PPCNETSTATE); 3682 3669 int rc = VINF_SUCCESS; 3683 3684 3670 STAM_PROFILE_ADV_START(&pThis->CTX_SUFF_Z(StatIORead), a); 3685 rc = PDMCritSectEnter(&pThis->CritSect, VINF_IOM_R3_IOPORT_READ); 3686 if (RT_LIKELY(rc == VINF_SUCCESS)) 3687 { 3688 switch (cb) 3689 { 3690 case 1: *pu32 = pcnetIoportReadU8(pThis, Port, &rc); break; 3691 case 2: *pu32 = pcnetIoportReadU16(pThis, Port, &rc); break; 3692 case 4: *pu32 = pcnetIoportReadU32(pThis, Port, &rc); break; 3693 default: 3694 rc = PDMDevHlpDBGFStop(pThis->CTX_SUFF(pDevIns), RT_SRC_POS, 3695 "pcnetIOPortRead: unsupported op size: offset=%#10x cb=%u\n", 3696 Port, cb); 3697 } 3698 PDMCritSectLeave(&pThis->CritSect); 3699 } 3671 Assert(PDMCritSectIsOwner(&pThis->CritSect)); 3672 3673 switch (cb) 3674 { 3675 case 1: *pu32 = pcnetIoportReadU8(pThis, Port, &rc); break; 3676 case 2: *pu32 = pcnetIoportReadU16(pThis, Port, &rc); break; 3677 case 4: *pu32 = pcnetIoportReadU32(pThis, Port, &rc); break; 3678 default: 3679 rc = PDMDevHlpDBGFStop(pThis->CTX_SUFF(pDevIns), RT_SRC_POS, 3680 "pcnetIOPortRead: unsupported op size: offset=%#10x cb=%u\n", 3681 Port, cb); 3682 } 3683 3684 Log2(("#%d pcnetIOPortRead: Port=%RTiop *pu32=%#RX32 cb=%d rc=%Rrc\n", PCNET_INST_NR, Port, *pu32, cb, rc)); 3700 3685 STAM_PROFILE_ADV_STOP(&pThis->CTX_SUFF_Z(StatIORead), a); 3701 Log2(("#%d pcnetIOPortRead: Port=%RTiop *pu32=%#RX32 cb=%d rc=%Rrc\n", PCNET_INST_NR, Port, *pu32, cb, rc));3702 #ifdef LOG_ENABLED3703 if (rc == VINF_IOM_R3_IOPORT_READ)3704 LogFlow(("#%d pcnetIOPortRead/critsect failed in GC => HC\n", PCNET_INST_NR));3705 #endif3706 3686 return rc; 3707 3687 } … … 3715 3695 PPCNETSTATE pThis = PDMINS_2_DATA(pDevIns, PPCNETSTATE); 3716 3696 int rc = VINF_SUCCESS; 3717 3718 3697 STAM_PROFILE_ADV_START(&pThis->CTX_SUFF_Z(StatIOWrite), a); 3719 rc = PDMCritSectEnter(&pThis->CritSect, VINF_IOM_R3_IOPORT_WRITE); 3720 if (RT_LIKELY(rc == VINF_SUCCESS)) 3721 { 3722 switch (cb) 3723 { 3724 case 1: rc = pcnetIoportWriteU8(pThis, Port, u32); break; 3725 case 2: rc = pcnetIoportWriteU16(pThis, Port, u32); break; 3726 case 4: rc = pcnetIoportWriteU32(pThis, Port, u32); break; 3727 default: 3728 rc = PDMDevHlpDBGFStop(pThis->CTX_SUFF(pDevIns), RT_SRC_POS, 3729 "pcnetIOPortWrite: unsupported op size: offset=%#10x cb=%u\n", 3730 Port, cb); 3731 } 3732 PDMCritSectLeave(&pThis->CritSect); 3733 } 3698 Assert(PDMCritSectIsOwner(&pThis->CritSect)); 3699 3700 switch (cb) 3701 { 3702 case 1: rc = pcnetIoportWriteU8(pThis, Port, u32); break; 3703 case 2: rc = pcnetIoportWriteU16(pThis, Port, u32); break; 3704 case 4: rc = pcnetIoportWriteU32(pThis, Port, u32); break; 3705 default: 3706 rc = PDMDevHlpDBGFStop(pThis->CTX_SUFF(pDevIns), RT_SRC_POS, 3707 "pcnetIOPortWrite: unsupported op size: offset=%#10x cb=%u\n", 3708 Port, cb); 3709 } 3710 3711 Log2(("#%d pcnetIOPortWrite: Port=%RTiop u32=%#RX32 cb=%d rc=%Rrc\n", PCNET_INST_NR, Port, u32, cb, rc)); 3734 3712 STAM_PROFILE_ADV_STOP(&pThis->CTX_SUFF_Z(StatIOWrite), a); 3735 Log2(("#%d pcnetIOPortWrite: Port=%RTiop u32=%#RX32 cb=%d rc=%Rrc\n", PCNET_INST_NR, Port, u32, cb, rc));3736 #ifdef LOG_ENABLED3737 if (rc == VINF_IOM_R3_IOPORT_WRITE)3738 LogFlow(("#%d pcnetIOPortWrite/critsect failed in GC => HC\n", PCNET_INST_NR));3739 #endif3740 3713 return rc; 3741 3714 } … … 3844 3817 PPCNETSTATE pThis = (PPCNETSTATE)pvUser; 3845 3818 int rc = VINF_SUCCESS; 3819 Assert(PDMCritSectIsOwner(&pThis->CritSect)); 3846 3820 3847 3821 /* … … 3851 3825 { 3852 3826 STAM_PROFILE_ADV_START(&pThis->CTX_SUFF_Z(StatMMIORead), a); 3853 rc = PDMCritSectEnter(&pThis->CritSect, VINF_IOM_R3_MMIO_READ); 3854 if (RT_LIKELY(rc == VINF_SUCCESS)) 3827 switch (cb) 3855 3828 { 3856 switch (cb) 3857 { 3858 case 1: *(uint8_t *)pv = pcnetMMIOReadU8 (pThis, GCPhysAddr); break; 3859 case 2: *(uint16_t *)pv = pcnetMMIOReadU16(pThis, GCPhysAddr); break; 3860 case 4: *(uint32_t *)pv = pcnetMMIOReadU32(pThis, GCPhysAddr); break; 3861 default: 3862 rc = PDMDevHlpDBGFStop(pThis->CTX_SUFF(pDevIns), RT_SRC_POS, 3863 "pcnetMMIORead: unsupported op size: address=%RGp cb=%u\n", 3864 GCPhysAddr, cb); 3865 } 3866 PDMCritSectLeave(&pThis->CritSect); 3829 case 1: *(uint8_t *)pv = pcnetMMIOReadU8 (pThis, GCPhysAddr); break; 3830 case 2: *(uint16_t *)pv = pcnetMMIOReadU16(pThis, GCPhysAddr); break; 3831 case 4: *(uint32_t *)pv = pcnetMMIOReadU32(pThis, GCPhysAddr); break; 3832 default: 3833 rc = PDMDevHlpDBGFStop(pThis->CTX_SUFF(pDevIns), RT_SRC_POS, 3834 "pcnetMMIORead: unsupported op size: address=%RGp cb=%u\n", 3835 GCPhysAddr, cb); 3867 3836 } 3868 3837 STAM_PROFILE_ADV_STOP(&pThis->CTX_SUFF_Z(StatMMIORead), a); … … 3873 3842 LogFlow(("#%d pcnetMMIORead: pvUser=%p:{%.*Rhxs} cb=%d GCPhysAddr=%RGp rc=%Rrc\n", 3874 3843 PCNET_INST_NR, pv, cb, pv, cb, GCPhysAddr, rc)); 3875 #ifdef LOG_ENABLED3876 if (rc == VINF_IOM_R3_MMIO_READ)3877 LogFlow(("#%d => HC\n", PCNET_INST_NR));3878 #endif3879 3844 return rc; 3880 3845 } … … 3888 3853 PPCNETSTATE pThis = (PPCNETSTATE)pvUser; 3889 3854 int rc = VINF_SUCCESS; 3855 Assert(PDMCritSectIsOwner(&pThis->CritSect)); 3890 3856 3891 3857 /* … … 3895 3861 { 3896 3862 STAM_PROFILE_ADV_START(&pThis->CTX_SUFF_Z(StatMMIOWrite), a); 3897 rc = PDMCritSectEnter(&pThis->CritSect, VINF_IOM_R3_MMIO_WRITE); 3898 if (RT_LIKELY(rc == VINF_SUCCESS)) 3863 switch (cb) 3899 3864 { 3900 switch (cb) 3901 { 3902 case 1: pcnetMMIOWriteU8 (pThis, GCPhysAddr, *(uint8_t *)pv); break; 3903 case 2: pcnetMMIOWriteU16(pThis, GCPhysAddr, *(uint16_t *)pv); break; 3904 case 4: pcnetMMIOWriteU32(pThis, GCPhysAddr, *(uint32_t *)pv); break; 3905 default: 3906 rc = PDMDevHlpDBGFStop(pThis->CTX_SUFF(pDevIns), RT_SRC_POS, 3907 "pcnetMMIOWrite: unsupported op size: address=%RGp cb=%u\n", 3908 GCPhysAddr, cb); 3909 } 3910 PDMCritSectLeave(&pThis->CritSect); 3865 case 1: pcnetMMIOWriteU8 (pThis, GCPhysAddr, *(uint8_t *)pv); break; 3866 case 2: pcnetMMIOWriteU16(pThis, GCPhysAddr, *(uint16_t *)pv); break; 3867 case 4: pcnetMMIOWriteU32(pThis, GCPhysAddr, *(uint32_t *)pv); break; 3868 default: 3869 rc = PDMDevHlpDBGFStop(pThis->CTX_SUFF(pDevIns), RT_SRC_POS, 3870 "pcnetMMIOWrite: unsupported op size: address=%RGp cb=%u\n", 3871 GCPhysAddr, cb); 3911 3872 } 3912 // else rc == VINF_IOM_R3_MMIO_WRITE => handle in ring33913 3873 3914 3874 STAM_PROFILE_ADV_STOP(&pThis->CTX_SUFF_Z(StatMMIOWrite), a); … … 3916 3876 LogFlow(("#%d pcnetMMIOWrite: pvUser=%p:{%.*Rhxs} cb=%d GCPhysAddr=%RGp rc=%Rrc\n", 3917 3877 PCNET_INST_NR, pv, cb, pv, cb, GCPhysAddr, rc)); 3918 #ifdef LOG_ENABLED3919 if (rc == VINF_IOM_R3_MMIO_WRITE)3920 LogFlow(("#%d => HC\n", PCNET_INST_NR));3921 #endif3922 3878 return rc; 3923 3879 } … … 4059 4015 Assert(cb >= PCNET_PNPMMIO_SIZE); 4060 4016 4061 /* We use the assigned size here, because we currentlyonly support page aligned MMIO ranges. */4017 /* We use the assigned size here, because we only support page aligned MMIO ranges. */ 4062 4018 rc = PDMDevHlpMMIORegister(pPciDev->pDevIns, GCPhysAddress, cb, pThis, 4063 4019 IOMMMIO_FLAGS_READ_PASSTHRU | IOMMMIO_FLAGS_WRITE_PASSTHRU, … … 5081 5037 5082 5038 /* 5039 * We use own critical section (historical reasons). 5040 */ 5041 rc = PDMDevHlpCritSectInit(pDevIns, &pThis->CritSect, RT_SRC_POS, "PCNet#%u", iInstance); 5042 AssertRCReturn(rc, rc); 5043 rc = PDMDevHlpSetDeviceCritSect(pDevIns, &pThis->CritSect); 5044 AssertRCReturn(rc, rc); 5045 5046 rc = RTSemEventCreate(&pThis->hEventOutOfRxSpace); 5047 AssertRCReturn(rc, rc); 5048 5049 /* 5083 5050 * Register the PCI device, its I/O regions, the timer and the saved state item. 5084 5051 */ … … 5086 5053 if (RT_FAILURE(rc)) 5087 5054 return rc; 5088 rc = PDMDevHlpPCIIORegionRegister(pDevIns, 0, PCNET_IOPORT_SIZE, 5089 PCI_ADDRESS_SPACE_IO, pcnetIOPortMap); 5055 rc = PDMDevHlpPCIIORegionRegister(pDevIns, 0, PCNET_IOPORT_SIZE, PCI_ADDRESS_SPACE_IO, pcnetIOPortMap); 5090 5056 if (RT_FAILURE(rc)) 5091 5057 return rc; 5092 rc = PDMDevHlpPCIIORegionRegister(pDevIns, 1, PCNET_PNPMMIO_SIZE, 5093 PCI_ADDRESS_SPACE_MEM, pcnetMMIOMap); 5058 rc = PDMDevHlpPCIIORegionRegister(pDevIns, 1, PCNET_PNPMMIO_SIZE, PCI_ADDRESS_SPACE_MEM, pcnetMMIOMap); 5094 5059 if (RT_FAILURE(rc)) 5095 5060 return rc; … … 5125 5090 return rc; 5126 5091 } 5127 5128 /*5129 * Initialize critical section.5130 * This must be done before register the critsect with the timer code, and also before5131 * attaching drivers or anything else that may call us back.5132 */5133 rc = PDMDevHlpCritSectInit(pDevIns, &pThis->CritSect, RT_SRC_POS, "PCNet#%u", iInstance);5134 if (RT_FAILURE(rc))5135 return rc;5136 5137 rc = RTSemEventCreate(&pThis->hEventOutOfRxSpace);5138 AssertRC(rc);5139 5092 5140 5093 #ifdef PCNET_NO_POLLING
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