VirtualBox

Changeset 45103 in vbox for trunk/src/VBox/VMM


Ignore:
Timestamp:
Mar 20, 2013 11:13:27 AM (12 years ago)
Author:
vboxsync
Message:

PGMPool: Eliminated fictive page (except NIL). #6367

Location:
trunk/src/VBox/VMM
Files:
8 edited

Legend:

Unmodified
Added
Removed

  • trunk/src/VBox/VMM/VMMAll/PGMAll.cpp

    r44528 r45103  
    12301230
    12311231        rc = pgmPoolAlloc(pVM, GCPml4, PGMPOOLKIND_EPT_PDPT_FOR_PHYS, PGMPOOLACCESS_DONTCARE, PGM_A20_IS_ENABLED(pVCpu),
    1232                           PGMPOOL_IDX_NESTED_ROOT, iPml4, false /*fLockPage*/,
     1232                          pVCpu->pgm.s.CTX_SUFF(pShwPageCR3)->idx, iPml4, false /*fLockPage*/,
    12331233                          &pShwPage);
    12341234        AssertRCReturn(rc, rc);

  • trunk/src/VBox/VMM/VMMAll/PGMAllBth.h

    r44528 r45103  
    45824582    PPGMPOOL     pPool             = pVM->pgm.s.CTX_SUFF(pPool);
    45834583    PPGMPOOLPAGE pOldShwPageCR3    = pVCpu->pgm.s.CTX_SUFF(pShwPageCR3);
    4584     uint32_t     iOldShwUserTable  = pVCpu->pgm.s.iShwUserTable;
    4585     uint32_t     iOldShwUser       = pVCpu->pgm.s.iShwUser;
    45864584    PPGMPOOLPAGE pNewShwPageCR3;
    45874585
    … …  
    45954593    Assert(!(GCPhysCR3 >> (PAGE_SHIFT + 32)));
    45964594    rc = pgmPoolAlloc(pVM, GCPhysCR3 & GST_CR3_PAGE_MASK, BTH_PGMPOOLKIND_ROOT, PGMPOOLACCESS_DONTCARE, PGM_A20_IS_ENABLED(pVCpu),
    4597                       SHW_POOL_ROOT_IDX, GCPhysCR3 >> PAGE_SHIFT, true /*fLockPage*/,
     4595                      NIL_PGMPOOL_IDX, UINT32_MAX, true /*fLockPage*/,
    45984596                      &pNewShwPageCR3);
    45994597    AssertFatalRC(rc);
    … …  
    46124610#  endif
    46134611
    4614     pVCpu->pgm.s.iShwUser      = SHW_POOL_ROOT_IDX;
    4615     pVCpu->pgm.s.iShwUserTable = GCPhysCR3 >> PAGE_SHIFT;
    46164612    pVCpu->pgm.s.CTX_SUFF(pShwPageCR3) = pNewShwPageCR3;
    46174613#  ifdef IN_RING0
    … …  
    46604656        pgmPoolUnlockPage(pPool, pOldShwPageCR3);
    46614657
    4662         pgmPoolFreeByPage(pPool, pOldShwPageCR3, iOldShwUser, iOldShwUserTable);
     4658        pgmPoolFreeByPage(pPool, pOldShwPageCR3, NIL_PGMPOOL_IDX, UINT32_MAX);
    46634659    }
    46644660    pgmUnlock(pVM);
    … …  
    47434739        PPGMPOOL pPool = pVM->pgm.s.CTX_SUFF(pPool);
    47444740
    4745         Assert(pVCpu->pgm.s.iShwUser != PGMPOOL_IDX_NESTED_ROOT);
    4746 
    47474741# ifdef PGMPOOL_WITH_OPTIMIZED_DIRTY_PT
    47484742        if (pPool->cDirtyPages)
    … …  
    47534747        pgmPoolUnlockPage(pPool, pVCpu->pgm.s.CTX_SUFF(pShwPageCR3));
    47544748
    4755         pgmPoolFreeByPage(pPool, pVCpu->pgm.s.CTX_SUFF(pShwPageCR3), pVCpu->pgm.s.iShwUser, pVCpu->pgm.s.iShwUserTable);
     4749        pgmPoolFreeByPage(pPool, pVCpu->pgm.s.CTX_SUFF(pShwPageCR3), NIL_PGMPOOL_IDX, UINT32_MAX);
    47564750        pVCpu->pgm.s.pShwPageCR3R3 = 0;
    47574751        pVCpu->pgm.s.pShwPageCR3R0 = 0;
    47584752        pVCpu->pgm.s.pShwPageCR3RC = 0;
    4759         pVCpu->pgm.s.iShwUser      = 0;
    4760         pVCpu->pgm.s.iShwUserTable = 0;
    47614753    }
    47624754    pgmUnlock(pVM);

  • trunk/src/VBox/VMM/VMMAll/PGMAllPool.cpp

    r43387 r45103  
    55
    66/*
    7  * Copyright (C) 2006-2012 Oracle Corporation
     7 * Copyright (C) 2006-2013 Oracle Corporation
    88 *
    99 * This file is part of VirtualBox Open Source Edition (OSE), as
    … …  
    20142014    {
    20152015        uint16_t iToFree = pPool->iAgeTail;
    2016         if (iToFree == iUser)
     2016        if (iToFree == iUser && iUser != NIL_PGMPOOL_IDX)
    20172017            iToFree = pPool->aPages[iToFree].iAgePrev;
    20182018/* This is the alternative to the SyncCR3 pgmPoolCacheUsed calls.
    … …  
    21732173 * @param   enmAccess   Access type for the mapping (only relevant for big pages)
    21742174 * @param   fA20Enabled Whether the CPU has the A20 gate enabled.
    2175  * @param   iUser       The shadow page pool index of the user table.
    2176  * @param   iUserTable  The index into the user table (shadowed).
     2175 * @param   iUser       The shadow page pool index of the user table.  This is
     2176 *                      NIL_PGMPOOL_IDX for root pages.
     2177 * @param   iUserTable  The index into the user table (shadowed).  Ignored if
     2178 *                      root page
    21772179 * @param   ppPage      Where to store the pointer to the page.
    21782180 */
    … …  
    22022204                    pgmPoolCacheUsed(pPool, pPage);
    22032205
    2204                     int rc = pgmPoolTrackAddUser(pPool, pPage, iUser, iUserTable);
     2206                    int rc = VINF_SUCCESS;
     2207                    if (iUser != NIL_PGMPOOL_IDX)
     2208                        rc = pgmPoolTrackAddUser(pPool, pPage, iUser, iUserTable);
    22052209                    if (RT_SUCCESS(rc))
    22062210                    {
    … …  
    28052809    LogFlow(("pgmPoolTrackInsert GCPhys=%RGp iUser=%d iUserTable=%x\n", GCPhys, iUser, iUserTable));
    28062810
     2811    if (iUser != NIL_PGMPOOL_IDX)
     2812    {
    28072813#ifdef VBOX_STRICT
    2808     /*
    2809      * Check that the entry doesn't already exists.
    2810      */
    2811     if (pPage->iUserHead != NIL_PGMPOOL_USER_INDEX)
    2812     {
    2813         uint16_t i = pPage->iUserHead;
    2814         do
    2815         {
    2816             Assert(i < pPool->cMaxUsers);
    2817             AssertMsg(paUsers[i].iUser != iUser || paUsers[i].iUserTable != iUserTable, ("%x %x vs new %x %x\n", paUsers[i].iUser, paUsers[i].iUserTable, iUser, iUserTable));
    2818             i = paUsers[i].iNext;
    2819         } while (i != NIL_PGMPOOL_USER_INDEX);
    2820     }
     2814        /*
     2815         * Check that the entry doesn't already exists.
     2816         */
     2817        if (pPage->iUserHead != NIL_PGMPOOL_USER_INDEX)
     2818        {
     2819            uint16_t i = pPage->iUserHead;
     2820            do
     2821            {
     2822                Assert(i < pPool->cMaxUsers);
     2823                AssertMsg(paUsers[i].iUser != iUser || paUsers[i].iUserTable != iUserTable, ("%x %x vs new %x %x\n", paUsers[i].iUser, paUsers[i].iUserTable, iUser, iUserTable));
     2824                i = paUsers[i].iNext;
     2825            } while (i != NIL_PGMPOOL_USER_INDEX);
     2826        }
    28212827#endif
    28222828
    2823     /*
    2824      * Find free a user node.
    2825      */
    2826     uint16_t i = pPool->iUserFreeHead;
    2827     if (i == NIL_PGMPOOL_USER_INDEX)
    2828     {
    2829         rc = pgmPoolTrackFreeOneUser(pPool, iUser);
    2830         if (RT_FAILURE(rc))
    2831             return rc;
    2832         i = pPool->iUserFreeHead;
    2833     }
    2834 
    2835     /*
    2836      * Unlink the user node from the free list,
    2837      * initialize and insert it into the user list.
    2838      */
    2839     pPool->iUserFreeHead = paUsers[i].iNext;
    2840     paUsers[i].iNext = NIL_PGMPOOL_USER_INDEX;
    2841     paUsers[i].iUser = iUser;
    2842     paUsers[i].iUserTable = iUserTable;
    2843     pPage->iUserHead = i;
     2829        /*
     2830         * Find free a user node.
     2831         */
     2832        uint16_t i = pPool->iUserFreeHead;
     2833        if (i == NIL_PGMPOOL_USER_INDEX)
     2834        {
     2835            rc = pgmPoolTrackFreeOneUser(pPool, iUser);
     2836            if (RT_FAILURE(rc))
     2837                return rc;
     2838            i = pPool->iUserFreeHead;
     2839        }
     2840
     2841        /*
     2842         * Unlink the user node from the free list,
     2843         * initialize and insert it into the user list.
     2844         */
     2845        pPool->iUserFreeHead = paUsers[i].iNext;
     2846        paUsers[i].iNext = NIL_PGMPOOL_USER_INDEX;
     2847        paUsers[i].iUser = iUser;
     2848        paUsers[i].iUserTable = iUserTable;
     2849        pPage->iUserHead = i;
     2850    }
     2851    else
     2852        pPage->iUserHead = NIL_PGMPOOL_USER_INDEX;
     2853
    28442854
    28452855    /*
    … …  
    28812891static int pgmPoolTrackAddUser(PPGMPOOL pPool, PPGMPOOLPAGE pPage, uint16_t iUser, uint32_t iUserTable)
    28822892{
     2893    Log3(("pgmPoolTrackAddUser: GCPhys=%RGp iUser=%%x iUserTable=%x\n", pPage->GCPhys, iUser, iUserTable));
    28832894    PPGMPOOLUSER paUsers = pPool->CTX_SUFF(paUsers);
    2884 
    2885     Log3(("pgmPoolTrackAddUser GCPhys = %RGp iUser %x iUserTable %x\n", pPage->GCPhys, iUser, iUserTable));
     2895    Assert(iUser != NIL_PGMPOOL_IDX);
    28862896
    28872897#  ifdef VBOX_STRICT
    … …  
    28962906        {
    28972907            Assert(i < pPool->cMaxUsers);
    2898             AssertMsg(iUser != PGMPOOL_IDX_PD || iUser != PGMPOOL_IDX_PDPT || iUser != PGMPOOL_IDX_NESTED_ROOT || iUser != PGMPOOL_IDX_AMD64_CR3 ||
    2899                       paUsers[i].iUser != iUser || paUsers[i].iUserTable != iUserTable, ("%x %x vs new %x %x\n", paUsers[i].iUser, paUsers[i].iUserTable, iUser, iUserTable));
     2908            /** @todo this assertion looks odd... Shouldn't it be && here? */
     2909            AssertMsg(paUsers[i].iUser != iUser || paUsers[i].iUserTable != iUserTable, ("%x %x vs new %x %x\n", paUsers[i].iUser, paUsers[i].iUserTable, iUser, iUserTable));
    29002910            i = paUsers[i].iNext;
    29012911        } while (i != NIL_PGMPOOL_USER_INDEX);
    … …  
    29472957 * @param   iUser       The shadow page pool index of the user table.
    29482958 * @param   iUserTable  The index into the user table (shadowed).
     2959 *
     2960 * @remarks Don't call this for root pages.
    29492961 */
    29502962static void pgmPoolTrackFreeUser(PPGMPOOL pPool, PPGMPOOLPAGE pPage, uint16_t iUser, uint32_t iUserTable)
    29512963{
     2964    Log3(("pgmPoolTrackFreeUser %RGp %x %x\n", pPage->GCPhys, iUser, iUserTable));
     2965    PPGMPOOLUSER paUsers = pPool->CTX_SUFF(paUsers);
     2966    Assert(iUser != NIL_PGMPOOL_IDX);
     2967
    29522968    /*
    29532969     * Unlink and free the specified user entry.
    29542970     */
    2955     PPGMPOOLUSER paUsers = pPool->CTX_SUFF(paUsers);
    2956 
    2957     Log3(("pgmPoolTrackFreeUser %RGp %x %x\n", pPage->GCPhys, iUser, iUserTable));
     2971
    29582972    /* Special: For PAE and 32-bit paging, there is usually no more than one user. */
    29592973    uint16_t i = pPage->iUserHead;
    … …  
    48994913 * @param   HCPhys      The HC physical address of the shadow page.
    49004914 * @param   iUser       The shadow page pool index of the user table.
    4901  * @param   iUserTable  The index into the user table (shadowed).
     4915 *                      NIL_PGMPOOL_IDX for root pages.
     4916 * @param   iUserTable  The index into the user table (shadowed). Ignored if
     4917 *                      root page.
    49024918 */
    49034919void pgmPoolFreeByPage(PPGMPOOL pPool, PPGMPOOLPAGE pPage, uint16_t iUser, uint32_t iUserTable)
    … …  
    49114927
    49124928    pgmLock(pVM);
    4913     pgmPoolTrackFreeUser(pPool, pPage, iUser, iUserTable);
     4929    if (iUser != NIL_PGMPOOL_IDX)
     4930        pgmPoolTrackFreeUser(pPool, pPage, iUser, iUserTable);
    49144931    if (!pPage->fCached)
    49154932        pgmPoolFlushPage(pPool, pPage);
    … …  
    49334950{
    49344951    PVM pVM = pPool->CTX_SUFF(pVM);
    4935     LogFlow(("pgmPoolMakeMoreFreePages: iUser=%d\n", iUser));
     4952    LogFlow(("pgmPoolMakeMoreFreePages: enmKind=%d iUser=%d\n", enmKind, iUser));
    49364953    NOREF(enmKind);
    49374954
    … …  
    49855002 * @param   enmAccess   Access type for the mapping (only relevant for big pages)
    49865003 * @param   fA20Enabled Whether the A20 gate is enabled or not.
    4987  * @param   iUser       The shadow page pool index of the user table.
    4988  * @param   iUserTable  The index into the user table (shadowed).
     5004 * @param   iUser       The shadow page pool index of the user table.  Root
     5005 *                      pages should pass NIL_PGMPOOL_IDX.
     5006 * @param   iUserTable  The index into the user table (shadowed).  Ignored for
     5007 *                      root pages (iUser == NIL_PGMPOOL_IDX).
    49895008 * @param   fLockPage   Lock the page
    49905009 * @param   ppPage      Where to store the pointer to the page. NULL is stored here on failure.
    … …  
    51195138 * @param   HCPhys      The HC physical address of the shadow page.
    51205139 * @param   iUser       The shadow page pool index of the user table.
    5121  * @param   iUserTable  The index into the user table (shadowed).
     5140 *                      NIL_PGMPOOL_IDX if root page.
     5141 * @param   iUserTable  The index into the user table (shadowed).  Ignored if
     5142 *                      root page.
    51225143 */
    51235144void pgmPoolFree(PVM pVM, RTHCPHYS HCPhys, uint16_t iUser, uint32_t iUserTable)
    … …  
    54075428     * Reinsert active pages into the hash and ensure monitoring chains are correct.
    54085429     */
    5409     for (unsigned i = PGMPOOL_IDX_FIRST_SPECIAL; i < PGMPOOL_IDX_FIRST; i++)
    5410     {
    5411         PPGMPOOLPAGE pPage = &pPool->aPages[i];
    5412 
    5413         /** @todo r=bird: Is this code still needed in any way?  The special root
    5414          *        pages should not be monitored or anything these days AFAIK. */
    5415         Assert(pPage->iNext == NIL_PGMPOOL_IDX);
    5416         Assert(pPage->iModifiedNext == NIL_PGMPOOL_IDX);
    5417         Assert(pPage->iModifiedPrev == NIL_PGMPOOL_IDX);
    5418         Assert(pPage->iMonitoredNext == NIL_PGMPOOL_IDX);
    5419         Assert(pPage->iMonitoredPrev == NIL_PGMPOOL_IDX);
    5420         Assert(!pPage->fMonitored);
    5421 
    5422         pPage->iNext = NIL_PGMPOOL_IDX;
    5423         pPage->iModifiedNext = NIL_PGMPOOL_IDX;
    5424         pPage->iModifiedPrev = NIL_PGMPOOL_IDX;
    5425         pPage->cModifications = 0;
    5426         /* ASSUMES that we're not sharing with any of the other special pages (safe for now). */
    5427         pPage->iMonitoredNext = NIL_PGMPOOL_IDX;
    5428         pPage->iMonitoredPrev = NIL_PGMPOOL_IDX;
    5429         if (pPage->fMonitored)
    5430         {
    5431             int rc = PGMHandlerPhysicalChangeCallbacks(pVM, pPage->GCPhys & ~(RTGCPHYS)PAGE_OFFSET_MASK,
    5432                                                        pPool->pfnAccessHandlerR3, MMHyperCCToR3(pVM, pPage),
    5433                                                        pPool->pfnAccessHandlerR0, MMHyperCCToR0(pVM, pPage),
    5434                                                        pPool->pfnAccessHandlerRC, MMHyperCCToRC(pVM, pPage),
    5435                                                        pPool->pszAccessHandler);
    5436             AssertFatalRCSuccess(rc);
    5437             pgmPoolHashInsert(pPool, pPage);
    5438         }
    5439         Assert(pPage->iUserHead == NIL_PGMPOOL_USER_INDEX); /* for now */
    5440         Assert(pPage->iAgeNext == NIL_PGMPOOL_IDX);
    5441         Assert(pPage->iAgePrev == NIL_PGMPOOL_IDX);
    5442     }
    5443 
    54445430    for (VMCPUID i = 0; i < pVM->cCpus; i++)
    54455431    {

  • trunk/src/VBox/VMM/VMMAll/PGMAllShw.h

    r44528 r45103  
    5252#undef SHW_PDPT_MASK
    5353#undef SHW_PDPE_PG_MASK
    54 #undef SHW_POOL_ROOT_IDX
    5554
    5655#if PGM_SHW_TYPE == PGM_TYPE_32BIT
    … …  
    8584# define SHW_PT_SHIFT                   X86_PT_SHIFT
    8685# define SHW_PT_MASK                    X86_PT_MASK
    87 # define SHW_POOL_ROOT_IDX              PGMPOOL_IDX_PD
    8886
    8987#elif PGM_SHW_TYPE == PGM_TYPE_EPT
    … …  
    121119# define SHW_PDPE_PG_MASK               EPT_PDPE_PG_MASK
    122120# define SHW_TOTAL_PD_ENTRIES           (EPT_PG_AMD64_ENTRIES*EPT_PG_AMD64_PDPE_ENTRIES)
    123 # define SHW_POOL_ROOT_IDX              PGMPOOL_IDX_NESTED_ROOT      /* do not use! exception is real mode & protected mode without paging. */
    124121
    125122#else
    … …  
    159156#  define SHW_PDPE_PG_MASK              X86_PDPE_PG_MASK
    160157#  define SHW_TOTAL_PD_ENTRIES          (X86_PG_AMD64_ENTRIES * X86_PG_AMD64_PDPE_ENTRIES)
    161 #  define SHW_POOL_ROOT_IDX             PGMPOOL_IDX_AMD64_CR3
    162158
    163159# else /* 32 bits PAE mode */
    … …  
    166162#  define SHW_PDPE_PG_MASK              X86_PDPE_PG_MASK
    167163#  define SHW_TOTAL_PD_ENTRIES          (X86_PG_PAE_ENTRIES * X86_PG_PAE_PDPE_ENTRIES)
    168 #  define SHW_POOL_ROOT_IDX             PGMPOOL_IDX_PDPT
    169164
    170165# endif

  • trunk/src/VBox/VMM/VMMR3/PGMBth.h

    r44528 r45103  
    153153# endif
    154154
    155         pgmPoolFreeByPage(pPool, pVCpu->pgm.s.pShwPageCR3R3, pVCpu->pgm.s.iShwUser, pVCpu->pgm.s.iShwUserTable);
     155        pgmPoolFreeByPage(pPool, pVCpu->pgm.s.pShwPageCR3R3, NIL_PGMPOOL_IDX, UINT32_MAX);
    156156        pVCpu->pgm.s.pShwPageCR3R3 = 0;
    157157        pVCpu->pgm.s.pShwPageCR3RC = 0;
    158158        pVCpu->pgm.s.pShwPageCR3R0 = 0;
    159         pVCpu->pgm.s.iShwUser      = 0;
    160         pVCpu->pgm.s.iShwUserTable = 0;
    161159    }
    162160
    163161    /* construct a fake address. */
    164162    GCPhysCR3 = RT_BIT_64(63);
    165     pVCpu->pgm.s.iShwUser      = SHW_POOL_ROOT_IDX;
    166     pVCpu->pgm.s.iShwUserTable = GCPhysCR3 >> PAGE_SHIFT;
    167163    int rc = pgmPoolAlloc(pVM, GCPhysCR3, BTH_PGMPOOLKIND_ROOT, PGMPOOLACCESS_DONTCARE, PGM_A20_IS_ENABLED(pVCpu),
    168                           pVCpu->pgm.s.iShwUser, pVCpu->pgm.s.iShwUserTable, false /*fLockPage*/,
     164                          NIL_PGMPOOL_IDX, UINT32_MAX, false /*fLockPage*/,
    169165                          &pVCpu->pgm.s.pShwPageCR3R3);
    170166    if (rc == VERR_PGM_POOL_FLUSHED)

  • trunk/src/VBox/VMM/VMMR3/PGMPool.cpp

    r44399 r45103  
    284284    pPool->HCPhysTree = 0;
    285285
    286     /* The NIL entry. */
     286    /*
     287     * The NIL entry.
     288     */
    287289    Assert(NIL_PGMPOOL_IDX == 0);
    288290    pPool->aPages[NIL_PGMPOOL_IDX].enmKind          = PGMPOOLKIND_INVALID;
    289291    pPool->aPages[NIL_PGMPOOL_IDX].idx              = NIL_PGMPOOL_IDX;
    290 
    291     /* The Shadow 32-bit PD. (32 bits guest paging) */
    292     pPool->aPages[PGMPOOL_IDX_PD].enmKind           = PGMPOOLKIND_32BIT_PD;
    293     pPool->aPages[PGMPOOL_IDX_PD].idx               = PGMPOOL_IDX_PD;
    294 
    295     /* The Shadow PDPT. */
    296     pPool->aPages[PGMPOOL_IDX_PDPT].enmKind         = PGMPOOLKIND_PAE_PDPT;
    297     pPool->aPages[PGMPOOL_IDX_PDPT].idx             = PGMPOOL_IDX_PDPT;
    298 
    299     /* The Shadow AMD64 CR3. */
    300     pPool->aPages[PGMPOOL_IDX_AMD64_CR3].enmKind    = PGMPOOLKIND_64BIT_PML4;
    301     pPool->aPages[PGMPOOL_IDX_AMD64_CR3].idx        = PGMPOOL_IDX_AMD64_CR3;
    302 
    303     /* The Nested Paging CR3. */
    304     pPool->aPages[PGMPOOL_IDX_NESTED_ROOT].enmKind  = PGMPOOLKIND_ROOT_NESTED;
    305     pPool->aPages[PGMPOOL_IDX_NESTED_ROOT].idx      = PGMPOOL_IDX_NESTED_ROOT;
    306 
    307     /*
    308      * Set common stuff.
    309      */
    310     for (unsigned iPage = 0; iPage < PGMPOOL_IDX_FIRST; iPage++)
    311     {
    312         pPool->aPages[iPage].Core.Key       = NIL_RTHCPHYS;
    313         pPool->aPages[iPage].GCPhys         = NIL_RTGCPHYS;
    314         pPool->aPages[iPage].iNext          = NIL_PGMPOOL_IDX;
    315         /* pPool->aPages[iPage].cLocked        = INT32_MAX; - test this out... */
    316         pPool->aPages[iPage].pvPageR3       = 0;
    317         pPool->aPages[iPage].iUserHead      = NIL_PGMPOOL_USER_INDEX;
    318         pPool->aPages[iPage].iModifiedNext  = NIL_PGMPOOL_IDX;
    319         pPool->aPages[iPage].iModifiedPrev  = NIL_PGMPOOL_IDX;
    320         pPool->aPages[iPage].iMonitoredNext = NIL_PGMPOOL_IDX;
    321         pPool->aPages[iPage].iMonitoredNext = NIL_PGMPOOL_IDX;
    322         pPool->aPages[iPage].iAgeNext       = NIL_PGMPOOL_IDX;
    323         pPool->aPages[iPage].iAgePrev       = NIL_PGMPOOL_IDX;
    324 
    325         Assert(pPool->aPages[iPage].idx == iPage);
    326         Assert(pPool->aPages[iPage].GCPhys == NIL_RTGCPHYS);
    327         Assert(!pPool->aPages[iPage].fSeenNonGlobal);
    328         Assert(!pPool->aPages[iPage].fMonitored);
    329         Assert(!pPool->aPages[iPage].fCached);
    330         Assert(!pPool->aPages[iPage].fZeroed);
    331         Assert(!pPool->aPages[iPage].fReusedFlushPending);
    332     }
     292    pPool->aPages[NIL_PGMPOOL_IDX].Core.Key         = NIL_RTHCPHYS;
     293    pPool->aPages[NIL_PGMPOOL_IDX].GCPhys           = NIL_RTGCPHYS;
     294    pPool->aPages[NIL_PGMPOOL_IDX].iNext            = NIL_PGMPOOL_IDX;
     295    /* pPool->aPages[NIL_PGMPOOL_IDX].cLocked          = INT32_MAX; - test this out... */
     296    pPool->aPages[NIL_PGMPOOL_IDX].pvPageR3         = 0;
     297    pPool->aPages[NIL_PGMPOOL_IDX].iUserHead        = NIL_PGMPOOL_USER_INDEX;
     298    pPool->aPages[NIL_PGMPOOL_IDX].iModifiedNext    = NIL_PGMPOOL_IDX;
     299    pPool->aPages[NIL_PGMPOOL_IDX].iModifiedPrev    = NIL_PGMPOOL_IDX;
     300    pPool->aPages[NIL_PGMPOOL_IDX].iMonitoredNext   = NIL_PGMPOOL_IDX;
     301    pPool->aPages[NIL_PGMPOOL_IDX].iMonitoredNext   = NIL_PGMPOOL_IDX;
     302    pPool->aPages[NIL_PGMPOOL_IDX].iAgeNext         = NIL_PGMPOOL_IDX;
     303    pPool->aPages[NIL_PGMPOOL_IDX].iAgePrev         = NIL_PGMPOOL_IDX;
     304
     305    Assert(pPool->aPages[NIL_PGMPOOL_IDX].idx == NIL_PGMPOOL_IDX);
     306    Assert(pPool->aPages[NIL_PGMPOOL_IDX].GCPhys == NIL_RTGCPHYS);
     307    Assert(!pPool->aPages[NIL_PGMPOOL_IDX].fSeenNonGlobal);
     308    Assert(!pPool->aPages[NIL_PGMPOOL_IDX].fMonitored);
     309    Assert(!pPool->aPages[NIL_PGMPOOL_IDX].fCached);
     310    Assert(!pPool->aPages[NIL_PGMPOOL_IDX].fZeroed);
     311    Assert(!pPool->aPages[NIL_PGMPOOL_IDX].fReusedFlushPending);
    333312
    334313#ifdef VBOX_WITH_STATISTICS
    … …  
    786765    }
    787766
    788     /* swipe the special pages too. */
    789     for (iPage = PGMPOOL_IDX_FIRST_SPECIAL; iPage < PGMPOOL_IDX_FIRST; iPage++)
    790     {
    791         PPGMPOOLPAGE pPage = &pPool->aPages[iPage];
    792         if (pPage->GCPhys != NIL_RTGCPHYS)
    793         {
    794             Assert(!pPage->cModifications || ++cModifiedPages);
    795             Assert(pPage->iModifiedNext == NIL_PGMPOOL_IDX || pPage->cModifications);
    796             Assert(pPage->iModifiedPrev == NIL_PGMPOOL_IDX || pPage->cModifications);
    797             pPage->iModifiedNext = NIL_PGMPOOL_IDX;
    798             pPage->iModifiedPrev = NIL_PGMPOOL_IDX;
    799             pPage->cModifications = 0;
    800         }
    801     }
    802 
    803767#ifndef DEBUG_michael
    804768    AssertMsg(cModifiedPages == pPool->cModifiedPages, ("%d != %d\n", cModifiedPages, pPool->cModifiedPages));

  • trunk/src/VBox/VMM/VMMR3/PGMShw.h

    r44528 r45103  
    3737#undef SHW_PDPT_MASK
    3838#undef SHW_PDPE_PG_MASK
    39 #undef SHW_POOL_ROOT_IDX
    4039
    4140#if PGM_SHW_TYPE == PGM_TYPE_32BIT
    … …  
    5554# define SHW_PT_SHIFT           X86_PT_SHIFT
    5655# define SHW_PT_MASK            X86_PT_MASK
    57 # define SHW_POOL_ROOT_IDX      PGMPOOL_IDX_PD
    5856
    5957#elif PGM_SHW_TYPE == PGM_TYPE_EPT
    … …  
    7674# define SHW_PDPE_PG_MASK       EPT_PDPE_PG_MASK
    7775# define SHW_TOTAL_PD_ENTRIES   (EPT_PG_AMD64_ENTRIES*EPT_PG_AMD64_PDPE_ENTRIES)
    78 # define SHW_POOL_ROOT_IDX      PGMPOOL_IDX_NESTED_ROOT      /* do not use! exception is real mode & protected mode without paging. */
    7976
    8077#else
    … …  
    9996#  define SHW_PDPE_PG_MASK      X86_PDPE_PG_MASK
    10097#  define SHW_TOTAL_PD_ENTRIES  (X86_PG_AMD64_ENTRIES*X86_PG_AMD64_PDPE_ENTRIES)
    101 #  define SHW_POOL_ROOT_IDX     PGMPOOL_IDX_AMD64_CR3
    10298
    10399# else /* 32 bits PAE mode */
    … …  
    106102#  define SHW_PDPE_PG_MASK      X86_PDPE_PG_MASK
    107103#  define SHW_TOTAL_PD_ENTRIES  (X86_PG_PAE_ENTRIES*X86_PG_PAE_PDPE_ENTRIES)
    108 #  define SHW_POOL_ROOT_IDX     PGMPOOL_IDX_PDPT
    109104# endif
    110105#endif
    … …  
    195190
    196191    int rc = pgmPoolAlloc(pVM, GCPhysCR3, PGMPOOLKIND_ROOT_NESTED, PGMPOOLACCESS_DONTCARE, PGM_A20_IS_ENABLED(pVCpu),
    197                           PGMPOOL_IDX_NESTED_ROOT, GCPhysCR3 >> PAGE_SHIFT, true /*fLockPage*/,
     192                          NIL_PGMPOOL_IDX, UINT32_MAX, true /*fLockPage*/,
    198193                          &pNewShwPageCR3);
    199194    AssertFatalRC(rc);
    200195
    201     pVCpu->pgm.s.iShwUser      = PGMPOOL_IDX_NESTED_ROOT;
    202     pVCpu->pgm.s.iShwUserTable = GCPhysCR3 >> PAGE_SHIFT;
    203196    pVCpu->pgm.s.pShwPageCR3R3 = pNewShwPageCR3;
    204197
    … …  
    245238    {
    246239        PPGMPOOL pPool = pVM->pgm.s.CTX_SUFF(pPool);
    247 
    248         Assert(pVCpu->pgm.s.iShwUser == PGMPOOL_IDX_NESTED_ROOT);
    249240
    250241        pgmLock(pVM);
    … …  
    257248        /* pgmPoolUnlockPage(pPool, pVCpu->pgm.s.CTX_SUFF(pShwPageCR3)); */
    258249
    259         pgmPoolFreeByPage(pPool, pVCpu->pgm.s.CTX_SUFF(pShwPageCR3), pVCpu->pgm.s.iShwUser, pVCpu->pgm.s.iShwUserTable);
     250        pgmPoolFreeByPage(pPool, pVCpu->pgm.s.CTX_SUFF(pShwPageCR3), NIL_PGMPOOL_IDX, UINT32_MAX);
    260251        pVCpu->pgm.s.pShwPageCR3R3 = 0;
    261252        pVCpu->pgm.s.pShwPageCR3R0 = 0;
    262253        pVCpu->pgm.s.pShwPageCR3RC = 0;
    263         pVCpu->pgm.s.iShwUser      = 0;
    264         pVCpu->pgm.s.iShwUserTable = 0;
    265254
    266255        pgmUnlock(pVM);

  • trunk/src/VBox/VMM/include/PGMInternal.h

    r45024 r45103  
    19451945/** NIL page pool IDX. */
    19461946#define NIL_PGMPOOL_IDX                 0
    1947 /** The first normal index. */
    1948 #define PGMPOOL_IDX_FIRST_SPECIAL       1
    1949 /** Page directory (32-bit root). */
    1950 #define PGMPOOL_IDX_PD                  1
    1951 /** Page Directory Pointer Table (PAE root). */
    1952 #define PGMPOOL_IDX_PDPT                2
    1953 /** AMD64 CR3 level index.*/
    1954 #define PGMPOOL_IDX_AMD64_CR3           3
    1955 /** Nested paging root.*/
    1956 #define PGMPOOL_IDX_NESTED_ROOT         4
    1957 /** The first normal index. */
    1958 #define PGMPOOL_IDX_FIRST               5
     1947/** The first normal index.  There used to be 5 fictive pages up front, now
     1948 * there is only the NIL page. */
     1949#define PGMPOOL_IDX_FIRST               1
    19591950/** The last valid index. (inclusive, 14 bits) */
    19601951#define PGMPOOL_IDX_LAST                0x3fff
    … …  
    37503741    /** Pointer to the page of the current active CR3 - RC Ptr. */
    37513742    RCPTRTYPE(PPGMPOOLPAGE)         pShwPageCR3RC;
    3752     /** The shadow page pool index of the user table as specified during
    3753      * allocation; useful for freeing root pages. */
    3754     uint32_t                        iShwUser;
    3755     /** The index into the user table (shadowed) as specified during allocation;
    3756      * useful for freeing root pages. */
    3757     uint32_t                        iShwUserTable;
    37583743# if HC_ARCH_BITS == 64
    37593744    RTRCPTR                         alignment6; /**< structure size alignment. */
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