Changeset 45103 in vbox for trunk/src/VBox/VMM/VMMAll
- Timestamp:
- Mar 20, 2013 11:13:27 AM (12 years ago)
- Location:
- trunk/src/VBox/VMM/VMMAll
- Files:
-
- 4 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/VMM/VMMAll/PGMAll.cpp
r44528 r45103 1230 1230 1231 1231 rc = pgmPoolAlloc(pVM, GCPml4, PGMPOOLKIND_EPT_PDPT_FOR_PHYS, PGMPOOLACCESS_DONTCARE, PGM_A20_IS_ENABLED(pVCpu), 1232 PGMPOOL_IDX_NESTED_ROOT, iPml4, false /*fLockPage*/,1232 pVCpu->pgm.s.CTX_SUFF(pShwPageCR3)->idx, iPml4, false /*fLockPage*/, 1233 1233 &pShwPage); 1234 1234 AssertRCReturn(rc, rc); -
trunk/src/VBox/VMM/VMMAll/PGMAllBth.h
r44528 r45103 4582 4582 PPGMPOOL pPool = pVM->pgm.s.CTX_SUFF(pPool); 4583 4583 PPGMPOOLPAGE pOldShwPageCR3 = pVCpu->pgm.s.CTX_SUFF(pShwPageCR3); 4584 uint32_t iOldShwUserTable = pVCpu->pgm.s.iShwUserTable;4585 uint32_t iOldShwUser = pVCpu->pgm.s.iShwUser;4586 4584 PPGMPOOLPAGE pNewShwPageCR3; 4587 4585 … … 4595 4593 Assert(!(GCPhysCR3 >> (PAGE_SHIFT + 32))); 4596 4594 rc = pgmPoolAlloc(pVM, GCPhysCR3 & GST_CR3_PAGE_MASK, BTH_PGMPOOLKIND_ROOT, PGMPOOLACCESS_DONTCARE, PGM_A20_IS_ENABLED(pVCpu), 4597 SHW_POOL_ROOT_IDX, GCPhysCR3 >> PAGE_SHIFT, true /*fLockPage*/,4595 NIL_PGMPOOL_IDX, UINT32_MAX, true /*fLockPage*/, 4598 4596 &pNewShwPageCR3); 4599 4597 AssertFatalRC(rc); … … 4612 4610 # endif 4613 4611 4614 pVCpu->pgm.s.iShwUser = SHW_POOL_ROOT_IDX;4615 pVCpu->pgm.s.iShwUserTable = GCPhysCR3 >> PAGE_SHIFT;4616 4612 pVCpu->pgm.s.CTX_SUFF(pShwPageCR3) = pNewShwPageCR3; 4617 4613 # ifdef IN_RING0 … … 4660 4656 pgmPoolUnlockPage(pPool, pOldShwPageCR3); 4661 4657 4662 pgmPoolFreeByPage(pPool, pOldShwPageCR3, iOldShwUser, iOldShwUserTable);4658 pgmPoolFreeByPage(pPool, pOldShwPageCR3, NIL_PGMPOOL_IDX, UINT32_MAX); 4663 4659 } 4664 4660 pgmUnlock(pVM); … … 4743 4739 PPGMPOOL pPool = pVM->pgm.s.CTX_SUFF(pPool); 4744 4740 4745 Assert(pVCpu->pgm.s.iShwUser != PGMPOOL_IDX_NESTED_ROOT);4746 4747 4741 # ifdef PGMPOOL_WITH_OPTIMIZED_DIRTY_PT 4748 4742 if (pPool->cDirtyPages) … … 4753 4747 pgmPoolUnlockPage(pPool, pVCpu->pgm.s.CTX_SUFF(pShwPageCR3)); 4754 4748 4755 pgmPoolFreeByPage(pPool, pVCpu->pgm.s.CTX_SUFF(pShwPageCR3), pVCpu->pgm.s.iShwUser, pVCpu->pgm.s.iShwUserTable);4749 pgmPoolFreeByPage(pPool, pVCpu->pgm.s.CTX_SUFF(pShwPageCR3), NIL_PGMPOOL_IDX, UINT32_MAX); 4756 4750 pVCpu->pgm.s.pShwPageCR3R3 = 0; 4757 4751 pVCpu->pgm.s.pShwPageCR3R0 = 0; 4758 4752 pVCpu->pgm.s.pShwPageCR3RC = 0; 4759 pVCpu->pgm.s.iShwUser = 0;4760 pVCpu->pgm.s.iShwUserTable = 0;4761 4753 } 4762 4754 pgmUnlock(pVM); -
trunk/src/VBox/VMM/VMMAll/PGMAllPool.cpp
r43387 r45103 5 5 6 6 /* 7 * Copyright (C) 2006-201 2Oracle Corporation7 * Copyright (C) 2006-2013 Oracle Corporation 8 8 * 9 9 * This file is part of VirtualBox Open Source Edition (OSE), as … … 2014 2014 { 2015 2015 uint16_t iToFree = pPool->iAgeTail; 2016 if (iToFree == iUser )2016 if (iToFree == iUser && iUser != NIL_PGMPOOL_IDX) 2017 2017 iToFree = pPool->aPages[iToFree].iAgePrev; 2018 2018 /* This is the alternative to the SyncCR3 pgmPoolCacheUsed calls. … … 2173 2173 * @param enmAccess Access type for the mapping (only relevant for big pages) 2174 2174 * @param fA20Enabled Whether the CPU has the A20 gate enabled. 2175 * @param iUser The shadow page pool index of the user table. 2176 * @param iUserTable The index into the user table (shadowed). 2175 * @param iUser The shadow page pool index of the user table. This is 2176 * NIL_PGMPOOL_IDX for root pages. 2177 * @param iUserTable The index into the user table (shadowed). Ignored if 2178 * root page 2177 2179 * @param ppPage Where to store the pointer to the page. 2178 2180 */ … … 2202 2204 pgmPoolCacheUsed(pPool, pPage); 2203 2205 2204 int rc = pgmPoolTrackAddUser(pPool, pPage, iUser, iUserTable); 2206 int rc = VINF_SUCCESS; 2207 if (iUser != NIL_PGMPOOL_IDX) 2208 rc = pgmPoolTrackAddUser(pPool, pPage, iUser, iUserTable); 2205 2209 if (RT_SUCCESS(rc)) 2206 2210 { … … 2805 2809 LogFlow(("pgmPoolTrackInsert GCPhys=%RGp iUser=%d iUserTable=%x\n", GCPhys, iUser, iUserTable)); 2806 2810 2811 if (iUser != NIL_PGMPOOL_IDX) 2812 { 2807 2813 #ifdef VBOX_STRICT 2808 /*2809 * Check that the entry doesn't already exists.2810 */2811 if (pPage->iUserHead != NIL_PGMPOOL_USER_INDEX)2812 {2813 uint16_t i = pPage->iUserHead;2814 do2815 {2816 Assert(i < pPool->cMaxUsers);2817 AssertMsg(paUsers[i].iUser != iUser || paUsers[i].iUserTable != iUserTable, ("%x %x vs new %x %x\n", paUsers[i].iUser, paUsers[i].iUserTable, iUser, iUserTable));2818 i = paUsers[i].iNext;2819 } while (i != NIL_PGMPOOL_USER_INDEX);2820 }2814 /* 2815 * Check that the entry doesn't already exists. 2816 */ 2817 if (pPage->iUserHead != NIL_PGMPOOL_USER_INDEX) 2818 { 2819 uint16_t i = pPage->iUserHead; 2820 do 2821 { 2822 Assert(i < pPool->cMaxUsers); 2823 AssertMsg(paUsers[i].iUser != iUser || paUsers[i].iUserTable != iUserTable, ("%x %x vs new %x %x\n", paUsers[i].iUser, paUsers[i].iUserTable, iUser, iUserTable)); 2824 i = paUsers[i].iNext; 2825 } while (i != NIL_PGMPOOL_USER_INDEX); 2826 } 2821 2827 #endif 2822 2828 2823 /* 2824 * Find free a user node. 2825 */ 2826 uint16_t i = pPool->iUserFreeHead; 2827 if (i == NIL_PGMPOOL_USER_INDEX) 2828 { 2829 rc = pgmPoolTrackFreeOneUser(pPool, iUser); 2830 if (RT_FAILURE(rc)) 2831 return rc; 2832 i = pPool->iUserFreeHead; 2833 } 2834 2835 /* 2836 * Unlink the user node from the free list, 2837 * initialize and insert it into the user list. 2838 */ 2839 pPool->iUserFreeHead = paUsers[i].iNext; 2840 paUsers[i].iNext = NIL_PGMPOOL_USER_INDEX; 2841 paUsers[i].iUser = iUser; 2842 paUsers[i].iUserTable = iUserTable; 2843 pPage->iUserHead = i; 2829 /* 2830 * Find free a user node. 2831 */ 2832 uint16_t i = pPool->iUserFreeHead; 2833 if (i == NIL_PGMPOOL_USER_INDEX) 2834 { 2835 rc = pgmPoolTrackFreeOneUser(pPool, iUser); 2836 if (RT_FAILURE(rc)) 2837 return rc; 2838 i = pPool->iUserFreeHead; 2839 } 2840 2841 /* 2842 * Unlink the user node from the free list, 2843 * initialize and insert it into the user list. 2844 */ 2845 pPool->iUserFreeHead = paUsers[i].iNext; 2846 paUsers[i].iNext = NIL_PGMPOOL_USER_INDEX; 2847 paUsers[i].iUser = iUser; 2848 paUsers[i].iUserTable = iUserTable; 2849 pPage->iUserHead = i; 2850 } 2851 else 2852 pPage->iUserHead = NIL_PGMPOOL_USER_INDEX; 2853 2844 2854 2845 2855 /* … … 2881 2891 static int pgmPoolTrackAddUser(PPGMPOOL pPool, PPGMPOOLPAGE pPage, uint16_t iUser, uint32_t iUserTable) 2882 2892 { 2893 Log3(("pgmPoolTrackAddUser: GCPhys=%RGp iUser=%%x iUserTable=%x\n", pPage->GCPhys, iUser, iUserTable)); 2883 2894 PPGMPOOLUSER paUsers = pPool->CTX_SUFF(paUsers); 2884 2885 Log3(("pgmPoolTrackAddUser GCPhys = %RGp iUser %x iUserTable %x\n", pPage->GCPhys, iUser, iUserTable)); 2895 Assert(iUser != NIL_PGMPOOL_IDX); 2886 2896 2887 2897 # ifdef VBOX_STRICT … … 2896 2906 { 2897 2907 Assert(i < pPool->cMaxUsers); 2898 AssertMsg(iUser != PGMPOOL_IDX_PD || iUser != PGMPOOL_IDX_PDPT || iUser != PGMPOOL_IDX_NESTED_ROOT || iUser != PGMPOOL_IDX_AMD64_CR3 ||2899 2908 /** @todo this assertion looks odd... Shouldn't it be && here? */ 2909 AssertMsg(paUsers[i].iUser != iUser || paUsers[i].iUserTable != iUserTable, ("%x %x vs new %x %x\n", paUsers[i].iUser, paUsers[i].iUserTable, iUser, iUserTable)); 2900 2910 i = paUsers[i].iNext; 2901 2911 } while (i != NIL_PGMPOOL_USER_INDEX); … … 2947 2957 * @param iUser The shadow page pool index of the user table. 2948 2958 * @param iUserTable The index into the user table (shadowed). 2959 * 2960 * @remarks Don't call this for root pages. 2949 2961 */ 2950 2962 static void pgmPoolTrackFreeUser(PPGMPOOL pPool, PPGMPOOLPAGE pPage, uint16_t iUser, uint32_t iUserTable) 2951 2963 { 2964 Log3(("pgmPoolTrackFreeUser %RGp %x %x\n", pPage->GCPhys, iUser, iUserTable)); 2965 PPGMPOOLUSER paUsers = pPool->CTX_SUFF(paUsers); 2966 Assert(iUser != NIL_PGMPOOL_IDX); 2967 2952 2968 /* 2953 2969 * Unlink and free the specified user entry. 2954 2970 */ 2955 PPGMPOOLUSER paUsers = pPool->CTX_SUFF(paUsers); 2956 2957 Log3(("pgmPoolTrackFreeUser %RGp %x %x\n", pPage->GCPhys, iUser, iUserTable)); 2971 2958 2972 /* Special: For PAE and 32-bit paging, there is usually no more than one user. */ 2959 2973 uint16_t i = pPage->iUserHead; … … 4899 4913 * @param HCPhys The HC physical address of the shadow page. 4900 4914 * @param iUser The shadow page pool index of the user table. 4901 * @param iUserTable The index into the user table (shadowed). 4915 * NIL_PGMPOOL_IDX for root pages. 4916 * @param iUserTable The index into the user table (shadowed). Ignored if 4917 * root page. 4902 4918 */ 4903 4919 void pgmPoolFreeByPage(PPGMPOOL pPool, PPGMPOOLPAGE pPage, uint16_t iUser, uint32_t iUserTable) … … 4911 4927 4912 4928 pgmLock(pVM); 4913 pgmPoolTrackFreeUser(pPool, pPage, iUser, iUserTable); 4929 if (iUser != NIL_PGMPOOL_IDX) 4930 pgmPoolTrackFreeUser(pPool, pPage, iUser, iUserTable); 4914 4931 if (!pPage->fCached) 4915 4932 pgmPoolFlushPage(pPool, pPage); … … 4933 4950 { 4934 4951 PVM pVM = pPool->CTX_SUFF(pVM); 4935 LogFlow(("pgmPoolMakeMoreFreePages: iUser=%d\n", iUser));4952 LogFlow(("pgmPoolMakeMoreFreePages: enmKind=%d iUser=%d\n", enmKind, iUser)); 4936 4953 NOREF(enmKind); 4937 4954 … … 4985 5002 * @param enmAccess Access type for the mapping (only relevant for big pages) 4986 5003 * @param fA20Enabled Whether the A20 gate is enabled or not. 4987 * @param iUser The shadow page pool index of the user table. 4988 * @param iUserTable The index into the user table (shadowed). 5004 * @param iUser The shadow page pool index of the user table. Root 5005 * pages should pass NIL_PGMPOOL_IDX. 5006 * @param iUserTable The index into the user table (shadowed). Ignored for 5007 * root pages (iUser == NIL_PGMPOOL_IDX). 4989 5008 * @param fLockPage Lock the page 4990 5009 * @param ppPage Where to store the pointer to the page. NULL is stored here on failure. … … 5119 5138 * @param HCPhys The HC physical address of the shadow page. 5120 5139 * @param iUser The shadow page pool index of the user table. 5121 * @param iUserTable The index into the user table (shadowed). 5140 * NIL_PGMPOOL_IDX if root page. 5141 * @param iUserTable The index into the user table (shadowed). Ignored if 5142 * root page. 5122 5143 */ 5123 5144 void pgmPoolFree(PVM pVM, RTHCPHYS HCPhys, uint16_t iUser, uint32_t iUserTable) … … 5407 5428 * Reinsert active pages into the hash and ensure monitoring chains are correct. 5408 5429 */ 5409 for (unsigned i = PGMPOOL_IDX_FIRST_SPECIAL; i < PGMPOOL_IDX_FIRST; i++)5410 {5411 PPGMPOOLPAGE pPage = &pPool->aPages[i];5412 5413 /** @todo r=bird: Is this code still needed in any way? The special root5414 * pages should not be monitored or anything these days AFAIK. */5415 Assert(pPage->iNext == NIL_PGMPOOL_IDX);5416 Assert(pPage->iModifiedNext == NIL_PGMPOOL_IDX);5417 Assert(pPage->iModifiedPrev == NIL_PGMPOOL_IDX);5418 Assert(pPage->iMonitoredNext == NIL_PGMPOOL_IDX);5419 Assert(pPage->iMonitoredPrev == NIL_PGMPOOL_IDX);5420 Assert(!pPage->fMonitored);5421 5422 pPage->iNext = NIL_PGMPOOL_IDX;5423 pPage->iModifiedNext = NIL_PGMPOOL_IDX;5424 pPage->iModifiedPrev = NIL_PGMPOOL_IDX;5425 pPage->cModifications = 0;5426 /* ASSUMES that we're not sharing with any of the other special pages (safe for now). */5427 pPage->iMonitoredNext = NIL_PGMPOOL_IDX;5428 pPage->iMonitoredPrev = NIL_PGMPOOL_IDX;5429 if (pPage->fMonitored)5430 {5431 int rc = PGMHandlerPhysicalChangeCallbacks(pVM, pPage->GCPhys & ~(RTGCPHYS)PAGE_OFFSET_MASK,5432 pPool->pfnAccessHandlerR3, MMHyperCCToR3(pVM, pPage),5433 pPool->pfnAccessHandlerR0, MMHyperCCToR0(pVM, pPage),5434 pPool->pfnAccessHandlerRC, MMHyperCCToRC(pVM, pPage),5435 pPool->pszAccessHandler);5436 AssertFatalRCSuccess(rc);5437 pgmPoolHashInsert(pPool, pPage);5438 }5439 Assert(pPage->iUserHead == NIL_PGMPOOL_USER_INDEX); /* for now */5440 Assert(pPage->iAgeNext == NIL_PGMPOOL_IDX);5441 Assert(pPage->iAgePrev == NIL_PGMPOOL_IDX);5442 }5443 5444 5430 for (VMCPUID i = 0; i < pVM->cCpus; i++) 5445 5431 { -
trunk/src/VBox/VMM/VMMAll/PGMAllShw.h
r44528 r45103 52 52 #undef SHW_PDPT_MASK 53 53 #undef SHW_PDPE_PG_MASK 54 #undef SHW_POOL_ROOT_IDX55 54 56 55 #if PGM_SHW_TYPE == PGM_TYPE_32BIT … … 85 84 # define SHW_PT_SHIFT X86_PT_SHIFT 86 85 # define SHW_PT_MASK X86_PT_MASK 87 # define SHW_POOL_ROOT_IDX PGMPOOL_IDX_PD88 86 89 87 #elif PGM_SHW_TYPE == PGM_TYPE_EPT … … 121 119 # define SHW_PDPE_PG_MASK EPT_PDPE_PG_MASK 122 120 # define SHW_TOTAL_PD_ENTRIES (EPT_PG_AMD64_ENTRIES*EPT_PG_AMD64_PDPE_ENTRIES) 123 # define SHW_POOL_ROOT_IDX PGMPOOL_IDX_NESTED_ROOT /* do not use! exception is real mode & protected mode without paging. */124 121 125 122 #else … … 159 156 # define SHW_PDPE_PG_MASK X86_PDPE_PG_MASK 160 157 # define SHW_TOTAL_PD_ENTRIES (X86_PG_AMD64_ENTRIES * X86_PG_AMD64_PDPE_ENTRIES) 161 # define SHW_POOL_ROOT_IDX PGMPOOL_IDX_AMD64_CR3162 158 163 159 # else /* 32 bits PAE mode */ … … 166 162 # define SHW_PDPE_PG_MASK X86_PDPE_PG_MASK 167 163 # define SHW_TOTAL_PD_ENTRIES (X86_PG_PAE_ENTRIES * X86_PG_PAE_PDPE_ENTRIES) 168 # define SHW_POOL_ROOT_IDX PGMPOOL_IDX_PDPT169 164 170 165 # endif
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