Changeset 45453 in vbox
- Timestamp:
- Apr 10, 2013 11:15:16 AM (12 years ago)
- svn:sync-xref-src-repo-rev:
- 84890
- Location:
- trunk/src/VBox/VMM/VMMR0
- Files:
-
- 3 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/VMM/VMMR0/HMVMXR0.cpp
r45442 r45453 203 203 static int hmR0VmxInjectEventVmcs(PVM pVM, PVMCPU pVCpu, PCPUMCTX pMixedCtx, uint64_t u64IntrInfo, 204 204 uint32_t cbInstr, uint32_t u32ErrCode); 205 #if HC_ARCH_BITS == 32 && !defined(VBOX_WITH_HYBRID_32BIT_KERNEL) 206 static int hmR0VmxInitVmcsReadCache(PVM pVM, PVMCPU pVCpu); 207 #endif 205 208 #if 0 206 209 DECLINLINE(int) hmR0VmxHandleExit(PVM pVM, PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient, … … 438 441 * 439 442 * @returns VBox status code. 443 * @param pVCpu Pointer to the VMCPU. 440 444 * @param pVmxTransient Pointer to the VMX transient structure. 441 445 * 442 446 * @remarks No-long-jump zone!!! 443 447 */ 444 DECLINLINE(int) hmR0VmxReadEntryInstrLenVmcs(PVM XTRANSIENT pVmxTransient)448 DECLINLINE(int) hmR0VmxReadEntryInstrLenVmcs(PVMCPU pVCpu, PVMXTRANSIENT pVmxTransient) 445 449 { 446 450 int rc = VMXReadVmcs32(VMX_VMCS32_CTRL_ENTRY_INSTR_LENGTH, &pVmxTransient->cbEntryInstr); … … 455 459 * 456 460 * @returns VBox status code. 461 * @param pVCpu Pointer to the VMCPU. 457 462 * @param pVmxTransient Pointer to the VMX transient structure. 458 463 */ 459 DECLINLINE(int) hmR0VmxReadExitIntrInfoVmcs(PVM XTRANSIENT pVmxTransient)464 DECLINLINE(int) hmR0VmxReadExitIntrInfoVmcs(PVMCPU pVCpu, PVMXTRANSIENT pVmxTransient) 460 465 { 461 466 if (!(pVmxTransient->fVmcsFieldsRead & VMX_TRANSIENT_EXIT_INTERRUPTION_INFO)) … … 474 479 * 475 480 * @returns VBox status code. 481 * @param pVCpu Pointer to the VMCPU. 476 482 * @param pVmxTransient Pointer to the VMX transient structure. 477 483 */ 478 DECLINLINE(int) hmR0VmxReadExitIntrErrorCodeVmcs(PVM XTRANSIENT pVmxTransient)484 DECLINLINE(int) hmR0VmxReadExitIntrErrorCodeVmcs(PVMCPU pVCpu, PVMXTRANSIENT pVmxTransient) 479 485 { 480 486 if (!(pVmxTransient->fVmcsFieldsRead & VMX_TRANSIENT_EXIT_INTERRUPTION_ERROR_CODE)) … … 492 498 * transient structure. 493 499 * 494 * @returns VBox status code. 500 * @returns VBox status code. 501 * @param pVCpu Pointer to the VMCPU. 495 502 * @param pVmxTransient Pointer to the VMX transient structure. 496 503 */ 497 DECLINLINE(int) hmR0VmxReadExitInstrLenVmcs(PVM XTRANSIENT pVmxTransient)504 DECLINLINE(int) hmR0VmxReadExitInstrLenVmcs(PVMCPU pVCpu, PVMXTRANSIENT pVmxTransient) 498 505 { 499 506 if (!(pVmxTransient->fVmcsFieldsRead & VMX_TRANSIENT_EXIT_INSTR_LEN)) … … 510 517 * Reads the exit qualification from the VMCS into the VMX transient structure. 511 518 * 512 * @returns VBox status code. 519 * @returns VBox status code. 520 * @param pVCpu Pointer to the VMCPU. 513 521 * @param pVmxTransient Pointer to the VMX transient structure. 514 522 */ 515 DECLINLINE(int) hmR0VmxReadExitQualificationVmcs(PVM XTRANSIENT pVmxTransient)523 DECLINLINE(int) hmR0VmxReadExitQualificationVmcs(PVMCPU pVCpu, PVMXTRANSIENT pVmxTransient) 516 524 { 517 525 if (!(pVmxTransient->fVmcsFieldsRead & VMX_TRANSIENT_EXIT_QUALIFICATION)) … … 550 558 * transient structure. 551 559 * 552 * @returns VBox status code. 560 * @returns VBox status code. 553 561 * @param pVmxTransient Pointer to the VMX transient structure. 554 562 */ … … 2316 2324 * @returns VBox status code. 2317 2325 * @param pVM Pointer to the VM. 2318 * @param pVCpu Pointer to the VMCPU. 2319 */ 2320 DECLINLINE(int) hmR0VmxLoadGuestExitCtls(PVM pVM, PVMCPU pVCpu) 2326 * @param pVCpu Pointer to the VMCPU. 2327 * @param pMixedCtx Pointer to the guest-CPU context. The data may be 2328 * out-of-sync. Make sure to update the required fields 2329 * before using them. 2330 * 2331 * @remarks requires EFER. 2332 */ 2333 DECLINLINE(int) hmR0VmxLoadGuestExitCtls(PVM pVM, PVMCPU pVCpu, PCPUMCTX pMixedCtx) 2321 2334 { 2322 2335 int rc = VINF_SUCCESS; … … 2336 2349 Assert(!(val & VMX_VMCS_CTRL_EXIT_CONTROLS_HOST_ADDR_SPACE_SIZE)); 2337 2350 #elif HC_ARCH_BITS == 32 && defined(VBOX_ENABLE_64_BITS_GUESTS) 2338 if (CPUMIsGuestInLongModeEx(p Ctx))2351 if (CPUMIsGuestInLongModeEx(pMixedCtx)) 2339 2352 val |= VMX_VMCS_CTRL_EXIT_CONTROLS_HOST_ADDR_SPACE_SIZE; /* The switcher goes to long mode. */ 2340 2353 else … … 3734 3747 int rc = VMXReadVmcs32(VMX_VMCS32_RO_EXIT_REASON, &pVCpu->hm.s.vmx.lasterror.u32ExitReason); 3735 3748 rc |= VMXReadVmcs32(VMX_VMCS32_RO_VM_INSTR_ERROR, &pVCpu->hm.s.vmx.lasterror.u32InstrError); 3736 rc |= hmR0VmxReadExitQualificationVmcs(pV mxTransient);3749 rc |= hmR0VmxReadExitQualificationVmcs(pVCpu, pVmxTransient); 3737 3750 AssertRC(rc); 3738 3751 … … 3917 3930 #endif 3918 3931 3932 #ifdef VBOX_STRICT 3933 static bool hmR0VmxIsValidReadField(uint32_t idxField) 3934 { 3935 switch (idxField) 3936 { 3937 case VMX_VMCS_GUEST_RIP: 3938 case VMX_VMCS_GUEST_RSP: 3939 case VMX_VMCS_GUEST_RFLAGS: 3940 case VMX_VMCS32_GUEST_INTERRUPTIBILITY_STATE: 3941 case VMX_VMCS_CTRL_CR0_READ_SHADOW: 3942 case VMX_VMCS_GUEST_CR0: 3943 case VMX_VMCS_CTRL_CR4_READ_SHADOW: 3944 case VMX_VMCS_GUEST_CR4: 3945 case VMX_VMCS_GUEST_DR7: 3946 case VMX_VMCS32_GUEST_SYSENTER_CS: 3947 case VMX_VMCS_GUEST_SYSENTER_EIP: 3948 case VMX_VMCS_GUEST_SYSENTER_ESP: 3949 case VMX_VMCS32_GUEST_GDTR_LIMIT: 3950 case VMX_VMCS_GUEST_GDTR_BASE: 3951 case VMX_VMCS32_GUEST_IDTR_LIMIT: 3952 case VMX_VMCS_GUEST_IDTR_BASE: 3953 case VMX_VMCS16_GUEST_FIELD_CS: 3954 case VMX_VMCS32_GUEST_CS_LIMIT: 3955 case VMX_VMCS_GUEST_CS_BASE: 3956 case VMX_VMCS32_GUEST_CS_ACCESS_RIGHTS: 3957 case VMX_VMCS16_GUEST_FIELD_DS: 3958 case VMX_VMCS32_GUEST_DS_LIMIT: 3959 case VMX_VMCS_GUEST_DS_BASE: 3960 case VMX_VMCS32_GUEST_DS_ACCESS_RIGHTS: 3961 case VMX_VMCS16_GUEST_FIELD_ES: 3962 case VMX_VMCS32_GUEST_ES_LIMIT: 3963 case VMX_VMCS_GUEST_ES_BASE: 3964 case VMX_VMCS32_GUEST_ES_ACCESS_RIGHTS: 3965 case VMX_VMCS16_GUEST_FIELD_FS: 3966 case VMX_VMCS32_GUEST_FS_LIMIT: 3967 case VMX_VMCS_GUEST_FS_BASE: 3968 case VMX_VMCS32_GUEST_FS_ACCESS_RIGHTS: 3969 case VMX_VMCS16_GUEST_FIELD_GS: 3970 case VMX_VMCS32_GUEST_GS_LIMIT: 3971 case VMX_VMCS_GUEST_GS_BASE: 3972 case VMX_VMCS32_GUEST_GS_ACCESS_RIGHTS: 3973 case VMX_VMCS16_GUEST_FIELD_SS: 3974 case VMX_VMCS32_GUEST_SS_LIMIT: 3975 case VMX_VMCS_GUEST_SS_BASE: 3976 case VMX_VMCS32_GUEST_SS_ACCESS_RIGHTS: 3977 case VMX_VMCS16_GUEST_FIELD_LDTR: 3978 case VMX_VMCS32_GUEST_LDTR_LIMIT: 3979 case VMX_VMCS_GUEST_LDTR_BASE: 3980 case VMX_VMCS32_GUEST_LDTR_ACCESS_RIGHTS: 3981 case VMX_VMCS16_GUEST_FIELD_TR: 3982 case VMX_VMCS32_GUEST_TR_LIMIT: 3983 case VMX_VMCS_GUEST_TR_BASE: 3984 case VMX_VMCS32_GUEST_TR_ACCESS_RIGHTS: 3985 case VMX_VMCS32_RO_EXIT_REASON: 3986 case VMX_VMCS32_RO_VM_INSTR_ERROR: 3987 case VMX_VMCS32_RO_EXIT_INSTR_LENGTH: 3988 case VMX_VMCS32_RO_EXIT_INTERRUPTION_ERROR_CODE: 3989 case VMX_VMCS32_RO_EXIT_INTERRUPTION_INFO: 3990 case VMX_VMCS32_RO_EXIT_INSTR_INFO: 3991 case VMX_VMCS_RO_EXIT_QUALIFICATION: 3992 case VMX_VMCS32_RO_IDT_INFO: 3993 case VMX_VMCS32_RO_IDT_ERROR_CODE: 3994 case VMX_VMCS_GUEST_CR3: 3995 case VMX_VMCS64_EXIT_GUEST_PHYS_ADDR_FULL: 3996 return true; 3997 } 3998 return false; 3999 } 4000 4001 static bool hmR0VmxIsValidWriteField(uint32_t idxField) 4002 { 4003 switch (idxField) 4004 { 4005 case VMX_VMCS_GUEST_LDTR_BASE: 4006 case VMX_VMCS_GUEST_TR_BASE: 4007 case VMX_VMCS_GUEST_GDTR_BASE: 4008 case VMX_VMCS_GUEST_IDTR_BASE: 4009 case VMX_VMCS_GUEST_SYSENTER_EIP: 4010 case VMX_VMCS_GUEST_SYSENTER_ESP: 4011 case VMX_VMCS_GUEST_CR0: 4012 case VMX_VMCS_GUEST_CR4: 4013 case VMX_VMCS_GUEST_CR3: 4014 case VMX_VMCS_GUEST_DR7: 4015 case VMX_VMCS_GUEST_RIP: 4016 case VMX_VMCS_GUEST_RSP: 4017 case VMX_VMCS_GUEST_CS_BASE: 4018 case VMX_VMCS_GUEST_DS_BASE: 4019 case VMX_VMCS_GUEST_ES_BASE: 4020 case VMX_VMCS_GUEST_FS_BASE: 4021 case VMX_VMCS_GUEST_GS_BASE: 4022 case VMX_VMCS_GUEST_SS_BASE: 4023 return true; 4024 } 4025 return false; 4026 } 4027 #endif /* VBOX_STRICT */ 4028 3919 4029 /** 3920 4030 * Executes the specified handler in 64-bit mode. … … 4202 4312 case VMX_VMCS64_CTRL_IO_BITMAP_B_FULL: 4203 4313 case VMX_VMCS64_CTRL_MSR_BITMAP_FULL: 4204 case VMX_VMCS64_CTRL_ VMEXIT_MSR_STORE_FULL:4205 case VMX_VMCS64_CTRL_ VMEXIT_MSR_LOAD_FULL:4206 case VMX_VMCS64_CTRL_ VMENTRY_MSR_LOAD_FULL:4314 case VMX_VMCS64_CTRL_EXIT_MSR_STORE_FULL: 4315 case VMX_VMCS64_CTRL_EXIT_MSR_LOAD_FULL: 4316 case VMX_VMCS64_CTRL_ENTRY_MSR_LOAD_FULL: 4207 4317 case VMX_VMCS64_CTRL_EXEC_VMCS_PTR_FULL: 4208 4318 case VMX_VMCS64_CTRL_TSC_OFFSET_FULL: … … 4256 4366 case VMX_VMCS_GUEST_RIP: 4257 4367 case VMX_VMCS_GUEST_RFLAGS: 4258 case VMX_VMCS_GUEST_ DEBUG_EXCEPTIONS:4368 case VMX_VMCS_GUEST_PENDING_DEBUG_EXCEPTIONS: 4259 4369 case VMX_VMCS_GUEST_SYSENTER_ESP: 4260 4370 case VMX_VMCS_GUEST_SYSENTER_EIP: … … 4268 4378 { 4269 4379 /* Assert that only the 32->64 switcher case should ever come here. */ 4270 Assert(pV M->hm.s.fAllow64BitGuests);4380 Assert(pVCpu->CTX_SUFF(pVM)->hm.s.fAllow64BitGuests); 4271 4381 rc = VMXWriteCachedVmcsEx(pVCpu, idxField, u64Val); 4272 4382 } … … 4321 4431 /** 4322 4432 * Loads the VMCS write-cache into the CPU (by executing VMWRITEs). 4323 * 4433 * 4434 * @param pVCpu Pointer to the VMCPU. 4324 4435 * @param pCache Pointer to the VMCS cache. 4325 */ 4326 VMMR0DECL(void) VMXWriteCachedVmcsLoad(PVMCSCACHE pCache) 4436 * 4437 * @remarks No-long-jump zone!!! 4438 */ 4439 VMMR0DECL(void) VMXWriteCachedVmcsLoad(PVMCPU pVCpu, PVMCSCACHE pCache) 4327 4440 { 4328 4441 AssertPtr(pCache); … … 4330 4443 { 4331 4444 int rc = VMXWriteVmcs64(pCache->Write.aField[i], pCache->Write.aFieldVal[i]); 4332 AssertRC(rc , rc);4445 AssertRC(rc); 4333 4446 } 4334 4447 pCache->Write.cValidEntries = 0; … … 4339 4452 * Stores the VMCS read-cache from the CPU (by executing VMREADs). 4340 4453 * 4454 * @param pVCpu Pointer to the VMCPU. 4341 4455 * @param pCache Pointer to the VMCS cache. 4456 * 4342 4457 * @remarks No-long-jump zone!!! 4343 4458 */ 4344 VMMR0DECL(void) VMXReadCachedVmcsStore(PVMC SCACHE pCache)4459 VMMR0DECL(void) VMXReadCachedVmcsStore(PVMCPU pVCpu, PVMCSCACHE pCache) 4345 4460 { 4346 4461 AssertPtr(pCache); … … 4517 4632 if (VMX_IDT_VECTORING_INFO_VALID(pVmxTransient->uIdtVectoringInfo)) 4518 4633 { 4519 rc = hmR0VmxReadExitIntrInfoVmcs(pV mxTransient);4634 rc = hmR0VmxReadExitIntrInfoVmcs(pVCpu, pVmxTransient); 4520 4635 AssertRCReturn(rc, rc); 4521 4636 … … 5046 5161 * context. 5047 5162 * 5048 * @returns VBox status code. 5163 * @returns VBox status code. 5164 * @param pVCpu Pointer to the VMCPU. 5049 5165 * @param idxSel Index of the selector in the VMCS. 5050 5166 * @param idxLimit Index of the segment limit in the VMCS. … … 5053 5169 * @param pSelReg Pointer to the segment selector. 5054 5170 * 5055 * @remarks No-long-jump zone!!! 5056 */ 5057 DECLINLINE(int) hmR0VmxReadSegmentReg(uint32_t idxSel, uint32_t idxLimit, uint32_t idxBase, uint32_t idxAccess, 5171 * @remarks No-long-jump zone!!! 5172 * @remarks Never call this function directly. Use the VMXLOCAL_READ_SEG() macro 5173 * as that takes care of whether to read from the VMCS cache or not. 5174 */ 5175 DECLINLINE(int) hmR0VmxReadSegmentReg(PVMCPU pVCpu, uint32_t idxSel, uint32_t idxLimit, uint32_t idxBase, uint32_t idxAccess, 5058 5176 PCPUMSELREG pSelReg) 5059 5177 { … … 5068 5186 5069 5187 RTGCUINTREG uGCVal = 0; 5070 rc |= VMXReadVmcsGstN (idxBase, &uGCVal);5188 rc |= VMXReadVmcsGstNByIdxVal(idxBase, &uGCVal); 5071 5189 pSelReg->u64Base = uGCVal; 5072 5190 … … 5103 5221 static int hmR0VmxSaveGuestSegmentRegs(PVM pVM, PVMCPU pVCpu, PCPUMCTX pMixedCtx) 5104 5222 { 5223 #ifdef VMX_USE_CACHED_VMCS_ACCESSES 5224 #define VMXLOCAL_READ_SEG(Sel, CtxSel) \ 5225 hmR0VmxReadSegmentReg(pVCpu, VMX_VMCS16_GUEST_FIELD_##Sel, VMX_VMCS32_GUEST_##Sel##_LIMIT, \ 5226 VMX_VMCS_GUEST_##Sel##_BASE_CACHE_IDX, VMX_VMCS32_GUEST_##Sel##_ACCESS_RIGHTS, &pMixedCtx->##CtxSel) 5227 #else 5228 #define VMXLOCAL_READ_SEG(Sel, Val) \ 5229 hmR0VmxReadSegmentReg(pVCpu, VMX_VMCS16_GUEST_FIELD_##Sel, VMX_VMCS32_GUEST_##Sel##_LIMIT, \ 5230 VMX_VMCS_GUEST_##Sel##_BASE, VMX_VMCS32_GUEST_##Sel##_ACCESS_RIGHTS, &pMixedCtx->##CtxSel) 5231 #endif 5232 5105 5233 int rc = VINF_SUCCESS; 5106 5234 … … 5109 5237 { 5110 5238 rc = hmR0VmxSaveGuestCR0(pVM, pVCpu, pMixedCtx); 5111 5112 rc |= hmR0VmxReadSegmentReg(VMX_VMCS16_GUEST_FIELD_CS, VMX_VMCS32_GUEST_CS_LIMIT, VMX_VMCS_GUEST_CS_BASE, 5113 VMX_VMCS32_GUEST_CS_ACCESS_RIGHTS, &pMixedCtx->cs); 5114 rc |= hmR0VmxReadSegmentReg(VMX_VMCS16_GUEST_FIELD_SS, VMX_VMCS32_GUEST_SS_LIMIT, VMX_VMCS_GUEST_SS_BASE, 5115 VMX_VMCS32_GUEST_SS_ACCESS_RIGHTS, &pMixedCtx->ss); 5116 rc |= hmR0VmxReadSegmentReg(VMX_VMCS16_GUEST_FIELD_DS, VMX_VMCS32_GUEST_DS_LIMIT, VMX_VMCS_GUEST_DS_BASE, 5117 VMX_VMCS32_GUEST_DS_ACCESS_RIGHTS, &pMixedCtx->ds); 5118 rc |= hmR0VmxReadSegmentReg(VMX_VMCS16_GUEST_FIELD_ES, VMX_VMCS32_GUEST_ES_LIMIT, VMX_VMCS_GUEST_ES_BASE, 5119 VMX_VMCS32_GUEST_ES_ACCESS_RIGHTS, &pMixedCtx->es); 5120 rc |= hmR0VmxReadSegmentReg(VMX_VMCS16_GUEST_FIELD_FS, VMX_VMCS32_GUEST_FS_LIMIT, VMX_VMCS_GUEST_FS_BASE, 5121 VMX_VMCS32_GUEST_FS_ACCESS_RIGHTS, &pMixedCtx->fs); 5122 rc |= hmR0VmxReadSegmentReg(VMX_VMCS16_GUEST_FIELD_GS, VMX_VMCS32_GUEST_GS_LIMIT, VMX_VMCS_GUEST_GS_BASE, 5123 VMX_VMCS32_GUEST_GS_ACCESS_RIGHTS, &pMixedCtx->gs); 5239 rc |= VMXLOCAL_READ_SEG(CS, cs); 5240 rc |= VMXLOCAL_READ_SEG(SS, ss); 5241 rc |= VMXLOCAL_READ_SEG(DS, ds); 5242 rc |= VMXLOCAL_READ_SEG(ES, es); 5243 rc |= VMXLOCAL_READ_SEG(FS, fs); 5244 rc |= VMXLOCAL_READ_SEG(GS, gs); 5124 5245 AssertRCReturn(rc, rc); 5125 5246 … … 5134 5255 pMixedCtx->gs.Attr.u = pVCpu->hm.s.vmx.RealMode.uAttrGS.u; 5135 5256 } 5136 5137 5257 pVCpu->hm.s.vmx.fUpdatedGuestState |= VMX_UPDATED_GUEST_SEGMENT_REGS; 5138 5258 } … … 5141 5261 if (!(pVCpu->hm.s.vmx.fUpdatedGuestState & VMX_UPDATED_GUEST_LDTR)) 5142 5262 { 5143 rc = hmR0VmxReadSegmentReg(VMX_VMCS16_GUEST_FIELD_LDTR, VMX_VMCS32_GUEST_LDTR_LIMIT, VMX_VMCS_GUEST_LDTR_BASE, 5144 VMX_VMCS32_GUEST_LDTR_ACCESS_RIGHTS, &pMixedCtx->ldtr); 5263 rc = VMXLOCAL_READ_SEG(LDTR, ldtr); 5145 5264 AssertRCReturn(rc, rc); 5146 5265 pVCpu->hm.s.vmx.fUpdatedGuestState |= VMX_UPDATED_GUEST_LDTR; … … 5174 5293 rc = hmR0VmxSaveGuestCR0(pVM, pVCpu, pMixedCtx); 5175 5294 5176 /* For real-mode emulation using virtual-8086 mode we have the fake TSS (pRealModeTSS) in TR, don't s yncthe fake one. */5295 /* For real-mode emulation using virtual-8086 mode we have the fake TSS (pRealModeTSS) in TR, don't save the fake one. */ 5177 5296 if (!pVCpu->hm.s.vmx.RealMode.fRealOnV86Active) 5178 { 5179 rc |= hmR0VmxReadSegmentReg(VMX_VMCS16_GUEST_FIELD_TR, VMX_VMCS32_GUEST_TR_LIMIT, VMX_VMCS_GUEST_TR_BASE, 5180 VMX_VMCS32_GUEST_TR_ACCESS_RIGHTS, &pMixedCtx->tr); 5181 } 5297 rc |= VMXLOCAL_READ_SEG(TR, tr); 5182 5298 AssertRCReturn(rc, rc); 5183 5299 pVCpu->hm.s.vmx.fUpdatedGuestState |= VMX_UPDATED_GUEST_TR; … … 5406 5522 uint32_t uVectorType = VMX_IDT_VECTORING_INFO_TYPE(pVCpu->hm.s.Event.u64IntrInfo); 5407 5523 uint32_t uVector = VMX_IDT_VECTORING_INFO_VECTOR(pVCpu->hm.s.Event.u64IntrInfo); 5408 bool fErrorCodeValid = VMX_IDT_VECTORING_INFO_ERROR_CODE_IS_VALID(pVCpu->hm.s.Event.u64IntrInfo);5524 bool fErrorCodeValid = !!VMX_IDT_VECTORING_INFO_ERROR_CODE_IS_VALID(pVCpu->hm.s.Event.u64IntrInfo); 5409 5525 uint32_t uErrorCode = pVCpu->hm.s.Event.u32ErrCode; 5410 5526 … … 6171 6287 AssertLogRelMsgRCReturn(rc, ("hmR0VmxLoadGuestEntryCtls! rc=%Rrc (pVM=%p pVCpu=%p)\n", rc, pVM, pVCpu), rc); 6172 6288 6173 rc = hmR0VmxLoadGuestExitCtls(pVM, pVCpu );6289 rc = hmR0VmxLoadGuestExitCtls(pVM, pVCpu, pCtx); 6174 6290 AssertLogRelMsgRCReturn(rc, ("hmR0VmxSetupExitCtls failed! rc=%Rrc (pVM=%p pVCpu=%p)\n", rc, pVM, pVCpu), rc); 6175 6291 … … 6431 6547 AssertRC(rc); 6432 6548 pVmxTransient->uExitReason = (uint16_t)VMX_EXIT_REASON_BASIC(uExitReason); 6433 pVmxTransient->fVMEntryFailed = VMX_ENTRY_INTERRUPTION_INFO_VALID(pVmxTransient->uEntryIntrInfo);6549 pVmxTransient->fVMEntryFailed = !!VMX_ENTRY_INTERRUPTION_INFO_VALID(pVmxTransient->uEntryIntrInfo); 6434 6550 6435 6551 VMMRZCallRing3SetNotification(pVCpu, hmR0VmxCallRing3Callback, pMixedCtx); … … 6635 6751 AssertPtr(pVmxTransient); \ 6636 6752 Assert(pVmxTransient->fVMEntryFailed == false); \ 6637 Assert(ASMIntAreEnabled() == true);\6753 Assert(ASMIntAreEnabled()); \ 6638 6754 Assert(!RTThreadPreemptIsEnabled(NIL_RTTHREAD)); \ 6639 6755 VMX_ASSERT_PREEMPT_CPUID_VAR(); \ … … 6673 6789 { 6674 6790 VMX_VALIDATE_EXIT_HANDLER_PARAMS(); 6675 int rc = hmR0VmxReadExitIntrInfoVmcs(pV mxTransient);6791 int rc = hmR0VmxReadExitIntrInfoVmcs(pVCpu, pVmxTransient); 6676 6792 AssertRCReturn(rc, rc); 6677 6793 … … 6729 6845 Assert(pVM->hm.s.vmx.pRealModeTSS); 6730 6846 Assert(PDMVmmDevHeapIsEnabled(pVM)); 6731 rc = hmR0VmxReadExitInstrLenVmcs(pV mxTransient);6732 rc |= hmR0VmxReadExitIntrErrorCodeVmcs(pV mxTransient);6847 rc = hmR0VmxReadExitInstrLenVmcs(pVCpu, pVmxTransient); 6848 rc |= hmR0VmxReadExitIntrErrorCodeVmcs(pVCpu, pVmxTransient); 6733 6849 AssertRCReturn(rc, rc); 6734 6850 rc = hmR0VmxInjectEventVmcs(pVM, pVCpu, pMixedCtx, … … 6795 6911 { 6796 6912 VMX_VALIDATE_EXIT_HANDLER_PARAMS(); 6797 int rc = hmR0VmxReadExitInstrLenVmcs(pV mxTransient);6913 int rc = hmR0VmxReadExitInstrLenVmcs(pVCpu, pVmxTransient); 6798 6914 rc |= hmR0VmxSaveGuestRip(pVM, pVCpu, pMixedCtx); 6799 6915 AssertRCReturn(rc, rc); … … 6813 6929 { 6814 6930 VMX_VALIDATE_EXIT_HANDLER_PARAMS(); 6815 int rc = hmR0VmxReadExitInstrLenVmcs(pV mxTransient);6931 int rc = hmR0VmxReadExitInstrLenVmcs(pVCpu, pVmxTransient); 6816 6932 rc |= hmR0VmxSaveGuestRip(pVM, pVCpu, pMixedCtx); 6817 6933 AssertRCReturn(rc, rc); … … 6835 6951 { 6836 6952 rc = hmR0VmxSaveGuestRip(pVM, pVCpu, pMixedCtx); 6837 rc |= hmR0VmxReadExitInstrLenVmcs(pV mxTransient);6953 rc |= hmR0VmxReadExitInstrLenVmcs(pVCpu, pVmxTransient); 6838 6954 AssertRCReturn(rc, rc); 6839 6955 Assert(pVmxTransient->cbInstr == 2); … … 6882 6998 if (RT_LIKELY(rc == VINF_SUCCESS)) 6883 6999 { 6884 rc = hmR0VmxReadExitInstrLenVmcs(pV mxTransient);7000 rc = hmR0VmxReadExitInstrLenVmcs(pVCpu, pVmxTransient); 6885 7001 rc |= hmR0VmxSaveGuestRip(pVM, pVCpu, pMixedCtx); 6886 7002 AssertRCReturn(rc, rc); … … 6917 7033 if (RT_LIKELY(rc == VINF_SUCCESS)) 6918 7034 { 6919 rc = hmR0VmxReadExitInstrLenVmcs(pV mxTransient);7035 rc = hmR0VmxReadExitInstrLenVmcs(pVCpu, pVmxTransient); 6920 7036 rc |= hmR0VmxSaveGuestRip(pVM, pVCpu, pMixedCtx); 6921 7037 AssertRCReturn(rc, rc); … … 6952 7068 if (RT_LIKELY(rc == VINF_SUCCESS)) 6953 7069 { 6954 rc = hmR0VmxReadExitInstrLenVmcs(pV mxTransient);7070 rc = hmR0VmxReadExitInstrLenVmcs(pVCpu, pVmxTransient); 6955 7071 rc |= hmR0VmxSaveGuestRip(pVM, pVCpu, pMixedCtx); 6956 7072 AssertRCReturn(rc, rc); … … 6976 7092 { 6977 7093 VMX_VALIDATE_EXIT_HANDLER_PARAMS(); 6978 int rc = hmR0VmxReadExitQualificationVmcs(pV mxTransient);7094 int rc = hmR0VmxReadExitQualificationVmcs(pVCpu, pVmxTransient); 6979 7095 rc |= hmR0VmxSaveGuestControlRegs(pVM, pVCpu, pMixedCtx); 6980 7096 AssertRCReturn(rc, rc); … … 6984 7100 if (RT_LIKELY(rc == VINF_SUCCESS)) 6985 7101 { 6986 rc = hmR0VmxReadExitInstrLenVmcs(pV mxTransient);7102 rc = hmR0VmxReadExitInstrLenVmcs(pVCpu, pVmxTransient); 6987 7103 rc |= hmR0VmxSaveGuestRip(pVM, pVCpu, pMixedCtx); 6988 7104 AssertRCReturn(rc, rc); … … 7016 7132 if (RT_LIKELY(rc == VINF_SUCCESS)) 7017 7133 { 7018 rc = hmR0VmxReadExitInstrLenVmcs(pV mxTransient);7134 rc = hmR0VmxReadExitInstrLenVmcs(pVCpu, pVmxTransient); 7019 7135 rc |= hmR0VmxSaveGuestRip(pVM, pVCpu, pMixedCtx); 7020 7136 AssertRCReturn(rc, rc); … … 7049 7165 || rc == VINF_EM_HALT)) 7050 7166 { 7051 int rc3 = hmR0VmxReadExitInstrLenVmcs(pV mxTransient);7167 int rc3 = hmR0VmxReadExitInstrLenVmcs(pVCpu, pVmxTransient); 7052 7168 rc3 |= hmR0VmxSaveGuestRip(pVM, pVCpu, pMixedCtx); 7053 7169 AssertRCReturn(rc3, rc3); … … 7245 7361 int rc = hmR0VmxReadEntryIntrInfoVmcs(pVmxTransient); 7246 7362 rc |= hmR0VmxReadEntryXcptErrorCodeVmcs(pVmxTransient); 7247 rc |= hmR0VmxReadEntryInstrLenVmcs(pV mxTransient);7363 rc |= hmR0VmxReadEntryInstrLenVmcs(pVCpu, pVmxTransient); 7248 7364 rc |= VMXReadVmcs32(VMX_VMCS32_GUEST_INTERRUPTIBILITY_STATE, &uIntrState); 7249 7365 rc |= hmR0VmxSaveGuestState(pVM, pVCpu, pMixedCtx); … … 7360 7476 if (RT_LIKELY(rc == VINF_SUCCESS)) 7361 7477 { 7362 rc = hmR0VmxReadExitInstrLenVmcs(pV mxTransient);7478 rc = hmR0VmxReadExitInstrLenVmcs(pVCpu, pVmxTransient); 7363 7479 rc |= hmR0VmxSaveGuestRip(pVM, pVCpu, pMixedCtx); 7364 7480 AssertRCReturn(rc, rc); … … 7378 7494 { 7379 7495 VMX_VALIDATE_EXIT_HANDLER_PARAMS(); 7380 int rc = hmR0VmxReadExitInstrLenVmcs(pV mxTransient);7496 int rc = hmR0VmxReadExitInstrLenVmcs(pVCpu, pVmxTransient); 7381 7497 AssertRCReturn(rc, rc); 7382 7498 Assert(pVmxTransient->cbInstr == 2); … … 7514 7630 { 7515 7631 VMX_VALIDATE_EXIT_HANDLER_PARAMS(); 7516 int rc = hmR0VmxReadExitQualificationVmcs(pV mxTransient);7632 int rc = hmR0VmxReadExitQualificationVmcs(pVCpu, pVmxTransient); 7517 7633 AssertRCReturn(rc, rc); 7518 7634 … … 7628 7744 { 7629 7745 int rc2 = hmR0VmxSaveGuestRip(pVM, pVCpu, pMixedCtx); 7630 rc2 |= hmR0VmxReadExitInstrLenVmcs(pV mxTransient);7746 rc2 |= hmR0VmxReadExitInstrLenVmcs(pVCpu, pVmxTransient); 7631 7747 AssertRCReturn(rc2, rc2); 7632 7748 pMixedCtx->rip += pVmxTransient->cbInstr; … … 7646 7762 VMX_VALIDATE_EXIT_HANDLER_PARAMS(); 7647 7763 7648 int rc = hmR0VmxReadExitQualificationVmcs(pV mxTransient);7649 rc |= hmR0VmxReadExitInstrLenVmcs(pV mxTransient);7764 int rc = hmR0VmxReadExitQualificationVmcs(pVCpu, pVmxTransient); 7765 rc |= hmR0VmxReadExitInstrLenVmcs(pVCpu, pVmxTransient); 7650 7766 rc |= hmR0VmxSaveGuestRip(pVM, pVCpu, pMixedCtx); 7651 7767 rc |= hmR0VmxSaveGuestRflags(pVM, pVCpu, pMixedCtx); /* Eflag checks in EMInterpretDisasCurrent(). */ … … 7816 7932 7817 7933 /* Check if this task-switch occurred while delivery an event through the guest IDT. */ 7818 int rc = hmR0VmxReadExitQualificationVmcs(pV mxTransient);7934 int rc = hmR0VmxReadExitQualificationVmcs(pVCpu, pVmxTransient); 7819 7935 AssertRCReturn(rc, rc); 7820 7936 if (VMX_EXIT_QUALIFICATION_TASK_SWITCH_TYPE(pVmxTransient->uExitQualification) == VMX_EXIT_QUALIFICATION_TASK_SWITCH_TYPE_IDT) … … 7869 7985 { 7870 7986 VMX_VALIDATE_EXIT_HANDLER_PARAMS(); 7871 int rc = hmR0VmxReadExitQualificationVmcs(pV mxTransient);7987 int rc = hmR0VmxReadExitQualificationVmcs(pVCpu, pVmxTransient); 7872 7988 7873 7989 /* If this VM-exit occurred while delivering an event through the guest IDT, handle it accordingly. */ … … 7963 8079 7964 8080 #ifdef VBOX_WITH_STATISTICS 7965 rc = hmR0VmxReadExitQualificationVmcs(pV mxTransient);8081 rc = hmR0VmxReadExitQualificationVmcs(pVCpu, pVmxTransient); 7966 8082 AssertRCReturn(rc, rc); 7967 8083 if (VMX_EXIT_QUALIFICATION_DRX_DIRECTION(pVmxTransient->uExitQualification) == VMX_EXIT_QUALIFICATION_DRX_DIRECTION_WRITE) … … 7980 8096 * hmR0VmxSaveGuestAutoLoadStoreMsrs(). Update only the segment registers from the CPU. 7981 8097 */ 7982 rc = hmR0VmxReadExitQualificationVmcs(pV mxTransient);8098 rc = hmR0VmxReadExitQualificationVmcs(pVCpu, pVmxTransient); 7983 8099 rc |= hmR0VmxSaveGuestSegmentRegs(pVM, pVCpu, pMixedCtx); 7984 8100 AssertRCReturn(rc, rc); … … 8005 8121 { 8006 8122 int rc2 = hmR0VmxSaveGuestRip(pVM, pVCpu, pMixedCtx); 8007 rc2 |= hmR0VmxReadExitInstrLenVmcs(pV mxTransient);8123 rc2 |= hmR0VmxReadExitInstrLenVmcs(pVCpu, pVmxTransient); 8008 8124 AssertRCReturn(rc2, rc2); 8009 8125 pMixedCtx->rip += pVmxTransient->cbInstr; … … 8083 8199 RTGCPHYS GCPhys = 0; 8084 8200 rc = VMXReadVmcs64(VMX_VMCS64_EXIT_GUEST_PHYS_ADDR_FULL, &GCPhys); 8085 rc |= hmR0VmxReadExitQualificationVmcs(pV mxTransient);8201 rc |= hmR0VmxReadExitQualificationVmcs(pVCpu, pVmxTransient); 8086 8202 #if 0 8087 8203 rc |= hmR0VmxSaveGuestState(pVM, pVCpu, pMixedCtx); /** @todo Can we do better? */ … … 8177 8293 if (rc == VINF_EM_RAW_GUEST_TRAP) 8178 8294 { 8179 rc = hmR0VmxReadExitIntrInfoVmcs(pV mxTransient);8180 rc |= hmR0VmxReadExitInstrLenVmcs(pV mxTransient);8181 rc |= hmR0VmxReadExitIntrErrorCodeVmcs(pV mxTransient);8295 rc = hmR0VmxReadExitIntrInfoVmcs(pVCpu, pVmxTransient); 8296 rc |= hmR0VmxReadExitInstrLenVmcs(pVCpu, pVmxTransient); 8297 rc |= hmR0VmxReadExitIntrErrorCodeVmcs(pVCpu, pVmxTransient); 8182 8298 AssertRCReturn(rc, rc); 8183 8299 … … 8200 8316 VMX_VALIDATE_EXIT_XCPT_HANDLER_PARAMS(); 8201 8317 8202 int rc = hmR0VmxReadExitQualificationVmcs(pV mxTransient);8318 int rc = hmR0VmxReadExitQualificationVmcs(pVCpu, pVmxTransient); 8203 8319 rc |= hmR0VmxSaveGuestSegmentRegs(pVM, pVCpu, pMixedCtx); 8204 8320 rc |= hmR0VmxSaveGuestRflags(pVM, pVCpu, pMixedCtx); … … 8230 8346 rc = VMXWriteVmcsGstN(VMX_VMCS_GUEST_DR7, pMixedCtx->dr[7]); 8231 8347 8232 rc |= hmR0VmxReadExitIntrInfoVmcs(pV mxTransient);8233 rc |= hmR0VmxReadExitInstrLenVmcs(pV mxTransient);8234 rc |= hmR0VmxReadExitIntrErrorCodeVmcs(pV mxTransient);8348 rc |= hmR0VmxReadExitIntrInfoVmcs(pVCpu, pVmxTransient); 8349 rc |= hmR0VmxReadExitInstrLenVmcs(pVCpu, pVmxTransient); 8350 rc |= hmR0VmxReadExitIntrErrorCodeVmcs(pVCpu, pVmxTransient); 8235 8351 rc |= hmR0VmxInjectEventVmcs(pVM, pVCpu, pMixedCtx, 8236 8352 VMX_VMCS_CTRL_ENTRY_IRQ_INFO_FROM_EXIT_INT_INFO(pVmxTransient->uExitIntrInfo), … … 8272 8388 /* Forward #NM to the guest. */ 8273 8389 Assert(rc == VINF_EM_RAW_GUEST_TRAP); 8274 rc = hmR0VmxReadExitIntrInfoVmcs(pV mxTransient);8390 rc = hmR0VmxReadExitIntrInfoVmcs(pVCpu, pVmxTransient); 8275 8391 AssertRCReturn(rc, rc); 8276 8392 rc = hmR0VmxInjectEventVmcs(pVM, pVCpu, pMixedCtx, … … 8298 8414 #ifdef VBOX_ALWAYS_TRAP_ALL_EXCEPTIONS 8299 8415 /* If the guest is not in real-mode or we have unrestricted execution support, reflect #GP to the guest. */ 8300 rc = hmR0VmxReadExitIntrInfoVmcs(pV mxTransient);8301 rc |= hmR0VmxReadExitIntrErrorCodeVmcs(pV mxTransient);8302 rc |= hmR0VmxReadExitInstrLenVmcs(pV mxTransient);8416 rc = hmR0VmxReadExitIntrInfoVmcs(pVCpu, pVmxTransient); 8417 rc |= hmR0VmxReadExitIntrErrorCodeVmcs(pVCpu, pVmxTransient); 8418 rc |= hmR0VmxReadExitInstrLenVmcs(pVCpu, pVmxTransient); 8303 8419 rc |= hmR0VmxInjectEventVmcs(pVM, pVCpu, pMixedCtx, 8304 8420 VMX_VMCS_CTRL_ENTRY_IRQ_INFO_FROM_EXIT_INT_INFO(pVmxTransient->uExitIntrInfo), … … 8547 8663 VMX_VALIDATE_EXIT_XCPT_HANDLER_PARAMS(); 8548 8664 8549 int rc = hmR0VmxReadExitQualificationVmcs(pV mxTransient);8550 rc |= hmR0VmxReadExitIntrInfoVmcs(pV mxTransient);8551 rc |= hmR0VmxReadExitInstrLenVmcs(pV mxTransient);8552 rc |= hmR0VmxReadExitIntrErrorCodeVmcs(pV mxTransient);8665 int rc = hmR0VmxReadExitQualificationVmcs(pVCpu, pVmxTransient); 8666 rc |= hmR0VmxReadExitIntrInfoVmcs(pVCpu, pVmxTransient); 8667 rc |= hmR0VmxReadExitInstrLenVmcs(pVCpu, pVmxTransient); 8668 rc |= hmR0VmxReadExitIntrErrorCodeVmcs(pVCpu, pVmxTransient); 8553 8669 AssertRCReturn(rc, rc); 8554 8670 -
trunk/src/VBox/VMM/VMMR0/HWVMXR0.cpp
r45387 r45453 5500 5500 5501 5501 5502 # 5502 #ifdef VBOX_STRICT 5503 5503 static bool hmR0VmxIsValidReadField(uint32_t idxField) 5504 5504 { … … 5596 5596 return false; 5597 5597 } 5598 # 5598 #endif /* VBOX_STRICT */ 5599 5599 5600 5600 -
trunk/src/VBox/VMM/VMMR0/HWVMXR0.h
r45092 r45453 73 73 # define VMXReadVmcsHstN VMXReadVmcs32 74 74 # define VMXReadVmcsGstN(idxField, pVal) VMXReadCachedVmcsEx(pVCpu, idxField##_CACHE_IDX, pVal) 75 # define VMXReadVmcsGstNByIdxVal(idxField, pVal) VMXReadCachedVmcsEx(pVCpu, idxField, pVal) 75 76 # else 76 77 # define VMXReadVmcsHstN VMXReadVmcs64 77 78 # define VMXReadVmcsGstN VMXReadVmcs64 79 # define VMXReadVmcsGstNByIdxVal VMXReadVmcs64 78 80 # endif 79 81 #endif
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