VirtualBox

Changeset 45453 in vbox


Ignore:
Timestamp:
Apr 10, 2013 11:15:16 AM (12 years ago)
Author:
vboxsync
svn:sync-xref-src-repo-rev:
84890
Message:

VMM/VMMR0/HM: build fixes for 32-bit hosts

Location:
trunk/src/VBox/VMM/VMMR0
Files:
3 edited

Legend:

Unmodified
Added
Removed
  • trunk/src/VBox/VMM/VMMR0/HMVMXR0.cpp

    r45442 r45453  
    203203static int                hmR0VmxInjectEventVmcs(PVM pVM, PVMCPU pVCpu, PCPUMCTX pMixedCtx, uint64_t u64IntrInfo,
    204204                                                 uint32_t cbInstr, uint32_t u32ErrCode);
     205#if HC_ARCH_BITS == 32 && !defined(VBOX_WITH_HYBRID_32BIT_KERNEL)
     206static int                hmR0VmxInitVmcsReadCache(PVM pVM, PVMCPU pVCpu);
     207#endif
    205208#if 0
    206209DECLINLINE(int)           hmR0VmxHandleExit(PVM pVM, PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient,
     
    438441 *
    439442 * @returns VBox status code.
     443 * @param   pVCpu           Pointer to the VMCPU.
    440444 * @param   pVmxTransient   Pointer to the VMX transient structure.
    441445 *
    442446 * @remarks No-long-jump zone!!!
    443447 */
    444 DECLINLINE(int) hmR0VmxReadEntryInstrLenVmcs(PVMXTRANSIENT pVmxTransient)
     448DECLINLINE(int) hmR0VmxReadEntryInstrLenVmcs(PVMCPU pVCpu, PVMXTRANSIENT pVmxTransient)
    445449{
    446450    int rc = VMXReadVmcs32(VMX_VMCS32_CTRL_ENTRY_INSTR_LENGTH, &pVmxTransient->cbEntryInstr);
     
    455459 *
    456460 * @returns VBox status code.
     461 * @param   pVCpu           Pointer to the VMCPU.
    457462 * @param   pVmxTransient   Pointer to the VMX transient structure.
    458463 */
    459 DECLINLINE(int) hmR0VmxReadExitIntrInfoVmcs(PVMXTRANSIENT pVmxTransient)
     464DECLINLINE(int) hmR0VmxReadExitIntrInfoVmcs(PVMCPU pVCpu, PVMXTRANSIENT pVmxTransient)
    460465{
    461466    if (!(pVmxTransient->fVmcsFieldsRead & VMX_TRANSIENT_EXIT_INTERRUPTION_INFO))
     
    474479 *
    475480 * @returns VBox status code.
     481 * @param   pVCpu           Pointer to the VMCPU.
    476482 * @param   pVmxTransient   Pointer to the VMX transient structure.
    477483 */
    478 DECLINLINE(int) hmR0VmxReadExitIntrErrorCodeVmcs(PVMXTRANSIENT pVmxTransient)
     484DECLINLINE(int) hmR0VmxReadExitIntrErrorCodeVmcs(PVMCPU pVCpu, PVMXTRANSIENT pVmxTransient)
    479485{
    480486    if (!(pVmxTransient->fVmcsFieldsRead & VMX_TRANSIENT_EXIT_INTERRUPTION_ERROR_CODE))
     
    492498 * transient structure.
    493499 *
    494  * @returns VBox status code.
     500 * @returns VBox status code.
     501 * @param   pVCpu           Pointer to the VMCPU.
    495502 * @param   pVmxTransient   Pointer to the VMX transient structure.
    496503 */
    497 DECLINLINE(int) hmR0VmxReadExitInstrLenVmcs(PVMXTRANSIENT pVmxTransient)
     504DECLINLINE(int) hmR0VmxReadExitInstrLenVmcs(PVMCPU pVCpu, PVMXTRANSIENT pVmxTransient)
    498505{
    499506    if (!(pVmxTransient->fVmcsFieldsRead & VMX_TRANSIENT_EXIT_INSTR_LEN))
     
    510517 * Reads the exit qualification from the VMCS into the VMX transient structure.
    511518 *
    512  * @returns VBox status code.
     519 * @returns VBox status code.
     520 * @param   pVCpu           Pointer to the VMCPU.
    513521 * @param   pVmxTransient   Pointer to the VMX transient structure.
    514522 */
    515 DECLINLINE(int) hmR0VmxReadExitQualificationVmcs(PVMXTRANSIENT pVmxTransient)
     523DECLINLINE(int) hmR0VmxReadExitQualificationVmcs(PVMCPU pVCpu, PVMXTRANSIENT pVmxTransient)
    516524{
    517525    if (!(pVmxTransient->fVmcsFieldsRead & VMX_TRANSIENT_EXIT_QUALIFICATION))
     
    550558 * transient structure.
    551559 *
    552  * @returns VBox status code.
     560 * @returns VBox status code. 
    553561 * @param   pVmxTransient   Pointer to the VMX transient structure.
    554562 */
     
    23162324 * @returns VBox status code.
    23172325 * @param   pVM         Pointer to the VM.
    2318  * @param   pVCpu       Pointer to the VMCPU.
    2319  */
    2320 DECLINLINE(int) hmR0VmxLoadGuestExitCtls(PVM pVM, PVMCPU pVCpu)
     2326 * @param   pVCpu       Pointer to the VMCPU.
     2327 * @param   pMixedCtx   Pointer to the guest-CPU context. The data may be
     2328 *                      out-of-sync. Make sure to update the required fields
     2329 *                      before using them.
     2330 * 
     2331 * @remarks requires EFER.
     2332 */
     2333DECLINLINE(int) hmR0VmxLoadGuestExitCtls(PVM pVM, PVMCPU pVCpu, PCPUMCTX pMixedCtx)
    23212334{
    23222335    int rc = VINF_SUCCESS;
     
    23362349            Assert(!(val & VMX_VMCS_CTRL_EXIT_CONTROLS_HOST_ADDR_SPACE_SIZE));
    23372350#elif HC_ARCH_BITS == 32 && defined(VBOX_ENABLE_64_BITS_GUESTS)
    2338         if (CPUMIsGuestInLongModeEx(pCtx))
     2351        if (CPUMIsGuestInLongModeEx(pMixedCtx))
    23392352            val |= VMX_VMCS_CTRL_EXIT_CONTROLS_HOST_ADDR_SPACE_SIZE;    /* The switcher goes to long mode. */
    23402353        else
     
    37343747            int rc = VMXReadVmcs32(VMX_VMCS32_RO_EXIT_REASON, &pVCpu->hm.s.vmx.lasterror.u32ExitReason);
    37353748            rc    |= VMXReadVmcs32(VMX_VMCS32_RO_VM_INSTR_ERROR, &pVCpu->hm.s.vmx.lasterror.u32InstrError);
    3736             rc    |= hmR0VmxReadExitQualificationVmcs(pVmxTransient);
     3749            rc    |= hmR0VmxReadExitQualificationVmcs(pVCpu, pVmxTransient);
    37373750            AssertRC(rc);
    37383751
     
    39173930#endif
    39183931
     3932#ifdef VBOX_STRICT
     3933static bool hmR0VmxIsValidReadField(uint32_t idxField)
     3934{
     3935    switch (idxField)
     3936    {
     3937        case VMX_VMCS_GUEST_RIP:
     3938        case VMX_VMCS_GUEST_RSP:
     3939        case VMX_VMCS_GUEST_RFLAGS:
     3940        case VMX_VMCS32_GUEST_INTERRUPTIBILITY_STATE:
     3941        case VMX_VMCS_CTRL_CR0_READ_SHADOW:
     3942        case VMX_VMCS_GUEST_CR0:
     3943        case VMX_VMCS_CTRL_CR4_READ_SHADOW:
     3944        case VMX_VMCS_GUEST_CR4:
     3945        case VMX_VMCS_GUEST_DR7:
     3946        case VMX_VMCS32_GUEST_SYSENTER_CS:
     3947        case VMX_VMCS_GUEST_SYSENTER_EIP:
     3948        case VMX_VMCS_GUEST_SYSENTER_ESP:
     3949        case VMX_VMCS32_GUEST_GDTR_LIMIT:
     3950        case VMX_VMCS_GUEST_GDTR_BASE:
     3951        case VMX_VMCS32_GUEST_IDTR_LIMIT:
     3952        case VMX_VMCS_GUEST_IDTR_BASE:
     3953        case VMX_VMCS16_GUEST_FIELD_CS:
     3954        case VMX_VMCS32_GUEST_CS_LIMIT:
     3955        case VMX_VMCS_GUEST_CS_BASE:
     3956        case VMX_VMCS32_GUEST_CS_ACCESS_RIGHTS:
     3957        case VMX_VMCS16_GUEST_FIELD_DS:
     3958        case VMX_VMCS32_GUEST_DS_LIMIT:
     3959        case VMX_VMCS_GUEST_DS_BASE:
     3960        case VMX_VMCS32_GUEST_DS_ACCESS_RIGHTS:
     3961        case VMX_VMCS16_GUEST_FIELD_ES:
     3962        case VMX_VMCS32_GUEST_ES_LIMIT:
     3963        case VMX_VMCS_GUEST_ES_BASE:
     3964        case VMX_VMCS32_GUEST_ES_ACCESS_RIGHTS:
     3965        case VMX_VMCS16_GUEST_FIELD_FS:
     3966        case VMX_VMCS32_GUEST_FS_LIMIT:
     3967        case VMX_VMCS_GUEST_FS_BASE:
     3968        case VMX_VMCS32_GUEST_FS_ACCESS_RIGHTS:
     3969        case VMX_VMCS16_GUEST_FIELD_GS:
     3970        case VMX_VMCS32_GUEST_GS_LIMIT:
     3971        case VMX_VMCS_GUEST_GS_BASE:
     3972        case VMX_VMCS32_GUEST_GS_ACCESS_RIGHTS:
     3973        case VMX_VMCS16_GUEST_FIELD_SS:
     3974        case VMX_VMCS32_GUEST_SS_LIMIT:
     3975        case VMX_VMCS_GUEST_SS_BASE:
     3976        case VMX_VMCS32_GUEST_SS_ACCESS_RIGHTS:
     3977        case VMX_VMCS16_GUEST_FIELD_LDTR:
     3978        case VMX_VMCS32_GUEST_LDTR_LIMIT:
     3979        case VMX_VMCS_GUEST_LDTR_BASE:
     3980        case VMX_VMCS32_GUEST_LDTR_ACCESS_RIGHTS:
     3981        case VMX_VMCS16_GUEST_FIELD_TR:
     3982        case VMX_VMCS32_GUEST_TR_LIMIT:
     3983        case VMX_VMCS_GUEST_TR_BASE:
     3984        case VMX_VMCS32_GUEST_TR_ACCESS_RIGHTS:
     3985        case VMX_VMCS32_RO_EXIT_REASON:
     3986        case VMX_VMCS32_RO_VM_INSTR_ERROR:
     3987        case VMX_VMCS32_RO_EXIT_INSTR_LENGTH:
     3988        case VMX_VMCS32_RO_EXIT_INTERRUPTION_ERROR_CODE:
     3989        case VMX_VMCS32_RO_EXIT_INTERRUPTION_INFO:
     3990        case VMX_VMCS32_RO_EXIT_INSTR_INFO:
     3991        case VMX_VMCS_RO_EXIT_QUALIFICATION:
     3992        case VMX_VMCS32_RO_IDT_INFO:
     3993        case VMX_VMCS32_RO_IDT_ERROR_CODE:
     3994        case VMX_VMCS_GUEST_CR3:
     3995        case VMX_VMCS64_EXIT_GUEST_PHYS_ADDR_FULL:
     3996            return true;
     3997    }
     3998    return false;
     3999}
     4000
     4001static bool hmR0VmxIsValidWriteField(uint32_t idxField)
     4002{
     4003    switch (idxField)
     4004    {
     4005        case VMX_VMCS_GUEST_LDTR_BASE:
     4006        case VMX_VMCS_GUEST_TR_BASE:
     4007        case VMX_VMCS_GUEST_GDTR_BASE:
     4008        case VMX_VMCS_GUEST_IDTR_BASE:
     4009        case VMX_VMCS_GUEST_SYSENTER_EIP:
     4010        case VMX_VMCS_GUEST_SYSENTER_ESP:
     4011        case VMX_VMCS_GUEST_CR0:
     4012        case VMX_VMCS_GUEST_CR4:
     4013        case VMX_VMCS_GUEST_CR3:
     4014        case VMX_VMCS_GUEST_DR7:
     4015        case VMX_VMCS_GUEST_RIP:
     4016        case VMX_VMCS_GUEST_RSP:
     4017        case VMX_VMCS_GUEST_CS_BASE:
     4018        case VMX_VMCS_GUEST_DS_BASE:
     4019        case VMX_VMCS_GUEST_ES_BASE:
     4020        case VMX_VMCS_GUEST_FS_BASE:
     4021        case VMX_VMCS_GUEST_GS_BASE:
     4022        case VMX_VMCS_GUEST_SS_BASE:
     4023            return true;
     4024    }
     4025    return false;
     4026}
     4027#endif /* VBOX_STRICT */
     4028
    39194029/**
    39204030 * Executes the specified handler in 64-bit mode.
     
    42024312        case VMX_VMCS64_CTRL_IO_BITMAP_B_FULL:
    42034313        case VMX_VMCS64_CTRL_MSR_BITMAP_FULL:
    4204         case VMX_VMCS64_CTRL_VMEXIT_MSR_STORE_FULL:
    4205         case VMX_VMCS64_CTRL_VMEXIT_MSR_LOAD_FULL:
    4206         case VMX_VMCS64_CTRL_VMENTRY_MSR_LOAD_FULL:
     4314        case VMX_VMCS64_CTRL_EXIT_MSR_STORE_FULL:
     4315        case VMX_VMCS64_CTRL_EXIT_MSR_LOAD_FULL:
     4316        case VMX_VMCS64_CTRL_ENTRY_MSR_LOAD_FULL:
    42074317        case VMX_VMCS64_CTRL_EXEC_VMCS_PTR_FULL:
    42084318        case VMX_VMCS64_CTRL_TSC_OFFSET_FULL:
     
    42564366        case VMX_VMCS_GUEST_RIP:
    42574367        case VMX_VMCS_GUEST_RFLAGS:
    4258         case VMX_VMCS_GUEST_DEBUG_EXCEPTIONS:
     4368        case VMX_VMCS_GUEST_PENDING_DEBUG_EXCEPTIONS:
    42594369        case VMX_VMCS_GUEST_SYSENTER_ESP:
    42604370        case VMX_VMCS_GUEST_SYSENTER_EIP:
     
    42684378            {
    42694379                /* Assert that only the 32->64 switcher case should ever come here. */
    4270                 Assert(pVM->hm.s.fAllow64BitGuests);
     4380                Assert(pVCpu->CTX_SUFF(pVM)->hm.s.fAllow64BitGuests);
    42714381                rc = VMXWriteCachedVmcsEx(pVCpu, idxField, u64Val);
    42724382            }
     
    43214431/**
    43224432 * Loads the VMCS write-cache into the CPU (by executing VMWRITEs).
    4323  *
     4433 * 
     4434 * @param   pVCpu           Pointer to the VMCPU.
    43244435 * @param   pCache          Pointer to the VMCS cache.
    4325  */
    4326 VMMR0DECL(void) VMXWriteCachedVmcsLoad(PVMCSCACHE pCache)
     4436 * 
     4437 * @remarks No-long-jump zone!!!
     4438 */
     4439VMMR0DECL(void) VMXWriteCachedVmcsLoad(PVMCPU pVCpu, PVMCSCACHE pCache)
    43274440{
    43284441    AssertPtr(pCache);
     
    43304443    {
    43314444        int rc = VMXWriteVmcs64(pCache->Write.aField[i], pCache->Write.aFieldVal[i]);
    4332         AssertRC(rc,  rc);
     4445        AssertRC(rc);
    43334446    }
    43344447    pCache->Write.cValidEntries = 0;
     
    43394452 * Stores the VMCS read-cache from the CPU (by executing VMREADs).
    43404453 *
     4454 * @param   pVCpu           Pointer to the VMCPU.
    43414455 * @param   pCache          Pointer to the VMCS cache.
     4456 * 
    43424457 * @remarks No-long-jump zone!!!
    43434458 */
    4344 VMMR0DECL(void) VMXReadCachedVmcsStore(PVMCSCACHE pCache)
     4459VMMR0DECL(void) VMXReadCachedVmcsStore(PVMCPU pVCpu, PVMCSCACHE pCache)
    43454460{
    43464461    AssertPtr(pCache);
     
    45174632    if (VMX_IDT_VECTORING_INFO_VALID(pVmxTransient->uIdtVectoringInfo))
    45184633    {
    4519         rc = hmR0VmxReadExitIntrInfoVmcs(pVmxTransient);
     4634        rc = hmR0VmxReadExitIntrInfoVmcs(pVCpu, pVmxTransient);
    45204635        AssertRCReturn(rc, rc);
    45214636
     
    50465161 * context.
    50475162 *
    5048  * @returns VBox status code.
     5163 * @returns VBox status code.
     5164 * @param   pVCpu       Pointer to the VMCPU.
    50495165 * @param   idxSel      Index of the selector in the VMCS.
    50505166 * @param   idxLimit    Index of the segment limit in the VMCS.
     
    50535169 * @param   pSelReg     Pointer to the segment selector.
    50545170 *
    5055  * @remarks No-long-jump zone!!!
    5056  */
    5057 DECLINLINE(int) hmR0VmxReadSegmentReg(uint32_t idxSel, uint32_t idxLimit, uint32_t idxBase, uint32_t idxAccess,
     5171 * @remarks No-long-jump zone!!!
     5172 * @remarks Never call this function directly. Use the VMXLOCAL_READ_SEG() macro
     5173 *          as that takes care of whether to read from the VMCS cache or not.
     5174 */
     5175DECLINLINE(int) hmR0VmxReadSegmentReg(PVMCPU pVCpu, uint32_t idxSel, uint32_t idxLimit, uint32_t idxBase, uint32_t idxAccess,
    50585176                                    PCPUMSELREG pSelReg)
    50595177{
     
    50685186
    50695187    RTGCUINTREG uGCVal = 0;
    5070     rc |= VMXReadVmcsGstN(idxBase, &uGCVal);
     5188    rc |= VMXReadVmcsGstNByIdxVal(idxBase, &uGCVal);
    50715189    pSelReg->u64Base = uGCVal;
    50725190
     
    51035221static int hmR0VmxSaveGuestSegmentRegs(PVM pVM, PVMCPU pVCpu, PCPUMCTX pMixedCtx)
    51045222{
     5223#ifdef VMX_USE_CACHED_VMCS_ACCESSES
     5224#define VMXLOCAL_READ_SEG(Sel, CtxSel) \
     5225    hmR0VmxReadSegmentReg(pVCpu, VMX_VMCS16_GUEST_FIELD_##Sel, VMX_VMCS32_GUEST_##Sel##_LIMIT,                  \
     5226                          VMX_VMCS_GUEST_##Sel##_BASE_CACHE_IDX, VMX_VMCS32_GUEST_##Sel##_ACCESS_RIGHTS, &pMixedCtx->##CtxSel)
     5227#else
     5228#define VMXLOCAL_READ_SEG(Sel, Val) \
     5229    hmR0VmxReadSegmentReg(pVCpu, VMX_VMCS16_GUEST_FIELD_##Sel, VMX_VMCS32_GUEST_##Sel##_LIMIT,                  \
     5230                          VMX_VMCS_GUEST_##Sel##_BASE, VMX_VMCS32_GUEST_##Sel##_ACCESS_RIGHTS, &pMixedCtx->##CtxSel)
     5231#endif
     5232
    51055233    int rc = VINF_SUCCESS;
    51065234
     
    51095237    {
    51105238        rc = hmR0VmxSaveGuestCR0(pVM, pVCpu, pMixedCtx);
    5111 
    5112         rc |= hmR0VmxReadSegmentReg(VMX_VMCS16_GUEST_FIELD_CS, VMX_VMCS32_GUEST_CS_LIMIT, VMX_VMCS_GUEST_CS_BASE,
    5113                                     VMX_VMCS32_GUEST_CS_ACCESS_RIGHTS, &pMixedCtx->cs);
    5114         rc |= hmR0VmxReadSegmentReg(VMX_VMCS16_GUEST_FIELD_SS, VMX_VMCS32_GUEST_SS_LIMIT, VMX_VMCS_GUEST_SS_BASE,
    5115                                     VMX_VMCS32_GUEST_SS_ACCESS_RIGHTS, &pMixedCtx->ss);
    5116         rc |= hmR0VmxReadSegmentReg(VMX_VMCS16_GUEST_FIELD_DS, VMX_VMCS32_GUEST_DS_LIMIT, VMX_VMCS_GUEST_DS_BASE,
    5117                                     VMX_VMCS32_GUEST_DS_ACCESS_RIGHTS, &pMixedCtx->ds);
    5118         rc |= hmR0VmxReadSegmentReg(VMX_VMCS16_GUEST_FIELD_ES, VMX_VMCS32_GUEST_ES_LIMIT, VMX_VMCS_GUEST_ES_BASE,
    5119                                     VMX_VMCS32_GUEST_ES_ACCESS_RIGHTS, &pMixedCtx->es);
    5120         rc |= hmR0VmxReadSegmentReg(VMX_VMCS16_GUEST_FIELD_FS, VMX_VMCS32_GUEST_FS_LIMIT, VMX_VMCS_GUEST_FS_BASE,
    5121                                     VMX_VMCS32_GUEST_FS_ACCESS_RIGHTS, &pMixedCtx->fs);
    5122         rc |= hmR0VmxReadSegmentReg(VMX_VMCS16_GUEST_FIELD_GS, VMX_VMCS32_GUEST_GS_LIMIT, VMX_VMCS_GUEST_GS_BASE,
    5123                                     VMX_VMCS32_GUEST_GS_ACCESS_RIGHTS, &pMixedCtx->gs);
     5239        rc |= VMXLOCAL_READ_SEG(CS, cs);
     5240        rc |= VMXLOCAL_READ_SEG(SS, ss);
     5241        rc |= VMXLOCAL_READ_SEG(DS, ds);
     5242        rc |= VMXLOCAL_READ_SEG(ES, es);
     5243        rc |= VMXLOCAL_READ_SEG(FS, fs);
     5244        rc |= VMXLOCAL_READ_SEG(GS, gs);
    51245245        AssertRCReturn(rc, rc);
    51255246
     
    51345255            pMixedCtx->gs.Attr.u = pVCpu->hm.s.vmx.RealMode.uAttrGS.u;
    51355256        }
    5136 
    51375257        pVCpu->hm.s.vmx.fUpdatedGuestState |= VMX_UPDATED_GUEST_SEGMENT_REGS;
    51385258    }
     
    51415261    if (!(pVCpu->hm.s.vmx.fUpdatedGuestState & VMX_UPDATED_GUEST_LDTR))
    51425262    {
    5143         rc = hmR0VmxReadSegmentReg(VMX_VMCS16_GUEST_FIELD_LDTR, VMX_VMCS32_GUEST_LDTR_LIMIT, VMX_VMCS_GUEST_LDTR_BASE,
    5144                                    VMX_VMCS32_GUEST_LDTR_ACCESS_RIGHTS, &pMixedCtx->ldtr);
     5263        rc = VMXLOCAL_READ_SEG(LDTR, ldtr);
    51455264        AssertRCReturn(rc, rc);
    51465265        pVCpu->hm.s.vmx.fUpdatedGuestState |= VMX_UPDATED_GUEST_LDTR;
     
    51745293        rc = hmR0VmxSaveGuestCR0(pVM, pVCpu, pMixedCtx);
    51755294
    5176         /* For real-mode emulation using virtual-8086 mode we have the fake TSS (pRealModeTSS) in TR, don't sync the fake one. */
     5295        /* For real-mode emulation using virtual-8086 mode we have the fake TSS (pRealModeTSS) in TR, don't save the fake one. */
    51775296        if (!pVCpu->hm.s.vmx.RealMode.fRealOnV86Active)
    5178         {
    5179             rc |= hmR0VmxReadSegmentReg(VMX_VMCS16_GUEST_FIELD_TR, VMX_VMCS32_GUEST_TR_LIMIT, VMX_VMCS_GUEST_TR_BASE,
    5180                                         VMX_VMCS32_GUEST_TR_ACCESS_RIGHTS, &pMixedCtx->tr);
    5181         }
     5297            rc |= VMXLOCAL_READ_SEG(TR, tr);
    51825298        AssertRCReturn(rc, rc);
    51835299        pVCpu->hm.s.vmx.fUpdatedGuestState |= VMX_UPDATED_GUEST_TR;
     
    54065522        uint32_t uVectorType     = VMX_IDT_VECTORING_INFO_TYPE(pVCpu->hm.s.Event.u64IntrInfo);
    54075523        uint32_t uVector         = VMX_IDT_VECTORING_INFO_VECTOR(pVCpu->hm.s.Event.u64IntrInfo);
    5408         bool     fErrorCodeValid = VMX_IDT_VECTORING_INFO_ERROR_CODE_IS_VALID(pVCpu->hm.s.Event.u64IntrInfo);
     5524        bool     fErrorCodeValid = !!VMX_IDT_VECTORING_INFO_ERROR_CODE_IS_VALID(pVCpu->hm.s.Event.u64IntrInfo);
    54095525        uint32_t uErrorCode      = pVCpu->hm.s.Event.u32ErrCode;
    54105526
     
    61716287    AssertLogRelMsgRCReturn(rc, ("hmR0VmxLoadGuestEntryCtls! rc=%Rrc (pVM=%p pVCpu=%p)\n", rc, pVM, pVCpu), rc);
    61726288
    6173     rc = hmR0VmxLoadGuestExitCtls(pVM, pVCpu);
     6289    rc = hmR0VmxLoadGuestExitCtls(pVM, pVCpu, pCtx);
    61746290    AssertLogRelMsgRCReturn(rc, ("hmR0VmxSetupExitCtls failed! rc=%Rrc (pVM=%p pVCpu=%p)\n", rc, pVM, pVCpu), rc);
    61756291
     
    64316547    AssertRC(rc);
    64326548    pVmxTransient->uExitReason    = (uint16_t)VMX_EXIT_REASON_BASIC(uExitReason);
    6433     pVmxTransient->fVMEntryFailed = VMX_ENTRY_INTERRUPTION_INFO_VALID(pVmxTransient->uEntryIntrInfo);
     6549    pVmxTransient->fVMEntryFailed = !!VMX_ENTRY_INTERRUPTION_INFO_VALID(pVmxTransient->uEntryIntrInfo);
    64346550
    64356551    VMMRZCallRing3SetNotification(pVCpu, hmR0VmxCallRing3Callback, pMixedCtx);
     
    66356751                AssertPtr(pVmxTransient);                             \
    66366752                Assert(pVmxTransient->fVMEntryFailed == false);       \
    6637                 Assert(ASMIntAreEnabled() == true);                   \
     6753                Assert(ASMIntAreEnabled());                           \
    66386754                Assert(!RTThreadPreemptIsEnabled(NIL_RTTHREAD));      \
    66396755                VMX_ASSERT_PREEMPT_CPUID_VAR();                       \
     
    66736789{
    66746790    VMX_VALIDATE_EXIT_HANDLER_PARAMS();
    6675     int rc = hmR0VmxReadExitIntrInfoVmcs(pVmxTransient);
     6791    int rc = hmR0VmxReadExitIntrInfoVmcs(pVCpu, pVmxTransient);
    66766792    AssertRCReturn(rc, rc);
    66776793
     
    67296845                        Assert(pVM->hm.s.vmx.pRealModeTSS);
    67306846                        Assert(PDMVmmDevHeapIsEnabled(pVM));
    6731                         rc  = hmR0VmxReadExitInstrLenVmcs(pVmxTransient);
    6732                         rc |= hmR0VmxReadExitIntrErrorCodeVmcs(pVmxTransient);
     6847                        rc  = hmR0VmxReadExitInstrLenVmcs(pVCpu, pVmxTransient);
     6848                        rc |= hmR0VmxReadExitIntrErrorCodeVmcs(pVCpu, pVmxTransient);
    67336849                        AssertRCReturn(rc, rc);
    67346850                        rc = hmR0VmxInjectEventVmcs(pVM, pVCpu, pMixedCtx,
     
    67956911{
    67966912    VMX_VALIDATE_EXIT_HANDLER_PARAMS();
    6797     int rc = hmR0VmxReadExitInstrLenVmcs(pVmxTransient);
     6913    int rc = hmR0VmxReadExitInstrLenVmcs(pVCpu, pVmxTransient);
    67986914    rc    |= hmR0VmxSaveGuestRip(pVM, pVCpu, pMixedCtx);
    67996915    AssertRCReturn(rc, rc);
     
    68136929{
    68146930    VMX_VALIDATE_EXIT_HANDLER_PARAMS();
    6815     int rc = hmR0VmxReadExitInstrLenVmcs(pVmxTransient);
     6931    int rc = hmR0VmxReadExitInstrLenVmcs(pVCpu, pVmxTransient);
    68166932    rc    |= hmR0VmxSaveGuestRip(pVM, pVCpu, pMixedCtx);
    68176933    AssertRCReturn(rc, rc);
     
    68356951    {
    68366952        rc  = hmR0VmxSaveGuestRip(pVM, pVCpu, pMixedCtx);
    6837         rc |= hmR0VmxReadExitInstrLenVmcs(pVmxTransient);
     6953        rc |= hmR0VmxReadExitInstrLenVmcs(pVCpu, pVmxTransient);
    68386954        AssertRCReturn(rc, rc);
    68396955        Assert(pVmxTransient->cbInstr == 2);
     
    68826998    if (RT_LIKELY(rc == VINF_SUCCESS))
    68836999    {
    6884         rc  = hmR0VmxReadExitInstrLenVmcs(pVmxTransient);
     7000        rc  = hmR0VmxReadExitInstrLenVmcs(pVCpu, pVmxTransient);
    68857001        rc |= hmR0VmxSaveGuestRip(pVM, pVCpu, pMixedCtx);
    68867002        AssertRCReturn(rc, rc);
     
    69177033    if (RT_LIKELY(rc == VINF_SUCCESS))
    69187034    {
    6919         rc  = hmR0VmxReadExitInstrLenVmcs(pVmxTransient);
     7035        rc  = hmR0VmxReadExitInstrLenVmcs(pVCpu, pVmxTransient);
    69207036        rc |= hmR0VmxSaveGuestRip(pVM, pVCpu, pMixedCtx);
    69217037        AssertRCReturn(rc, rc);
     
    69527068    if (RT_LIKELY(rc == VINF_SUCCESS))
    69537069    {
    6954         rc  = hmR0VmxReadExitInstrLenVmcs(pVmxTransient);
     7070        rc  = hmR0VmxReadExitInstrLenVmcs(pVCpu, pVmxTransient);
    69557071        rc |= hmR0VmxSaveGuestRip(pVM, pVCpu, pMixedCtx);
    69567072        AssertRCReturn(rc, rc);
     
    69767092{
    69777093    VMX_VALIDATE_EXIT_HANDLER_PARAMS();
    6978     int rc = hmR0VmxReadExitQualificationVmcs(pVmxTransient);
     7094    int rc = hmR0VmxReadExitQualificationVmcs(pVCpu, pVmxTransient);
    69797095    rc    |= hmR0VmxSaveGuestControlRegs(pVM, pVCpu, pMixedCtx);
    69807096    AssertRCReturn(rc, rc);
     
    69847100    if (RT_LIKELY(rc == VINF_SUCCESS))
    69857101    {
    6986         rc  = hmR0VmxReadExitInstrLenVmcs(pVmxTransient);
     7102        rc  = hmR0VmxReadExitInstrLenVmcs(pVCpu, pVmxTransient);
    69877103        rc |= hmR0VmxSaveGuestRip(pVM, pVCpu, pMixedCtx);
    69887104        AssertRCReturn(rc, rc);
     
    70167132    if (RT_LIKELY(rc == VINF_SUCCESS))
    70177133    {
    7018         rc  = hmR0VmxReadExitInstrLenVmcs(pVmxTransient);
     7134        rc  = hmR0VmxReadExitInstrLenVmcs(pVCpu, pVmxTransient);
    70197135        rc |= hmR0VmxSaveGuestRip(pVM, pVCpu, pMixedCtx);
    70207136        AssertRCReturn(rc, rc);
     
    70497165                  || rc == VINF_EM_HALT))
    70507166    {
    7051         int rc3  = hmR0VmxReadExitInstrLenVmcs(pVmxTransient);
     7167        int rc3  = hmR0VmxReadExitInstrLenVmcs(pVCpu, pVmxTransient);
    70527168        rc3     |= hmR0VmxSaveGuestRip(pVM, pVCpu, pMixedCtx);
    70537169        AssertRCReturn(rc3, rc3);
     
    72457361    int rc  = hmR0VmxReadEntryIntrInfoVmcs(pVmxTransient);
    72467362    rc     |= hmR0VmxReadEntryXcptErrorCodeVmcs(pVmxTransient);
    7247     rc     |= hmR0VmxReadEntryInstrLenVmcs(pVmxTransient);
     7363    rc     |= hmR0VmxReadEntryInstrLenVmcs(pVCpu, pVmxTransient);
    72487364    rc     |= VMXReadVmcs32(VMX_VMCS32_GUEST_INTERRUPTIBILITY_STATE, &uIntrState);
    72497365    rc     |= hmR0VmxSaveGuestState(pVM, pVCpu, pMixedCtx);
     
    73607476    if (RT_LIKELY(rc == VINF_SUCCESS))
    73617477    {
    7362         rc  = hmR0VmxReadExitInstrLenVmcs(pVmxTransient);
     7478        rc  = hmR0VmxReadExitInstrLenVmcs(pVCpu, pVmxTransient);
    73637479        rc |= hmR0VmxSaveGuestRip(pVM, pVCpu, pMixedCtx);
    73647480        AssertRCReturn(rc, rc);
     
    73787494{
    73797495    VMX_VALIDATE_EXIT_HANDLER_PARAMS();
    7380     int rc = hmR0VmxReadExitInstrLenVmcs(pVmxTransient);
     7496    int rc = hmR0VmxReadExitInstrLenVmcs(pVCpu, pVmxTransient);
    73817497    AssertRCReturn(rc, rc);
    73827498    Assert(pVmxTransient->cbInstr == 2);
     
    75147630{
    75157631    VMX_VALIDATE_EXIT_HANDLER_PARAMS();
    7516     int rc = hmR0VmxReadExitQualificationVmcs(pVmxTransient);
     7632    int rc = hmR0VmxReadExitQualificationVmcs(pVCpu, pVmxTransient);
    75177633    AssertRCReturn(rc, rc);
    75187634
     
    76287744    {
    76297745        int rc2  = hmR0VmxSaveGuestRip(pVM, pVCpu, pMixedCtx);
    7630         rc2     |= hmR0VmxReadExitInstrLenVmcs(pVmxTransient);
     7746        rc2     |= hmR0VmxReadExitInstrLenVmcs(pVCpu, pVmxTransient);
    76317747        AssertRCReturn(rc2, rc2);
    76327748        pMixedCtx->rip += pVmxTransient->cbInstr;
     
    76467762    VMX_VALIDATE_EXIT_HANDLER_PARAMS();
    76477763
    7648     int rc = hmR0VmxReadExitQualificationVmcs(pVmxTransient);
    7649     rc    |= hmR0VmxReadExitInstrLenVmcs(pVmxTransient);
     7764    int rc = hmR0VmxReadExitQualificationVmcs(pVCpu, pVmxTransient);
     7765    rc    |= hmR0VmxReadExitInstrLenVmcs(pVCpu, pVmxTransient);
    76507766    rc    |= hmR0VmxSaveGuestRip(pVM, pVCpu, pMixedCtx);
    76517767    rc    |= hmR0VmxSaveGuestRflags(pVM, pVCpu, pMixedCtx);         /* Eflag checks in EMInterpretDisasCurrent(). */
     
    78167932
    78177933    /* Check if this task-switch occurred while delivery an event through the guest IDT. */
    7818     int rc = hmR0VmxReadExitQualificationVmcs(pVmxTransient);
     7934    int rc = hmR0VmxReadExitQualificationVmcs(pVCpu, pVmxTransient);
    78197935    AssertRCReturn(rc, rc);
    78207936    if (VMX_EXIT_QUALIFICATION_TASK_SWITCH_TYPE(pVmxTransient->uExitQualification) == VMX_EXIT_QUALIFICATION_TASK_SWITCH_TYPE_IDT)
     
    78697985{
    78707986    VMX_VALIDATE_EXIT_HANDLER_PARAMS();
    7871     int rc = hmR0VmxReadExitQualificationVmcs(pVmxTransient);
     7987    int rc = hmR0VmxReadExitQualificationVmcs(pVCpu, pVmxTransient);
    78727988
    78737989    /* If this VM-exit occurred while delivering an event through the guest IDT, handle it accordingly. */
     
    79638079
    79648080#ifdef VBOX_WITH_STATISTICS
    7965         rc = hmR0VmxReadExitQualificationVmcs(pVmxTransient);
     8081        rc = hmR0VmxReadExitQualificationVmcs(pVCpu, pVmxTransient);
    79668082        AssertRCReturn(rc, rc);
    79678083        if (VMX_EXIT_QUALIFICATION_DRX_DIRECTION(pVmxTransient->uExitQualification) == VMX_EXIT_QUALIFICATION_DRX_DIRECTION_WRITE)
     
    79808096     * hmR0VmxSaveGuestAutoLoadStoreMsrs(). Update only the segment registers from the CPU.
    79818097     */
    7982     rc  = hmR0VmxReadExitQualificationVmcs(pVmxTransient);
     8098    rc  = hmR0VmxReadExitQualificationVmcs(pVCpu, pVmxTransient);
    79838099    rc |= hmR0VmxSaveGuestSegmentRegs(pVM, pVCpu, pMixedCtx);
    79848100    AssertRCReturn(rc, rc);
     
    80058121    {
    80068122        int rc2  = hmR0VmxSaveGuestRip(pVM, pVCpu, pMixedCtx);
    8007         rc2     |= hmR0VmxReadExitInstrLenVmcs(pVmxTransient);
     8123        rc2     |= hmR0VmxReadExitInstrLenVmcs(pVCpu, pVmxTransient);
    80088124        AssertRCReturn(rc2, rc2);
    80098125        pMixedCtx->rip += pVmxTransient->cbInstr;
     
    80838199    RTGCPHYS GCPhys = 0;
    80848200    rc  = VMXReadVmcs64(VMX_VMCS64_EXIT_GUEST_PHYS_ADDR_FULL, &GCPhys);
    8085     rc |= hmR0VmxReadExitQualificationVmcs(pVmxTransient);
     8201    rc |= hmR0VmxReadExitQualificationVmcs(pVCpu, pVmxTransient);
    80868202#if 0
    80878203    rc |= hmR0VmxSaveGuestState(pVM, pVCpu, pMixedCtx);     /** @todo Can we do better?  */
     
    81778293    if (rc == VINF_EM_RAW_GUEST_TRAP)
    81788294    {
    8179         rc  = hmR0VmxReadExitIntrInfoVmcs(pVmxTransient);
    8180         rc |= hmR0VmxReadExitInstrLenVmcs(pVmxTransient);
    8181         rc |= hmR0VmxReadExitIntrErrorCodeVmcs(pVmxTransient);
     8295        rc  = hmR0VmxReadExitIntrInfoVmcs(pVCpu, pVmxTransient);
     8296        rc |= hmR0VmxReadExitInstrLenVmcs(pVCpu, pVmxTransient);
     8297        rc |= hmR0VmxReadExitIntrErrorCodeVmcs(pVCpu, pVmxTransient);
    81828298        AssertRCReturn(rc, rc);
    81838299
     
    82008316    VMX_VALIDATE_EXIT_XCPT_HANDLER_PARAMS();
    82018317
    8202     int rc = hmR0VmxReadExitQualificationVmcs(pVmxTransient);
     8318    int rc = hmR0VmxReadExitQualificationVmcs(pVCpu, pVmxTransient);
    82038319    rc    |= hmR0VmxSaveGuestSegmentRegs(pVM, pVCpu, pMixedCtx);
    82048320    rc    |= hmR0VmxSaveGuestRflags(pVM, pVCpu, pMixedCtx);
     
    82308346        rc = VMXWriteVmcsGstN(VMX_VMCS_GUEST_DR7, pMixedCtx->dr[7]);
    82318347
    8232         rc |= hmR0VmxReadExitIntrInfoVmcs(pVmxTransient);
    8233         rc |= hmR0VmxReadExitInstrLenVmcs(pVmxTransient);
    8234         rc |= hmR0VmxReadExitIntrErrorCodeVmcs(pVmxTransient);
     8348        rc |= hmR0VmxReadExitIntrInfoVmcs(pVCpu, pVmxTransient);
     8349        rc |= hmR0VmxReadExitInstrLenVmcs(pVCpu, pVmxTransient);
     8350        rc |= hmR0VmxReadExitIntrErrorCodeVmcs(pVCpu, pVmxTransient);
    82358351        rc |= hmR0VmxInjectEventVmcs(pVM, pVCpu, pMixedCtx,
    82368352                                 VMX_VMCS_CTRL_ENTRY_IRQ_INFO_FROM_EXIT_INT_INFO(pVmxTransient->uExitIntrInfo),
     
    82728388    /* Forward #NM to the guest. */
    82738389    Assert(rc == VINF_EM_RAW_GUEST_TRAP);
    8274     rc = hmR0VmxReadExitIntrInfoVmcs(pVmxTransient);
     8390    rc = hmR0VmxReadExitIntrInfoVmcs(pVCpu, pVmxTransient);
    82758391    AssertRCReturn(rc, rc);
    82768392    rc = hmR0VmxInjectEventVmcs(pVM, pVCpu, pMixedCtx,
     
    82988414#ifdef VBOX_ALWAYS_TRAP_ALL_EXCEPTIONS
    82998415        /* If the guest is not in real-mode or we have unrestricted execution support, reflect #GP to the guest. */
    8300         rc  = hmR0VmxReadExitIntrInfoVmcs(pVmxTransient);
    8301         rc |= hmR0VmxReadExitIntrErrorCodeVmcs(pVmxTransient);
    8302         rc |= hmR0VmxReadExitInstrLenVmcs(pVmxTransient);
     8416        rc  = hmR0VmxReadExitIntrInfoVmcs(pVCpu, pVmxTransient);
     8417        rc |= hmR0VmxReadExitIntrErrorCodeVmcs(pVCpu, pVmxTransient);
     8418        rc |= hmR0VmxReadExitInstrLenVmcs(pVCpu, pVmxTransient);
    83038419        rc |= hmR0VmxInjectEventVmcs(pVM, pVCpu, pMixedCtx,
    83048420                                        VMX_VMCS_CTRL_ENTRY_IRQ_INFO_FROM_EXIT_INT_INFO(pVmxTransient->uExitIntrInfo),
     
    85478663    VMX_VALIDATE_EXIT_XCPT_HANDLER_PARAMS();
    85488664
    8549     int rc = hmR0VmxReadExitQualificationVmcs(pVmxTransient);
    8550     rc    |= hmR0VmxReadExitIntrInfoVmcs(pVmxTransient);
    8551     rc    |= hmR0VmxReadExitInstrLenVmcs(pVmxTransient);
    8552     rc    |= hmR0VmxReadExitIntrErrorCodeVmcs(pVmxTransient);
     8665    int rc = hmR0VmxReadExitQualificationVmcs(pVCpu, pVmxTransient);
     8666    rc    |= hmR0VmxReadExitIntrInfoVmcs(pVCpu, pVmxTransient);
     8667    rc    |= hmR0VmxReadExitInstrLenVmcs(pVCpu, pVmxTransient);
     8668    rc    |= hmR0VmxReadExitIntrErrorCodeVmcs(pVCpu, pVmxTransient);
    85538669    AssertRCReturn(rc, rc);
    85548670
  • trunk/src/VBox/VMM/VMMR0/HWVMXR0.cpp

    r45387 r45453  
    55005500
    55015501
    5502 # ifdef VBOX_STRICT
     5502#ifdef VBOX_STRICT
    55035503static bool hmR0VmxIsValidReadField(uint32_t idxField)
    55045504{
     
    55965596    return false;
    55975597}
    5598 # endif /* VBOX_STRICT */
     5598#endif /* VBOX_STRICT */
    55995599
    56005600
  • trunk/src/VBox/VMM/VMMR0/HWVMXR0.h

    r45092 r45453  
    7373# define VMXReadVmcsHstN                                 VMXReadVmcs32
    7474# define VMXReadVmcsGstN(idxField, pVal)                 VMXReadCachedVmcsEx(pVCpu, idxField##_CACHE_IDX, pVal)
     75# define VMXReadVmcsGstNByIdxVal(idxField, pVal)         VMXReadCachedVmcsEx(pVCpu, idxField, pVal)
    7576# else
    7677# define VMXReadVmcsHstN                                 VMXReadVmcs64
    7778# define VMXReadVmcsGstN                                 VMXReadVmcs64
     79# define VMXReadVmcsGstNByIdxVal                         VMXReadVmcs64
    7880# endif
    7981#endif
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