- Timestamp:
- Apr 11, 2013 8:46:47 PM (12 years ago)
- File:
-
- 1 edited
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trunk/src/VBox/VMM/VMMR0/HMVMXR0.cpp
r45496 r45498 201 201 *******************************************************************************/ 202 202 static void hmR0VmxFlushVpid(PVM pVM, PVMCPU pVCpu, VMX_FLUSH_VPID enmFlush, RTGCPTR GCPtr); 203 static int hmR0VmxInjectEventVmcs(PVM pVM, PVMCPU pVCpu, PCPUMCTX pMixedCtx, uint64_t u64IntrInfo,203 static int hmR0VmxInjectEventVmcs(PVMCPU pVCpu, PCPUMCTX pMixedCtx, uint64_t u64IntrInfo, 204 204 uint32_t cbInstr, uint32_t u32ErrCode); 205 205 #if HC_ARCH_BITS == 32 && !defined(VBOX_WITH_HYBRID_32BIT_KERNEL) … … 207 207 #endif 208 208 #if 0 209 DECLINLINE(int) hmR0VmxHandleExit(PVM pVM, PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient, 210 unsigned rcReason); 209 DECLINLINE(int) hmR0VmxHandleExit(PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient, unsigned rcReason); 211 210 #endif 212 211 213 static DECLCALLBACK(int) hmR0VmxExitXcptNmi(PVM pVM, PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient);214 static DECLCALLBACK(int) hmR0VmxExitExtInt(PVM pVM, PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient);215 static DECLCALLBACK(int) hmR0VmxExitTripleFault(PVM pVM, PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient);216 static DECLCALLBACK(int) hmR0VmxExitInitSignal(PVM pVM, PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient);217 static DECLCALLBACK(int) hmR0VmxExitSipi(PVM pVM, PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient);218 static DECLCALLBACK(int) hmR0VmxExitIoSmi(PVM pVM, PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient);219 static DECLCALLBACK(int) hmR0VmxExitSmi(PVM pVM, PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient);220 static DECLCALLBACK(int) hmR0VmxExitIntWindow(PVM pVM, PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient);221 static DECLCALLBACK(int) hmR0VmxExitNmiWindow(PVM pVM, PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient);222 static DECLCALLBACK(int) hmR0VmxExitTaskSwitch(PVM pVM, PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient);223 static DECLCALLBACK(int) hmR0VmxExitCpuid(PVM pVM, PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient);224 static DECLCALLBACK(int) hmR0VmxExitGetsec(PVM pVM, PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient);225 static DECLCALLBACK(int) hmR0VmxExitHlt(PVM pVM, PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient);226 static DECLCALLBACK(int) hmR0VmxExitInvd(PVM pVM, PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient);227 static DECLCALLBACK(int) hmR0VmxExitInvlpg(PVM pVM, PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient);228 static DECLCALLBACK(int) hmR0VmxExitRdpmc(PVM pVM, PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient);229 static DECLCALLBACK(int) hmR0VmxExitRdtsc(PVM pVM, PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient);230 static DECLCALLBACK(int) hmR0VmxExitRsm(PVM pVM, PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient);231 static DECLCALLBACK(int) hmR0VmxExitInjectXcptUD(PVM pVM, PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient);232 static DECLCALLBACK(int) hmR0VmxExitMovCRx(PVM pVM, PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient);233 static DECLCALLBACK(int) hmR0VmxExitMovDRx(PVM pVM, PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient);234 static DECLCALLBACK(int) hmR0VmxExitIoInstr(PVM pVM, PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient);235 static DECLCALLBACK(int) hmR0VmxExitRdmsr(PVM pVM, PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient);236 static DECLCALLBACK(int) hmR0VmxExitWrmsr(PVM pVM, PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient);237 static DECLCALLBACK(int) hmR0VmxExitErrInvalidGuestState(PVM pVM, PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient);238 static DECLCALLBACK(int) hmR0VmxExitErrMsrLoad(PVM pVM, PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient);239 static DECLCALLBACK(int) hmR0VmxExitErrUndefined(PVM pVM, PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient);240 static DECLCALLBACK(int) hmR0VmxExitMwait(PVM pVM, PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient);241 static DECLCALLBACK(int) hmR0VmxExitMtf(PVM pVM, PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient);242 static DECLCALLBACK(int) hmR0VmxExitMonitor(PVM pVM, PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient);243 static DECLCALLBACK(int) hmR0VmxExitPause(PVM pVM, PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient);244 static DECLCALLBACK(int) hmR0VmxExitErrMachineCheck(PVM pVM, PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient);245 static DECLCALLBACK(int) hmR0VmxExitTprBelowThreshold(PVM pVM, PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient);246 static DECLCALLBACK(int) hmR0VmxExitApicAccess(PVM pVM, PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient);247 static DECLCALLBACK(int) hmR0VmxExitXdtrAccess(PVM pVM, PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient);248 static DECLCALLBACK(int) hmR0VmxExitXdtrAccess(PVM pVM, PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient);249 static DECLCALLBACK(int) hmR0VmxExitEptViolation(PVM pVM, PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient);250 static DECLCALLBACK(int) hmR0VmxExitEptMisconfig(PVM pVM, PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient);251 static DECLCALLBACK(int) hmR0VmxExitRdtscp(PVM pVM, PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient);252 static DECLCALLBACK(int) hmR0VmxExitPreemptTimer(PVM pVM, PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient);253 static DECLCALLBACK(int) hmR0VmxExitWbinvd(PVM pVM, PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient);254 static DECLCALLBACK(int) hmR0VmxExitXsetbv(PVM pVM, PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient);255 static DECLCALLBACK(int) hmR0VmxExitRdrand(PVM pVM, PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient);256 static DECLCALLBACK(int) hmR0VmxExitInvpcid(PVM pVM, PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient);257 static DECLCALLBACK(int) hmR0VmxExitXcptNM(PVM pVM, PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient);258 static DECLCALLBACK(int) hmR0VmxExitXcptPF(PVM pVM, PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient);259 static DECLCALLBACK(int) hmR0VmxExitXcptMF(PVM pVM, PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient);260 static DECLCALLBACK(int) hmR0VmxExitXcptDB(PVM pVM, PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient);261 static DECLCALLBACK(int) hmR0VmxExitXcptBP(PVM pVM, PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient);262 static DECLCALLBACK(int) hmR0VmxExitXcptGP(PVM pVM, PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient);263 static DECLCALLBACK(int) hmR0VmxExitXcptGeneric(PVM pVM, PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient);212 static DECLCALLBACK(int) hmR0VmxExitXcptNmi(PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient); 213 static DECLCALLBACK(int) hmR0VmxExitExtInt(PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient); 214 static DECLCALLBACK(int) hmR0VmxExitTripleFault(PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient); 215 static DECLCALLBACK(int) hmR0VmxExitInitSignal(PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient); 216 static DECLCALLBACK(int) hmR0VmxExitSipi(PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient); 217 static DECLCALLBACK(int) hmR0VmxExitIoSmi(PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient); 218 static DECLCALLBACK(int) hmR0VmxExitSmi(PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient); 219 static DECLCALLBACK(int) hmR0VmxExitIntWindow(PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient); 220 static DECLCALLBACK(int) hmR0VmxExitNmiWindow(PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient); 221 static DECLCALLBACK(int) hmR0VmxExitTaskSwitch(PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient); 222 static DECLCALLBACK(int) hmR0VmxExitCpuid(PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient); 223 static DECLCALLBACK(int) hmR0VmxExitGetsec(PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient); 224 static DECLCALLBACK(int) hmR0VmxExitHlt(PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient); 225 static DECLCALLBACK(int) hmR0VmxExitInvd(PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient); 226 static DECLCALLBACK(int) hmR0VmxExitInvlpg(PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient); 227 static DECLCALLBACK(int) hmR0VmxExitRdpmc(PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient); 228 static DECLCALLBACK(int) hmR0VmxExitRdtsc(PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient); 229 static DECLCALLBACK(int) hmR0VmxExitRsm(PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient); 230 static DECLCALLBACK(int) hmR0VmxExitInjectXcptUD(PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient); 231 static DECLCALLBACK(int) hmR0VmxExitMovCRx(PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient); 232 static DECLCALLBACK(int) hmR0VmxExitMovDRx(PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient); 233 static DECLCALLBACK(int) hmR0VmxExitIoInstr(PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient); 234 static DECLCALLBACK(int) hmR0VmxExitRdmsr(PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient); 235 static DECLCALLBACK(int) hmR0VmxExitWrmsr(PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient); 236 static DECLCALLBACK(int) hmR0VmxExitErrInvalidGuestState(PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient); 237 static DECLCALLBACK(int) hmR0VmxExitErrMsrLoad(PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient); 238 static DECLCALLBACK(int) hmR0VmxExitErrUndefined(PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient); 239 static DECLCALLBACK(int) hmR0VmxExitMwait(PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient); 240 static DECLCALLBACK(int) hmR0VmxExitMtf(PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient); 241 static DECLCALLBACK(int) hmR0VmxExitMonitor(PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient); 242 static DECLCALLBACK(int) hmR0VmxExitPause(PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient); 243 static DECLCALLBACK(int) hmR0VmxExitErrMachineCheck(PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient); 244 static DECLCALLBACK(int) hmR0VmxExitTprBelowThreshold(PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient); 245 static DECLCALLBACK(int) hmR0VmxExitApicAccess(PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient); 246 static DECLCALLBACK(int) hmR0VmxExitXdtrAccess(PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient); 247 static DECLCALLBACK(int) hmR0VmxExitXdtrAccess(PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient); 248 static DECLCALLBACK(int) hmR0VmxExitEptViolation(PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient); 249 static DECLCALLBACK(int) hmR0VmxExitEptMisconfig(PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient); 250 static DECLCALLBACK(int) hmR0VmxExitRdtscp(PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient); 251 static DECLCALLBACK(int) hmR0VmxExitPreemptTimer(PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient); 252 static DECLCALLBACK(int) hmR0VmxExitWbinvd(PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient); 253 static DECLCALLBACK(int) hmR0VmxExitXsetbv(PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient); 254 static DECLCALLBACK(int) hmR0VmxExitRdrand(PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient); 255 static DECLCALLBACK(int) hmR0VmxExitInvpcid(PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient); 256 static DECLCALLBACK(int) hmR0VmxExitXcptNM(PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient); 257 static DECLCALLBACK(int) hmR0VmxExitXcptPF(PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient); 258 static DECLCALLBACK(int) hmR0VmxExitXcptMF(PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient); 259 static DECLCALLBACK(int) hmR0VmxExitXcptDB(PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient); 260 static DECLCALLBACK(int) hmR0VmxExitXcptBP(PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient); 261 static DECLCALLBACK(int) hmR0VmxExitXcptGP(PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient); 262 static DECLCALLBACK(int) hmR0VmxExitXcptGeneric(PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient); 264 263 265 264 /******************************************************************************* … … 271 270 * 272 271 * @returns VBox status code. 273 * @param pVM Pointer to the VM.274 272 * @param pVCpu Pointer to the VMCPU. 275 273 * @param pMixedCtx Pointer to the guest-CPU context. The data may be … … 278 276 * @param pVmxTransient Pointer to the VMX-transient structure. 279 277 */ 280 typedef DECLCALLBACK(int) FNVMEXITHANDLER(PVM pVM, PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient);278 typedef DECLCALLBACK(int) FNVMEXITHANDLER(PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient); 281 279 /** Pointer to VM-exit handler. */ 282 280 typedef FNVMEXITHANDLER *PFNVMEXITHANDLER; … … 4623 4621 * @retval VINF_EM_RESET if we detected a triple-fault condition. 4624 4622 * 4625 * @param pVM Pointer to the VM.4626 4623 * @param pVCpu Pointer to the VMCPU. 4627 4624 * @param pMixedCtx Pointer to the guest-CPU context. The data may be … … 4632 4629 * @remarks No-long-jump zone!!! 4633 4630 */ 4634 static int hmR0VmxCheckExitDueToEventDelivery(PVM pVM, PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient)4631 static int hmR0VmxCheckExitDueToEventDelivery(PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient) 4635 4632 { 4636 4633 int rc = hmR0VmxReadIdtVectoringInfoVmcs(pVmxTransient); … … 5760 5757 5761 5758 STAM_COUNTER_INC(&pVCpu->hm.s.StatIntInject); 5762 return hmR0VmxInjectEventVmcs(pV M, pVCpu, pMixedCtx, u32IntrInfo, 0 /* cbInstr */, uErrCode);5759 return hmR0VmxInjectEventVmcs(pVCpu, pMixedCtx, u32IntrInfo, 0 /* cbInstr */, uErrCode); 5763 5760 } 5764 5761 … … 5783 5780 { 5784 5781 Log(("Pending event\n")); 5785 int rc = hmR0VmxInjectEventVmcs(pV M, pVCpu, pMixedCtx, pVCpu->hm.s.Event.u64IntrInfo, 0 /* cbInstr */,5782 int rc = hmR0VmxInjectEventVmcs(pVCpu, pMixedCtx, pVCpu->hm.s.Event.u64IntrInfo, 0 /* cbInstr */, 5786 5783 pVCpu->hm.s.Event.u32ErrCode); 5787 5784 AssertRCReturn(rc, rc); … … 5801 5798 uIntrInfo |= (VMX_EXIT_INTERRUPTION_INFO_TYPE_NMI << VMX_EXIT_INTERRUPTION_INFO_TYPE_SHIFT); 5802 5799 Log(("Injecting NMI\n")); 5803 int rc = hmR0VmxInjectEventVmcs(pV M, pVCpu, pMixedCtx, uIntrInfo, 0 /* cbInstr */, 0 /* u32ErrCode */);5800 int rc = hmR0VmxInjectEventVmcs(pVCpu, pMixedCtx, uIntrInfo, 0 /* cbInstr */, 0 /* u32ErrCode */); 5804 5801 AssertRCReturn(rc, rc); 5805 5802 return rc; … … 5868 5865 * 5869 5866 * @returns VBox status code (informational status code included). 5870 * @param pVM Pointer to the VM.5871 5867 * @param pVCpu Pointer to the VMCPU. 5872 5868 * @param pMixedCtx Pointer to the guest-CPU context. The data may be … … 5874 5870 * before using them. 5875 5871 */ 5876 DECLINLINE(int) hmR0VmxInjectXcptUD(PVM pVM, PVMCPU pVCpu, PCPUMCTX pMixedCtx)5872 DECLINLINE(int) hmR0VmxInjectXcptUD(PVMCPU pVCpu, PCPUMCTX pMixedCtx) 5877 5873 { 5878 5874 /* Refer Intel spec. 24.8.3 "VM-entry Controls for Event Injection" for the format of u32IntrInfo. */ 5879 5875 uint32_t u32IntrInfo = X86_XCPT_UD | (1 << VMX_EXIT_INTERRUPTION_INFO_VALID_SHIFT); 5880 5876 STAM_COUNTER_INC(&pVCpu->hm.s.StatIntInject); 5881 return hmR0VmxInjectEventVmcs(pV M, pVCpu, pMixedCtx, u32IntrInfo, 0 /* cbInstr */, 0 /* u32ErrCode */);5877 return hmR0VmxInjectEventVmcs(pVCpu, pMixedCtx, u32IntrInfo, 0 /* cbInstr */, 0 /* u32ErrCode */); 5882 5878 } 5883 5879 … … 5887 5883 * 5888 5884 * @returns VBox status code (informational status code included). 5889 * @param pVM Pointer to the VM.5890 5885 * @param pVCpu Pointer to the VMCPU. 5891 5886 * @param pMixedCtx Pointer to the guest-CPU context. The data may be … … 5893 5888 * before using them. 5894 5889 */ 5895 DECLINLINE(int) hmR0VmxInjectXcptDF(PVM pVM, PVMCPU pVCpu, PCPUMCTX pMixedCtx)5890 DECLINLINE(int) hmR0VmxInjectXcptDF(PVMCPU pVCpu, PCPUMCTX pMixedCtx) 5896 5891 { 5897 5892 /* Inject the double-fault. */ … … 5900 5895 u32IntrInfo |= VMX_EXIT_INTERRUPTION_INFO_ERROR_CODE_VALID; 5901 5896 STAM_COUNTER_INC(&pVCpu->hm.s.StatIntInject); 5902 return hmR0VmxInjectEventVmcs(pV M, pVCpu, pMixedCtx, u32IntrInfo, 0 /* cbInstr */, 0 /* u32ErrCode */);5897 return hmR0VmxInjectEventVmcs(pVCpu, pMixedCtx, u32IntrInfo, 0 /* cbInstr */, 0 /* u32ErrCode */); 5903 5898 } 5904 5899 … … 5908 5903 * 5909 5904 * @returns VBox status code (informational status code included). 5910 * @param pVM Pointer to the VM.5911 5905 * @param pVCpu Pointer to the VMCPU. 5912 5906 * @param pMixedCtx Pointer to the guest-CPU context. The data may be … … 5914 5908 * before using them. 5915 5909 */ 5916 DECLINLINE(int) hmR0VmxInjectXcptDB(PVM pVM, PVMCPU pVCpu, PCPUMCTX pMixedCtx)5910 DECLINLINE(int) hmR0VmxInjectXcptDB(PVMCPU pVCpu, PCPUMCTX pMixedCtx) 5917 5911 { 5918 5912 /* Inject the debug-exception. */ … … 5920 5914 u32IntrInfo |= (VMX_EXIT_INTERRUPTION_INFO_TYPE_HW_XCPT << VMX_EXIT_INTERRUPTION_INFO_TYPE_SHIFT); 5921 5915 STAM_COUNTER_INC(&pVCpu->hm.s.StatIntInject); 5922 return hmR0VmxInjectEventVmcs(pV M, pVCpu, pMixedCtx, u32IntrInfo, 0 /* cbInstr */, 0 /* u32ErrCode */);5916 return hmR0VmxInjectEventVmcs(pVCpu, pMixedCtx, u32IntrInfo, 0 /* cbInstr */, 0 /* u32ErrCode */); 5923 5917 } 5924 5918 … … 5928 5922 * 5929 5923 * @returns VBox status code (informational status code included). 5930 * @param pVM Pointer to the VM.5931 5924 * @param pVCpu Pointer to the VMCPU. 5932 5925 * @param pMixedCtx Pointer to the guest-CPU context. The data may be … … 5936 5929 * stack. 5937 5930 */ 5938 DECLINLINE(int) hmR0VmxInjectXcptOF(PVM pVM, PVMCPU pVCpu, PCPUMCTX pMixedCtx, uint32_t cbInstr)5931 DECLINLINE(int) hmR0VmxInjectXcptOF(PVMCPU pVCpu, PCPUMCTX pMixedCtx, uint32_t cbInstr) 5939 5932 { 5940 5933 /* Inject the overflow exception. */ … … 5942 5935 u32IntrInfo |= (VMX_EXIT_INTERRUPTION_INFO_TYPE_SW_INT << VMX_EXIT_INTERRUPTION_INFO_TYPE_SHIFT); 5943 5936 STAM_COUNTER_INC(&pVCpu->hm.s.StatIntInject); 5944 return hmR0VmxInjectEventVmcs(pV M, pVCpu, pMixedCtx, u32IntrInfo, cbInstr, 0 /* u32ErrCode */);5937 return hmR0VmxInjectEventVmcs(pVCpu, pMixedCtx, u32IntrInfo, cbInstr, 0 /* u32ErrCode */); 5945 5938 } 5946 5939 … … 5950 5943 * 5951 5944 * @returns VBox status code (informational status code included). 5952 * @param pVM Pointer to the VM.5953 5945 * @param pVCpu Pointer to the VMCPU. 5954 5946 * @param pMixedCtx Pointer to the guest-CPU context. The data may be … … 5957 5949 * @param u32ErrorCode The error code associated with the #GP. 5958 5950 */ 5959 DECLINLINE(int) hmR0VmxInjectXcptGP(PVM pVM, PVMCPU pVCpu, PCPUMCTX pMixedCtx, bool fErrorCodeValid, uint32_t u32ErrorCode)5951 DECLINLINE(int) hmR0VmxInjectXcptGP(PVMCPU pVCpu, PCPUMCTX pMixedCtx, bool fErrorCodeValid, uint32_t u32ErrorCode) 5960 5952 { 5961 5953 /* Inject the general-protection fault. */ … … 5965 5957 u32IntrInfo |= VMX_EXIT_INTERRUPTION_INFO_ERROR_CODE_VALID; 5966 5958 STAM_COUNTER_INC(&pVCpu->hm.s.StatIntInject); 5967 return hmR0VmxInjectEventVmcs(pV M, pVCpu, pMixedCtx, u32IntrInfo, 0 /* cbInstr */, u32ErrorCode);5959 return hmR0VmxInjectEventVmcs(pVCpu, pMixedCtx, u32IntrInfo, 0 /* cbInstr */, u32ErrorCode); 5968 5960 } 5969 5961 … … 5973 5965 * 5974 5966 * @returns VBox status code (informational status code included). 5975 * @param pVM Pointer to the VM.5976 5967 * @param pVCpu Pointer to the VMCPU. 5977 5968 * @param pMixedCtx Pointer to the guest-CPU context. The data may be … … 5982 5973 * stack. 5983 5974 */ 5984 DECLINLINE(int) hmR0VmxInjectIntN(PVM pVM, PVMCPU pVCpu, PCPUMCTX pMixedCtx, uint16_t uVector, uint32_t cbInstr)5975 DECLINLINE(int) hmR0VmxInjectIntN(PVMCPU pVCpu, PCPUMCTX pMixedCtx, uint16_t uVector, uint32_t cbInstr) 5985 5976 { 5986 5977 /* Inject the INTn. */ … … 5988 5979 u32IntrInfo |= (VMX_EXIT_INTERRUPTION_INFO_TYPE_SW_INT << VMX_EXIT_INTERRUPTION_INFO_TYPE_SHIFT); 5989 5980 STAM_COUNTER_INC(&pVCpu->hm.s.StatIntInject); 5990 return hmR0VmxInjectEventVmcs(pV M, pVCpu, pMixedCtx, u32IntrInfo, cbInstr, 0 /* u32ErrCode */);5981 return hmR0VmxInjectEventVmcs(pVCpu, pMixedCtx, u32IntrInfo, cbInstr, 0 /* u32ErrCode */); 5991 5982 } 5992 5983 … … 6026 6017 * @retval VINF_EM_RESET if event injection resulted in a triple-fault. 6027 6018 * 6028 * @param pVM Pointer to the VM.6029 6019 * @param pVCpu Pointer to the VMCPU. 6030 6020 * @param pMixedCtx Pointer to the guest-CPU context. The data may be … … 6039 6029 * @remarks No-long-jump zone!!! 6040 6030 */ 6041 static int hmR0VmxInjectEventVmcs(PVM pVM, PVMCPU pVCpu, PCPUMCTX pMixedCtx, uint64_t u64IntrInfo, uint32_t cbInstr,6031 static int hmR0VmxInjectEventVmcs(PVMCPU pVCpu, PCPUMCTX pMixedCtx, uint64_t u64IntrInfo, uint32_t cbInstr, 6042 6032 uint32_t u32ErrCode) 6043 6033 { … … 6061 6051 if (CPUMIsGuestInRealModeEx(pMixedCtx)) 6062 6052 { 6053 PVM pVM = pVCpu->CTX_SUFF(pVM); 6063 6054 if (!pVM->hm.s.vmx.fUnrestrictedGuest) 6064 6055 { … … 6081 6072 { 6082 6073 /* If we're injecting a #GP with no valid IDT entry, inject a double-fault. */ 6083 return hmR0VmxInjectXcptDF(pV M, pVCpu, pMixedCtx);6074 return hmR0VmxInjectXcptDF(pVCpu, pMixedCtx); 6084 6075 } 6085 6076 6086 6077 /* If we're injecting an interrupt/exception with no valid IDT entry, inject a general-protection fault. */ 6087 6078 /* No error codes for exceptions in real-mode. See Intel spec. 20.1.4 "Interrupt and Exception Handling" */ 6088 return hmR0VmxInjectXcptGP(pV M, pVCpu, pMixedCtx, false /* fErrCodeValid */, 0 /* u32ErrCode */);6079 return hmR0VmxInjectXcptGP(pVCpu, pMixedCtx, false /* fErrCodeValid */, 0 /* u32ErrCode */); 6089 6080 } 6090 6081 … … 6651 6642 STAM_PROFILE_ADV_STOP_START(&pVCpu->hm.s.StatExit1, &pVCpu->hm.s.StatExit2, x); 6652 6643 AssertMsg(VmxTransient.uExitReason <= VMX_EXIT_MAX, ("%#x\n", VmxTransient.uExitReason)); 6653 rc = (*s_apfnVMExitHandlers[VmxTransient.uExitReason])(pV M, pVCpu, pCtx, &VmxTransient);6644 rc = (*s_apfnVMExitHandlers[VmxTransient.uExitReason])(pVCpu, pCtx, &VmxTransient); 6654 6645 STAM_PROFILE_ADV_STOP(&pVCpu->hm.s.StatExit2, x); 6655 6646 if (rc != VINF_SUCCESS) … … 6670 6661 } 6671 6662 6672 #if 06663 #if 1 6673 6664 DECLINLINE(int) hmR0VmxHandleExit(PVM pVM, PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient, unsigned rcReason) 6674 6665 { … … 6676 6667 switch (rcReason) 6677 6668 { 6678 case VMX_EXIT_EPT_MISCONFIG: rc = hmR0VmxExitEptMisconfig(pV M, pVCpu, pMixedCtx, pVmxTransient); break;6679 case VMX_EXIT_EPT_VIOLATION: rc = hmR0VmxExitEptViolation(pV M, pVCpu, pMixedCtx, pVmxTransient); break;6680 case VMX_EXIT_IO_INSTR: rc = hmR0VmxExitIoInstr(pV M, pVCpu, pMixedCtx, pVmxTransient); break;6681 case VMX_EXIT_CPUID: rc = hmR0VmxExitCpuid(pV M, pVCpu, pMixedCtx, pVmxTransient); break;6682 case VMX_EXIT_RDTSC: rc = hmR0VmxExitRdtsc(pV M, pVCpu, pMixedCtx, pVmxTransient); break;6683 case VMX_EXIT_RDTSCP: rc = hmR0VmxExitRdtscp(pV M, pVCpu, pMixedCtx, pVmxTransient); break;6684 case VMX_EXIT_APIC_ACCESS: rc = hmR0VmxExitApicAccess(pV M, pVCpu, pMixedCtx, pVmxTransient); break;6685 case VMX_EXIT_XCPT_NMI: rc = hmR0VmxExitXcptNmi(pV M, pVCpu, pMixedCtx, pVmxTransient); break;6686 case VMX_EXIT_MOV_CRX: rc = hmR0VmxExitMovCRx(pV M, pVCpu, pMixedCtx, pVmxTransient); break;6687 case VMX_EXIT_EXT_INT: rc = hmR0VmxExitExtInt(pV M, pVCpu, pMixedCtx, pVmxTransient); break;6688 case VMX_EXIT_INT_WINDOW: rc = hmR0VmxExitIntWindow(pV M, pVCpu, pMixedCtx, pVmxTransient); break;6689 case VMX_EXIT_MWAIT: rc = hmR0VmxExitMwait(pV M, pVCpu, pMixedCtx, pVmxTransient); break;6690 case VMX_EXIT_MONITOR: rc = hmR0VmxExitMonitor(pV M, pVCpu, pMixedCtx, pVmxTransient); break;6691 case VMX_EXIT_TASK_SWITCH: rc = hmR0VmxExitTaskSwitch(pV M, pVCpu, pMixedCtx, pVmxTransient); break;6692 case VMX_EXIT_PREEMPT_TIMER: rc = hmR0VmxExitPreemptTimer(pV M, pVCpu, pMixedCtx, pVmxTransient); break;6693 case VMX_EXIT_RDMSR: rc = hmR0VmxExitRdmsr(pV M, pVCpu, pMixedCtx, pVmxTransient); break;6694 case VMX_EXIT_WRMSR: rc = hmR0VmxExitWrmsr(pV M, pVCpu, pMixedCtx, pVmxTransient); break;6695 case VMX_EXIT_MOV_DRX: rc = hmR0VmxExitMovDRx(pV M, pVCpu, pMixedCtx, pVmxTransient); break;6696 case VMX_EXIT_TPR_BELOW_THRESHOLD: rc = hmR0VmxExitTprBelowThreshold(pV M, pVCpu, pMixedCtx, pVmxTransient); break;6697 case VMX_EXIT_HLT: rc = hmR0VmxExitHlt(pV M, pVCpu, pMixedCtx, pVmxTransient); break;6698 case VMX_EXIT_INVD: rc = hmR0VmxExitInvd(pV M, pVCpu, pMixedCtx, pVmxTransient); break;6699 case VMX_EXIT_INVLPG: rc = hmR0VmxExitInvlpg(pV M, pVCpu, pMixedCtx, pVmxTransient); break;6700 case VMX_EXIT_RSM: rc = hmR0VmxExitRsm(pV M, pVCpu, pMixedCtx, pVmxTransient); break;6701 case VMX_EXIT_MTF: rc = hmR0VmxExitMtf(pV M, pVCpu, pMixedCtx, pVmxTransient); break;6702 case VMX_EXIT_PAUSE: rc = hmR0VmxExitPause(pV M, pVCpu, pMixedCtx, pVmxTransient); break;6703 case VMX_EXIT_XDTR_ACCESS: rc = hmR0VmxExitXdtrAccess(pV M, pVCpu, pMixedCtx, pVmxTransient); break;6704 case VMX_EXIT_TR_ACCESS: rc = hmR0VmxExitXdtrAccess(pV M, pVCpu, pMixedCtx, pVmxTransient); break;6705 case VMX_EXIT_WBINVD: rc = hmR0VmxExitWbinvd(pV M, pVCpu, pMixedCtx, pVmxTransient); break;6706 case VMX_EXIT_XSETBV: rc = hmR0VmxExitXsetbv(pV M, pVCpu, pMixedCtx, pVmxTransient); break;6707 case VMX_EXIT_RDRAND: rc = hmR0VmxExitRdrand(pV M, pVCpu, pMixedCtx, pVmxTransient); break;6708 case VMX_EXIT_INVPCID: rc = hmR0VmxExitInvpcid(pV M, pVCpu, pMixedCtx, pVmxTransient); break;6709 case VMX_EXIT_GETSEC: rc = hmR0VmxExitGetsec(pV M, pVCpu, pMixedCtx, pVmxTransient); break;6710 case VMX_EXIT_RDPMC: rc = hmR0VmxExitRdpmc(pV M, pVCpu, pMixedCtx, pVmxTransient); break;6711 6712 case VMX_EXIT_TRIPLE_FAULT: rc = hmR0VmxExitTripleFault(pV M, pVCpu, pMixedCtx, pVmxTransient); break;6713 case VMX_EXIT_NMI_WINDOW: rc = hmR0VmxExitNmiWindow(pV M, pVCpu, pMixedCtx, pVmxTransient); break;6714 case VMX_EXIT_INIT_SIGNAL: rc = hmR0VmxExitInitSignal(pV M, pVCpu, pMixedCtx, pVmxTransient); break;6715 case VMX_EXIT_SIPI: rc = hmR0VmxExitSipi(pV M, pVCpu, pMixedCtx, pVmxTransient); break;6716 case VMX_EXIT_IO_SMI: rc = hmR0VmxExitIoSmi(pV M, pVCpu, pMixedCtx, pVmxTransient); break;6717 case VMX_EXIT_SMI: rc = hmR0VmxExitSmi(pV M, pVCpu, pMixedCtx, pVmxTransient); break;6718 case VMX_EXIT_ERR_MSR_LOAD: rc = hmR0VmxExitErrMsrLoad(pV M, pVCpu, pMixedCtx, pVmxTransient); break;6719 case VMX_EXIT_ERR_INVALID_GUEST_STATE: rc = hmR0VmxExitErrInvalidGuestState(pV M, pVCpu, pMixedCtx, pVmxTransient); break;6720 case VMX_EXIT_ERR_MACHINE_CHECK: rc = hmR0VmxExitErrMachineCheck(pV M, pVCpu, pMixedCtx, pVmxTransient); break;6669 case VMX_EXIT_EPT_MISCONFIG: rc = hmR0VmxExitEptMisconfig(pVCpu, pMixedCtx, pVmxTransient); break; 6670 case VMX_EXIT_EPT_VIOLATION: rc = hmR0VmxExitEptViolation(pVCpu, pMixedCtx, pVmxTransient); break; 6671 case VMX_EXIT_IO_INSTR: rc = hmR0VmxExitIoInstr(pVCpu, pMixedCtx, pVmxTransient); break; 6672 case VMX_EXIT_CPUID: rc = hmR0VmxExitCpuid(pVCpu, pMixedCtx, pVmxTransient); break; 6673 case VMX_EXIT_RDTSC: rc = hmR0VmxExitRdtsc(pVCpu, pMixedCtx, pVmxTransient); break; 6674 case VMX_EXIT_RDTSCP: rc = hmR0VmxExitRdtscp(pVCpu, pMixedCtx, pVmxTransient); break; 6675 case VMX_EXIT_APIC_ACCESS: rc = hmR0VmxExitApicAccess(pVCpu, pMixedCtx, pVmxTransient); break; 6676 case VMX_EXIT_XCPT_NMI: rc = hmR0VmxExitXcptNmi(pVCpu, pMixedCtx, pVmxTransient); break; 6677 case VMX_EXIT_MOV_CRX: rc = hmR0VmxExitMovCRx(pVCpu, pMixedCtx, pVmxTransient); break; 6678 case VMX_EXIT_EXT_INT: rc = hmR0VmxExitExtInt(pVCpu, pMixedCtx, pVmxTransient); break; 6679 case VMX_EXIT_INT_WINDOW: rc = hmR0VmxExitIntWindow(pVCpu, pMixedCtx, pVmxTransient); break; 6680 case VMX_EXIT_MWAIT: rc = hmR0VmxExitMwait(pVCpu, pMixedCtx, pVmxTransient); break; 6681 case VMX_EXIT_MONITOR: rc = hmR0VmxExitMonitor(pVCpu, pMixedCtx, pVmxTransient); break; 6682 case VMX_EXIT_TASK_SWITCH: rc = hmR0VmxExitTaskSwitch(pVCpu, pMixedCtx, pVmxTransient); break; 6683 case VMX_EXIT_PREEMPT_TIMER: rc = hmR0VmxExitPreemptTimer(pVCpu, pMixedCtx, pVmxTransient); break; 6684 case VMX_EXIT_RDMSR: rc = hmR0VmxExitRdmsr(pVCpu, pMixedCtx, pVmxTransient); break; 6685 case VMX_EXIT_WRMSR: rc = hmR0VmxExitWrmsr(pVCpu, pMixedCtx, pVmxTransient); break; 6686 case VMX_EXIT_MOV_DRX: rc = hmR0VmxExitMovDRx(pVCpu, pMixedCtx, pVmxTransient); break; 6687 case VMX_EXIT_TPR_BELOW_THRESHOLD: rc = hmR0VmxExitTprBelowThreshold(pVCpu, pMixedCtx, pVmxTransient); break; 6688 case VMX_EXIT_HLT: rc = hmR0VmxExitHlt(pVCpu, pMixedCtx, pVmxTransient); break; 6689 case VMX_EXIT_INVD: rc = hmR0VmxExitInvd(pVCpu, pMixedCtx, pVmxTransient); break; 6690 case VMX_EXIT_INVLPG: rc = hmR0VmxExitInvlpg(pVCpu, pMixedCtx, pVmxTransient); break; 6691 case VMX_EXIT_RSM: rc = hmR0VmxExitRsm(pVCpu, pMixedCtx, pVmxTransient); break; 6692 case VMX_EXIT_MTF: rc = hmR0VmxExitMtf(pVCpu, pMixedCtx, pVmxTransient); break; 6693 case VMX_EXIT_PAUSE: rc = hmR0VmxExitPause(pVCpu, pMixedCtx, pVmxTransient); break; 6694 case VMX_EXIT_XDTR_ACCESS: rc = hmR0VmxExitXdtrAccess(pVCpu, pMixedCtx, pVmxTransient); break; 6695 case VMX_EXIT_TR_ACCESS: rc = hmR0VmxExitXdtrAccess(pVCpu, pMixedCtx, pVmxTransient); break; 6696 case VMX_EXIT_WBINVD: rc = hmR0VmxExitWbinvd(pVCpu, pMixedCtx, pVmxTransient); break; 6697 case VMX_EXIT_XSETBV: rc = hmR0VmxExitXsetbv(pVCpu, pMixedCtx, pVmxTransient); break; 6698 case VMX_EXIT_RDRAND: rc = hmR0VmxExitRdrand(pVCpu, pMixedCtx, pVmxTransient); break; 6699 case VMX_EXIT_INVPCID: rc = hmR0VmxExitInvpcid(pVCpu, pMixedCtx, pVmxTransient); break; 6700 case VMX_EXIT_GETSEC: rc = hmR0VmxExitGetsec(pVCpu, pMixedCtx, pVmxTransient); break; 6701 case VMX_EXIT_RDPMC: rc = hmR0VmxExitRdpmc(pVCpu, pMixedCtx, pVmxTransient); break; 6702 6703 case VMX_EXIT_TRIPLE_FAULT: rc = hmR0VmxExitTripleFault(pVCpu, pMixedCtx, pVmxTransient); break; 6704 case VMX_EXIT_NMI_WINDOW: rc = hmR0VmxExitNmiWindow(pVCpu, pMixedCtx, pVmxTransient); break; 6705 case VMX_EXIT_INIT_SIGNAL: rc = hmR0VmxExitInitSignal(pVCpu, pMixedCtx, pVmxTransient); break; 6706 case VMX_EXIT_SIPI: rc = hmR0VmxExitSipi(pVCpu, pMixedCtx, pVmxTransient); break; 6707 case VMX_EXIT_IO_SMI: rc = hmR0VmxExitIoSmi(pVCpu, pMixedCtx, pVmxTransient); break; 6708 case VMX_EXIT_SMI: rc = hmR0VmxExitSmi(pVCpu, pMixedCtx, pVmxTransient); break; 6709 case VMX_EXIT_ERR_MSR_LOAD: rc = hmR0VmxExitErrMsrLoad(pVCpu, pMixedCtx, pVmxTransient); break; 6710 case VMX_EXIT_ERR_INVALID_GUEST_STATE: rc = hmR0VmxExitErrInvalidGuestState(pVCpu, pMixedCtx, pVmxTransient); break; 6711 case VMX_EXIT_ERR_MACHINE_CHECK: rc = hmR0VmxExitErrMachineCheck(pVCpu, pMixedCtx, pVmxTransient); break; 6721 6712 6722 6713 case VMX_EXIT_VMCALL: … … 6733 6724 case VMX_EXIT_INVVPID: 6734 6725 case VMX_EXIT_VMFUNC: 6735 rc = hmR0VmxExitInjectXcptUD(pV M, pVCpu, pMixedCtx, pVmxTransient);6726 rc = hmR0VmxExitInjectXcptUD(pVCpu, pMixedCtx, pVmxTransient); 6736 6727 break; 6737 6728 default: 6738 rc = hmR0VmxExitErrUndefined(pV M, pVCpu, pMixedCtx, pVmxTransient);6729 rc = hmR0VmxExitErrUndefined(pVCpu, pMixedCtx, pVmxTransient); 6739 6730 break; 6740 6731 } … … 6756 6747 # define VMX_VALIDATE_EXIT_HANDLER_PARAMS() \ 6757 6748 do { \ 6758 AssertPtr(pVM); \6759 6749 AssertPtr(pVCpu); \ 6760 6750 AssertPtr(pMixedCtx); \ … … 6809 6799 * VM-exit handler for external interrupts (VMX_EXIT_EXT_INT). 6810 6800 */ 6811 static DECLCALLBACK(int) hmR0VmxExitExtInt(PVM pVM, PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient)6801 static DECLCALLBACK(int) hmR0VmxExitExtInt(PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient) 6812 6802 { 6813 6803 VMX_VALIDATE_EXIT_HANDLER_PARAMS(); … … 6820 6810 * VM-exit handler for exceptions and NMIs (VMX_EXIT_XCPT_NMI). 6821 6811 */ 6822 static DECLCALLBACK(int) hmR0VmxExitXcptNmi(PVM pVM, PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient)6812 static DECLCALLBACK(int) hmR0VmxExitXcptNmi(PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient) 6823 6813 { 6824 6814 VMX_VALIDATE_EXIT_HANDLER_PARAMS(); … … 6834 6824 6835 6825 /* If this VM-exit occurred while delivering an event through the guest IDT, handle it accordingly. */ 6836 rc = hmR0VmxCheckExitDueToEventDelivery(pV M, pVCpu, pMixedCtx, pVmxTransient);6826 rc = hmR0VmxCheckExitDueToEventDelivery(pVCpu, pMixedCtx, pVmxTransient); 6837 6827 if (RT_UNLIKELY(rc == VINF_VMX_DOUBLE_FAULT)) 6838 6828 return VINF_SUCCESS; … … 6851 6841 switch (uVector) 6852 6842 { 6853 case X86_XCPT_PF: rc = hmR0VmxExitXcptPF(pV M, pVCpu, pMixedCtx, pVmxTransient); break;6854 case X86_XCPT_GP: rc = hmR0VmxExitXcptGP(pV M, pVCpu, pMixedCtx, pVmxTransient); break;6855 case X86_XCPT_NM: rc = hmR0VmxExitXcptNM(pV M, pVCpu, pMixedCtx, pVmxTransient); break;6856 case X86_XCPT_MF: rc = hmR0VmxExitXcptMF(pV M, pVCpu, pMixedCtx, pVmxTransient); break;6857 case X86_XCPT_DB: rc = hmR0VmxExitXcptDB(pV M, pVCpu, pMixedCtx, pVmxTransient); break;6858 case X86_XCPT_BP: rc = hmR0VmxExitXcptBP(pV M, pVCpu, pMixedCtx, pVmxTransient); break;6843 case X86_XCPT_PF: rc = hmR0VmxExitXcptPF(pVCpu, pMixedCtx, pVmxTransient); break; 6844 case X86_XCPT_GP: rc = hmR0VmxExitXcptGP(pVCpu, pMixedCtx, pVmxTransient); break; 6845 case X86_XCPT_NM: rc = hmR0VmxExitXcptNM(pVCpu, pMixedCtx, pVmxTransient); break; 6846 case X86_XCPT_MF: rc = hmR0VmxExitXcptMF(pVCpu, pMixedCtx, pVmxTransient); break; 6847 case X86_XCPT_DB: rc = hmR0VmxExitXcptDB(pVCpu, pMixedCtx, pVmxTransient); break; 6848 case X86_XCPT_BP: rc = hmR0VmxExitXcptBP(pVCpu, pMixedCtx, pVmxTransient); break; 6859 6849 #ifdef VBOX_ALWAYS_TRAP_ALL_EXCEPTIONS 6860 6850 case X86_XCPT_XF: STAM_COUNTER_INC(&pVCpu->hm.s.StatExitGuestXF); 6861 rc = hmR0VmxExitXcptGeneric(pV M, pVCpu, pMixedCtx, pVmxTransient); break;6851 rc = hmR0VmxExitXcptGeneric(pVCpu, pMixedCtx, pVmxTransient); break; 6862 6852 case X86_XCPT_DE: STAM_COUNTER_INC(&pVCpu->hm.s.StatExitGuestDE); 6863 rc = hmR0VmxExitXcptGeneric(pV M, pVCpu, pMixedCtx, pVmxTransient); break;6853 rc = hmR0VmxExitXcptGeneric(pVCpu, pMixedCtx, pVmxTransient); break; 6864 6854 case X86_XCPT_UD: STAM_COUNTER_INC(&pVCpu->hm.s.StatExitGuestUD); 6865 rc = hmR0VmxExitXcptGeneric(pV M, pVCpu, pMixedCtx, pVmxTransient); break;6855 rc = hmR0VmxExitXcptGeneric(pVCpu, pMixedCtx, pVmxTransient); break; 6866 6856 case X86_XCPT_SS: STAM_COUNTER_INC(&pVCpu->hm.s.StatExitGuestSS); 6867 rc = hmR0VmxExitXcptGeneric(pV M, pVCpu, pMixedCtx, pVmxTransient); break;6857 rc = hmR0VmxExitXcptGeneric(pVCpu, pMixedCtx, pVmxTransient); break; 6868 6858 case X86_XCPT_NP: STAM_COUNTER_INC(&pVCpu->hm.s.StatExitGuestNP); 6869 rc = hmR0VmxExitXcptGeneric(pV M, pVCpu, pMixedCtx, pVmxTransient); break;6859 rc = hmR0VmxExitXcptGeneric(pVCpu, pMixedCtx, pVmxTransient); break; 6870 6860 #endif 6871 6861 default: … … 6877 6867 if (pVCpu->hm.s.vmx.RealMode.fRealOnV86Active) 6878 6868 { 6879 Assert(pV M->hm.s.vmx.pRealModeTSS);6880 Assert(PDMVmmDevHeapIsEnabled(pV M));6869 Assert(pVCpu->CTX_SUFF(pVM)->hm.s.vmx.pRealModeTSS); 6870 Assert(PDMVmmDevHeapIsEnabled(pVCpu->CTX_SUFF(pVM))); 6881 6871 rc = hmR0VmxReadExitInstrLenVmcs(pVCpu, pVmxTransient); 6882 6872 rc |= hmR0VmxReadExitIntrErrorCodeVmcs(pVCpu, pVmxTransient); 6883 6873 AssertRCReturn(rc, rc); 6884 rc = hmR0VmxInjectEventVmcs(pV M, pVCpu, pMixedCtx,6874 rc = hmR0VmxInjectEventVmcs(pVCpu, pMixedCtx, 6885 6875 VMX_VMCS_CTRL_ENTRY_IRQ_INFO_FROM_EXIT_INT_INFO(uExitIntrInfo), 6886 6876 pVmxTransient->cbInstr, pVmxTransient->uExitIntrErrorCode); … … 6913 6903 * VM-exit handler for interrupt-window exiting (VMX_EXIT_INT_WINDOW). 6914 6904 */ 6915 static DECLCALLBACK(int) hmR0VmxExitIntWindow(PVM pVM, PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient)6905 static DECLCALLBACK(int) hmR0VmxExitIntWindow(PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient) 6916 6906 { 6917 6907 VMX_VALIDATE_EXIT_HANDLER_PARAMS(); … … 6932 6922 * VM-exit handler for NMI-window exiting (VMX_EXIT_NMI_WINDOW). 6933 6923 */ 6934 static DECLCALLBACK(int) hmR0VmxExitNmiWindow(PVM pVM, PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient)6924 static DECLCALLBACK(int) hmR0VmxExitNmiWindow(PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient) 6935 6925 { 6936 6926 VMX_VALIDATE_EXIT_HANDLER_PARAMS(); … … 6943 6933 * VM-exit handler for WBINVD (VMX_EXIT_WBINVD). Conditional VM-exit. 6944 6934 */ 6945 static DECLCALLBACK(int) hmR0VmxExitWbinvd(PVM pVM, PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient)6935 static DECLCALLBACK(int) hmR0VmxExitWbinvd(PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient) 6946 6936 { 6947 6937 VMX_VALIDATE_EXIT_HANDLER_PARAMS(); … … 6954 6944 * VM-exit handler for INVD (VMX_EXIT_INVD). Unconditional VM-exit. 6955 6945 */ 6956 static DECLCALLBACK(int) hmR0VmxExitInvd(PVM pVM, PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient)6946 static DECLCALLBACK(int) hmR0VmxExitInvd(PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient) 6957 6947 { 6958 6948 VMX_VALIDATE_EXIT_HANDLER_PARAMS(); … … 6965 6955 * VM-exit handler for CPUID (VMX_EXIT_CPUID). Unconditional VM-exit. 6966 6956 */ 6967 static DECLCALLBACK(int) hmR0VmxExitCpuid(PVM pVM, PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient)6957 static DECLCALLBACK(int) hmR0VmxExitCpuid(PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient) 6968 6958 { 6969 6959 VMX_VALIDATE_EXIT_HANDLER_PARAMS(); 6960 PVM pVM = pVCpu->CTX_SUFF(pVM); 6970 6961 int rc = EMInterpretCpuId(pVM, pVCpu, CPUMCTX2CORE(pMixedCtx)); 6971 6962 if (RT_LIKELY(rc == VINF_SUCCESS)) … … 6987 6978 * VM-exit handler for GETSEC (VMX_EXIT_GETSEC). Unconditional VM-exit. 6988 6979 */ 6989 static DECLCALLBACK(int) hmR0VmxExitGetsec(PVM pVM, PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient)6980 static DECLCALLBACK(int) hmR0VmxExitGetsec(PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient) 6990 6981 { 6991 6982 VMX_VALIDATE_EXIT_HANDLER_PARAMS(); … … 7004 6995 * VM-exit handler for RDTSC (VMX_EXIT_RDTSC). Conditional VM-exit. 7005 6996 */ 7006 static DECLCALLBACK(int) hmR0VmxExitRdtsc(PVM pVM, PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient)6997 static DECLCALLBACK(int) hmR0VmxExitRdtsc(PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient) 7007 6998 { 7008 6999 VMX_VALIDATE_EXIT_HANDLER_PARAMS(); … … 7010 7001 AssertRCReturn(rc, rc); 7011 7002 7003 PVM pVM = pVCpu->CTX_SUFF(pVM); 7012 7004 rc = EMInterpretRdtsc(pVM, pVCpu, CPUMCTX2CORE(pMixedCtx)); 7013 7005 if (RT_LIKELY(rc == VINF_SUCCESS)) … … 7032 7024 * VM-exit handler for RDTSCP (VMX_EXIT_RDTSCP). Conditional VM-exit. 7033 7025 */ 7034 static DECLCALLBACK(int) hmR0VmxExitRdtscp(PVM pVM, PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient)7026 static DECLCALLBACK(int) hmR0VmxExitRdtscp(PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient) 7035 7027 { 7036 7028 VMX_VALIDATE_EXIT_HANDLER_PARAMS(); … … 7039 7031 AssertRCReturn(rc, rc); 7040 7032 7033 PVM pVM = pVCpu->CTX_SUFF(pVM); 7041 7034 rc = EMInterpretRdtscp(pVM, pVCpu, pMixedCtx); 7042 7035 if (RT_LIKELY(rc == VINF_SUCCESS)) … … 7061 7054 * VM-exit handler for RDPMC (VMX_EXIT_RDPMC). Conditional VM-exit. 7062 7055 */ 7063 static DECLCALLBACK(int) hmR0VmxExitRdpmc(PVM pVM, PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient)7056 static DECLCALLBACK(int) hmR0VmxExitRdpmc(PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient) 7064 7057 { 7065 7058 VMX_VALIDATE_EXIT_HANDLER_PARAMS(); … … 7068 7061 AssertRCReturn(rc, rc); 7069 7062 7063 PVM pVM = pVCpu->CTX_SUFF(pVM); 7070 7064 rc = EMInterpretRdpmc(pVM, pVCpu, CPUMCTX2CORE(pMixedCtx)); 7071 7065 if (RT_LIKELY(rc == VINF_SUCCESS)) … … 7087 7081 * VM-exit handler for INVLPG (VMX_EXIT_INVLPG). Conditional VM-exit. 7088 7082 */ 7089 static DECLCALLBACK(int) hmR0VmxExitInvlpg(PVM pVM, PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient)7083 static DECLCALLBACK(int) hmR0VmxExitInvlpg(PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient) 7090 7084 { 7091 7085 VMX_VALIDATE_EXIT_HANDLER_PARAMS(); … … 7094 7088 AssertRCReturn(rc, rc); 7095 7089 7090 PVM pVM = pVCpu->CTX_SUFF(pVM); 7096 7091 VBOXSTRICTRC rc2 = EMInterpretInvlpg(pVM, pVCpu, CPUMCTX2CORE(pMixedCtx), pVmxTransient->uExitQualification); 7097 7092 rc = VBOXSTRICTRC_VAL(rc2); … … 7112 7107 * VM-exit handler for MONITOR (VMX_EXIT_MONITOR). Conditional VM-exit. 7113 7108 */ 7114 static DECLCALLBACK(int) hmR0VmxExitMonitor(PVM pVM, PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient)7109 static DECLCALLBACK(int) hmR0VmxExitMonitor(PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient) 7115 7110 { 7116 7111 VMX_VALIDATE_EXIT_HANDLER_PARAMS(); … … 7120 7115 AssertRCReturn(rc, rc); 7121 7116 7117 PVM pVM = pVCpu->CTX_SUFF(pVM); 7122 7118 rc = EMInterpretMonitor(pVM, pVCpu, CPUMCTX2CORE(pMixedCtx)); 7123 7119 if (RT_LIKELY(rc == VINF_SUCCESS)) … … 7136 7132 * VM-exit handler for MWAIT (VMX_EXIT_MWAIT). Conditional VM-exit. 7137 7133 */ 7138 static DECLCALLBACK(int) hmR0VmxExitMwait(PVM pVM, PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient)7134 static DECLCALLBACK(int) hmR0VmxExitMwait(PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient) 7139 7135 { 7140 7136 VMX_VALIDATE_EXIT_HANDLER_PARAMS(); … … 7144 7140 AssertRCReturn(rc, rc); 7145 7141 7142 PVM pVM = pVCpu->CTX_SUFF(pVM); 7146 7143 VBOXSTRICTRC rc2 = EMInterpretMWait(pVM, pVCpu, CPUMCTX2CORE(pMixedCtx)); 7147 7144 rc = VBOXSTRICTRC_VAL(rc2); … … 7173 7170 * VM-exit handler for RSM (VMX_EXIT_RSM). Unconditional VM-exit. 7174 7171 */ 7175 static DECLCALLBACK(int) hmR0VmxExitRsm(PVM pVM, PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient)7172 static DECLCALLBACK(int) hmR0VmxExitRsm(PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient) 7176 7173 { 7177 7174 /* … … 7181 7178 * See Intel spec. "33.15.5 Enabling the Dual-Monitor Treatment". 7182 7179 */ 7183 AssertMsgFailed(("Unexpected RSM VM-exit. pV M=%p pVCpu=%p pMixedCtx=%p\n", pVM, pVCpu, pMixedCtx));7180 AssertMsgFailed(("Unexpected RSM VM-exit. pVCpu=%p pMixedCtx=%p\n", pVCpu, pMixedCtx)); 7184 7181 return VERR_VMX_UNEXPECTED_EXIT_CODE; 7185 7182 } … … 7189 7186 * VM-exit handler for SMI (VMX_EXIT_SMI). Unconditional VM-exit. 7190 7187 */ 7191 static DECLCALLBACK(int) hmR0VmxExitSmi(PVM pVM, PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient)7188 static DECLCALLBACK(int) hmR0VmxExitSmi(PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient) 7192 7189 { 7193 7190 /* … … 7196 7193 * See Intel spec. "33.15.6 Activating the Dual-Monitor Treatment" and Intel spec. 25.3 "Other Causes of VM-Exits" 7197 7194 */ 7198 AssertMsgFailed(("Unexpected SMI VM-exit. pV M=%p pVCpu=%p pMixedCtx=%p\n", pVM, pVCpu, pMixedCtx));7195 AssertMsgFailed(("Unexpected SMI VM-exit. pVCpu=%p pMixedCtx=%p\n", pVCpu, pMixedCtx)); 7199 7196 return VERR_VMX_UNEXPECTED_EXIT_CODE; 7200 7197 } … … 7204 7201 * VM-exit handler for IO SMI (VMX_EXIT_IO_SMI). Unconditional VM-exit. 7205 7202 */ 7206 static DECLCALLBACK(int) hmR0VmxExitIoSmi(PVM pVM, PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient)7203 static DECLCALLBACK(int) hmR0VmxExitIoSmi(PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient) 7207 7204 { 7208 7205 /* Same treatment as VMX_EXIT_SMI. See comment in hmR0VmxExitSmi(). */ 7209 AssertMsgFailed(("Unexpected IO SMI VM-exit. pV M=%p pVCpu=%p pMixedCtx=%p\n", pVM, pVCpu, pMixedCtx));7206 AssertMsgFailed(("Unexpected IO SMI VM-exit. pVCpu=%p pMixedCtx=%p\n", pVCpu, pMixedCtx)); 7210 7207 return VERR_VMX_UNEXPECTED_EXIT_CODE; 7211 7208 } … … 7215 7212 * VM-exit handler for SIPI (VMX_EXIT_SIPI). Conditional VM-exit. 7216 7213 */ 7217 static DECLCALLBACK(int) hmR0VmxExitSipi(PVM pVM, PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient)7214 static DECLCALLBACK(int) hmR0VmxExitSipi(PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient) 7218 7215 { 7219 7216 /* … … 7222 7219 * See Intel spec. 25.3 "Other Causes of VM-exits". 7223 7220 */ 7224 AssertMsgFailed(("Unexpected SIPI VM-exit. pV M=%p pVCpu=%p pMixedCtx=%p\n", pVM, pVCpu, pMixedCtx));7221 AssertMsgFailed(("Unexpected SIPI VM-exit. pVCpu=%p pMixedCtx=%p\n", pVCpu, pMixedCtx)); 7225 7222 return VERR_VMX_UNEXPECTED_EXIT_CODE; 7226 7223 } … … 7231 7228 * VM-exit. 7232 7229 */ 7233 static DECLCALLBACK(int) hmR0VmxExitInitSignal(PVM pVM, PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient)7230 static DECLCALLBACK(int) hmR0VmxExitInitSignal(PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient) 7234 7231 { 7235 7232 /* … … 7247 7244 * VM-exit. 7248 7245 */ 7249 static DECLCALLBACK(int) hmR0VmxExitTripleFault(PVM pVM, PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient)7246 static DECLCALLBACK(int) hmR0VmxExitTripleFault(PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient) 7250 7247 { 7251 7248 VMX_VALIDATE_EXIT_HANDLER_PARAMS(); … … 7257 7254 * VM-exit handler for HLT (VMX_EXIT_HLT). Conditional VM-exit. 7258 7255 */ 7259 static DECLCALLBACK(int) hmR0VmxExitHlt(PVM pVM, PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient)7256 static DECLCALLBACK(int) hmR0VmxExitHlt(PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient) 7260 7257 { 7261 7258 VMX_VALIDATE_EXIT_HANDLER_PARAMS(); … … 7280 7277 * VM-exit handler for instructions that result in a #UD exception delivered to the guest. 7281 7278 */ 7282 static DECLCALLBACK(int) hmR0VmxExitInjectXcptUD(PVM pVM, PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient)7279 static DECLCALLBACK(int) hmR0VmxExitInjectXcptUD(PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient) 7283 7280 { 7284 7281 VMX_VALIDATE_EXIT_HANDLER_PARAMS(); 7285 return hmR0VmxInjectXcptUD(pV M, pVCpu, pMixedCtx);7282 return hmR0VmxInjectXcptUD(pVCpu, pMixedCtx); 7286 7283 } 7287 7284 … … 7290 7287 * VM-exit handler for expiry of the VMX preemption timer. 7291 7288 */ 7292 static DECLCALLBACK(int) hmR0VmxExitPreemptTimer(PVM pVM, PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient)7289 static DECLCALLBACK(int) hmR0VmxExitPreemptTimer(PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient) 7293 7290 { 7294 7291 VMX_VALIDATE_EXIT_HANDLER_PARAMS(); … … 7299 7296 7300 7297 /* If there are any timer events pending, fall back to ring-3, otherwise resume guest execution. */ 7298 PVM pVM = pVCpu->CTX_SUFF(pVM); 7301 7299 bool fTimersPending = TMTimerPollBool(pVM, pVCpu); 7302 7300 STAM_COUNTER_INC(&pVCpu->hm.s.StatExitPreemptTimer); … … 7308 7306 * VM-exit handler for XSETBV (VMX_EXIT_XSETBV). Unconditional VM-exit. 7309 7307 */ 7310 static DECLCALLBACK(int) hmR0VmxExitXsetbv(PVM pVM, PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient)7308 static DECLCALLBACK(int) hmR0VmxExitXsetbv(PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient) 7311 7309 { 7312 7310 VMX_VALIDATE_EXIT_HANDLER_PARAMS(); … … 7320 7318 * VM-exit handler for INVPCID (VMX_EXIT_INVPCID). Conditional VM-exit. 7321 7319 */ 7322 static DECLCALLBACK(int) hmR0VmxExitInvpcid(PVM pVM, PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient)7320 static DECLCALLBACK(int) hmR0VmxExitInvpcid(PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient) 7323 7321 { 7324 7322 VMX_VALIDATE_EXIT_HANDLER_PARAMS(); … … 7333 7331 * Error VM-exit. 7334 7332 */ 7335 static DECLCALLBACK(int) hmR0VmxExitErrInvalidGuestState(PVM pVM, PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient)7333 static DECLCALLBACK(int) hmR0VmxExitErrInvalidGuestState(PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient) 7336 7334 { 7337 7335 uint32_t uIntrState; … … 7364 7362 Log(("VMX_VMCS64_CTRL_EPTP_FULL %#RX64\n", u64Val)); 7365 7363 7364 PVM pVM = pVCpu->CTX_SUFF(pVM); 7366 7365 HMDumpRegs(pVM, pVCpu, pMixedCtx); 7367 7366 … … 7374 7373 * (VMX_EXIT_ERR_MSR_LOAD). Error VM-exit. 7375 7374 */ 7376 static DECLCALLBACK(int) hmR0VmxExitErrMsrLoad(PVM pVM, PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient)7377 { 7378 AssertMsgFailed(("Unexpected MSR-load exit. pV M=%p pVCpu=%p pMixedCtx=%p\n", pVM, pVCpu, pMixedCtx));7375 static DECLCALLBACK(int) hmR0VmxExitErrMsrLoad(PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient) 7376 { 7377 AssertMsgFailed(("Unexpected MSR-load exit. pVCpu=%p pMixedCtx=%p\n", pVCpu, pMixedCtx)); 7379 7378 return VERR_VMX_UNEXPECTED_EXIT_CODE; 7380 7379 } … … 7385 7384 * (VMX_EXIT_ERR_MACHINE_CHECK). Error VM-exit. 7386 7385 */ 7387 static DECLCALLBACK(int) hmR0VmxExitErrMachineCheck(PVM pVM, PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient)7388 { 7389 AssertMsgFailed(("Unexpected machine-check event exit. pV M=%p pVCpu=%p pMixedCtx=%p\n", pVM, pVCpu, pMixedCtx));7386 static DECLCALLBACK(int) hmR0VmxExitErrMachineCheck(PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient) 7387 { 7388 AssertMsgFailed(("Unexpected machine-check event exit. pVCpu=%p pMixedCtx=%p\n", pVCpu, pMixedCtx)); 7390 7389 return VERR_VMX_UNEXPECTED_EXIT_CODE; 7391 7390 } … … 7396 7395 * theory. 7397 7396 */ 7398 static DECLCALLBACK(int) hmR0VmxExitErrUndefined(PVM pVM, PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient) 7399 { 7400 AssertMsgFailed(("Huh!? Undefined VM-exit reason %d. pVM=%p pVCpu=%p pMixedCtx=%p\n", pVmxTransient->uExitReason, 7401 pVM, pVCpu, pMixedCtx)); 7397 static DECLCALLBACK(int) hmR0VmxExitErrUndefined(PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient) 7398 { 7399 AssertMsgFailed(("Huh!? Undefined VM-exit reason %d. pVCpu=%p pMixedCtx=%p\n", pVmxTransient->uExitReason, pVCpu, pMixedCtx)); 7402 7400 return VERR_VMX_UNDEFINED_EXIT_CODE; 7403 7401 } … … 7409 7407 * Conditional VM-exit. 7410 7408 */ 7411 static DECLCALLBACK(int) hmR0VmxExitXdtrAccess(PVM pVM, PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient)7409 static DECLCALLBACK(int) hmR0VmxExitXdtrAccess(PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient) 7412 7410 { 7413 7411 VMX_VALIDATE_EXIT_HANDLER_PARAMS(); … … 7416 7414 if (pVCpu->hm.s.vmx.u32ProcCtls2 & VMX_VMCS_CTRL_PROC_EXEC2_DESCRIPTOR_TABLE_EXIT) 7417 7415 return VERR_EM_INTERPRETER; 7418 AssertMsgFailed(("Unexpected XDTR access. pV M=%p pVCpu=%p pMixedCtx=%p\n", pVM, pVCpu, pMixedCtx));7416 AssertMsgFailed(("Unexpected XDTR access. pVCpu=%p pMixedCtx=%p\n", pVCpu, pMixedCtx)); 7419 7417 return VERR_VMX_UNEXPECTED_EXIT_CODE; 7420 7418 } … … 7424 7422 * VM-exit handler for RDRAND (VMX_EXIT_RDRAND). Conditional VM-exit. 7425 7423 */ 7426 static DECLCALLBACK(int) hmR0VmxExitRdrand(PVM pVM, PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient)7424 static DECLCALLBACK(int) hmR0VmxExitRdrand(PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient) 7427 7425 { 7428 7426 VMX_VALIDATE_EXIT_HANDLER_PARAMS(); … … 7431 7429 if (pVCpu->hm.s.vmx.u32ProcCtls2 & VMX_VMCS_CTRL_PROC_EXEC2_RDRAND_EXIT) 7432 7430 return VERR_EM_INTERPRETER; 7433 AssertMsgFailed(("Unexpected RDRAND exit. pV M=%p pVCpu=%p pMixedCtx=%p\n", pVM, pVCpu, pMixedCtx));7431 AssertMsgFailed(("Unexpected RDRAND exit. pVCpu=%p pMixedCtx=%p\n", pVCpu, pMixedCtx)); 7434 7432 return VERR_VMX_UNEXPECTED_EXIT_CODE; 7435 7433 } … … 7439 7437 * VM-exit handler for RDMSR (VMX_EXIT_RDMSR). 7440 7438 */ 7441 static DECLCALLBACK(int) hmR0VmxExitRdmsr(PVM pVM, PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient)7439 static DECLCALLBACK(int) hmR0VmxExitRdmsr(PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient) 7442 7440 { 7443 7441 VMX_VALIDATE_EXIT_HANDLER_PARAMS(); … … 7448 7446 AssertRCReturn(rc, rc); 7449 7447 7448 PVM pVM = pVCpu->CTX_SUFF(pVM); 7450 7449 rc = EMInterpretRdmsr(pVM, pVCpu, CPUMCTX2CORE(pMixedCtx)); 7451 7450 AssertMsg(rc == VINF_SUCCESS || rc == VERR_EM_INTERPRETER, … … 7466 7465 * VM-exit handler for WRMSR (VMX_EXIT_WRMSR). 7467 7466 */ 7468 static DECLCALLBACK(int) hmR0VmxExitWrmsr(PVM pVM, PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient)7467 static DECLCALLBACK(int) hmR0VmxExitWrmsr(PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient) 7469 7468 { 7470 7469 VMX_VALIDATE_EXIT_HANDLER_PARAMS(); 7471 7470 int rc = VINF_SUCCESS; 7471 PVM pVM = pVCpu->CTX_SUFF(pVM); 7472 7472 7473 /* If TPR patching is active, LSTAR holds the guest TPR, writes to it must be propagated to the APIC. */ 7473 7474 if ( pVM->hm.s.fTPRPatchingActive … … 7551 7552 * VM-exit handler for PAUSE (VMX_EXIT_PAUSE). Conditional VM-exit. 7552 7553 */ 7553 static DECLCALLBACK(int) hmR0VmxExitPause(PVM pVM, PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient)7554 static DECLCALLBACK(int) hmR0VmxExitPause(PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient) 7554 7555 { 7555 7556 VMX_VALIDATE_EXIT_HANDLER_PARAMS(); … … 7558 7559 if (pVCpu->hm.s.vmx.u32ProcCtls & VMX_VMCS_CTRL_PROC_EXEC_CONTROLS_PAUSE_EXIT) 7559 7560 return VERR_EM_INTERPRETER; 7560 AssertMsgFailed(("Unexpected PAUSE exit. pV M=%p pVCpu=%p pMixedCtx=%p\n", pVM, pVCpu, pMixedCtx));7561 AssertMsgFailed(("Unexpected PAUSE exit. pVCpu=%p pMixedCtx=%p\n", pVCpu, pMixedCtx)); 7561 7562 return VERR_VMX_UNEXPECTED_EXIT_CODE; 7562 7563 } … … 7567 7568 * threshold (VMX_EXIT_TPR_BELOW_THRESHOLD). Conditional VM-exit. 7568 7569 */ 7569 static DECLCALLBACK(int) hmR0VmxExitTprBelowThreshold(PVM pVM, PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient)7570 static DECLCALLBACK(int) hmR0VmxExitTprBelowThreshold(PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient) 7570 7571 { 7571 7572 VMX_VALIDATE_EXIT_HANDLER_PARAMS(); … … 7593 7594 * recompiler. 7594 7595 */ 7595 static DECLCALLBACK(int) hmR0VmxExitMovCRx(PVM pVM, PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient)7596 static DECLCALLBACK(int) hmR0VmxExitMovCRx(PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient) 7596 7597 { 7597 7598 VMX_VALIDATE_EXIT_HANDLER_PARAMS(); … … 7601 7602 const RTGCUINTPTR uExitQualification = pVmxTransient->uExitQualification; 7602 7603 const uint32_t uAccessType = VMX_EXIT_QUALIFICATION_CRX_ACCESS(uExitQualification); 7604 PVM pVM = pVCpu->CTX_SUFF(pVM); 7603 7605 switch (uAccessType) 7604 7606 { … … 7721 7723 * VM-exit. 7722 7724 */ 7723 static DECLCALLBACK(int) hmR0VmxExitIoInstr(PVM pVM, PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient)7725 static DECLCALLBACK(int) hmR0VmxExitIoInstr(PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient) 7724 7726 { 7725 7727 VMX_VALIDATE_EXIT_HANDLER_PARAMS(); … … 7748 7750 const uint32_t cbSize = s_aIOSize[uIOWidth]; 7749 7751 const uint32_t cbInstr = pVmxTransient->cbInstr; 7752 PVM pVM = pVCpu->CTX_SUFF(pVM); 7750 7753 if (fIOString) 7751 7754 { … … 7858 7861 7859 7862 /* Inject #DB and get on with guest execution. */ 7860 rc = hmR0VmxInjectXcptDB(pV M, pVCpu, pMixedCtx);7863 rc = hmR0VmxInjectXcptDB(pVCpu, pMixedCtx); 7861 7864 AssertRCReturn(rc, rc); 7862 7865 break; … … 7890 7893 * VM-exit. 7891 7894 */ 7892 static DECLCALLBACK(int) hmR0VmxExitTaskSwitch(PVM pVM, PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient)7895 static DECLCALLBACK(int) hmR0VmxExitTaskSwitch(PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient) 7893 7896 { 7894 7897 VMX_VALIDATE_EXIT_HANDLER_PARAMS(); … … 7930 7933 * VM-exit handler for monitor-trap-flag (VMX_EXIT_MTF). Conditional VM-exit. 7931 7934 */ 7932 static DECLCALLBACK(int) hmR0VmxExitMtf(PVM pVM, PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient)7935 static DECLCALLBACK(int) hmR0VmxExitMtf(PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient) 7933 7936 { 7934 7937 VMX_VALIDATE_EXIT_HANDLER_PARAMS(); … … 7945 7948 * VM-exit handler for APIC access (VMX_EXIT_APIC_ACCESS). Conditional VM-exit. 7946 7949 */ 7947 static DECLCALLBACK(int) hmR0VmxExitApicAccess(PVM pVM, PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient)7950 static DECLCALLBACK(int) hmR0VmxExitApicAccess(PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient) 7948 7951 { 7949 7952 VMX_VALIDATE_EXIT_HANDLER_PARAMS(); … … 7951 7954 7952 7955 /* If this VM-exit occurred while delivering an event through the guest IDT, handle it accordingly. */ 7953 rc = hmR0VmxCheckExitDueToEventDelivery(pV M, pVCpu, pMixedCtx, pVmxTransient);7956 rc = hmR0VmxCheckExitDueToEventDelivery(pVCpu, pMixedCtx, pVmxTransient); 7954 7957 if (RT_UNLIKELY(rc == VINF_VMX_DOUBLE_FAULT)) 7955 7958 return VINF_SUCCESS; … … 7985 7988 GCPhys &= PAGE_BASE_GC_MASK; 7986 7989 GCPhys += VMX_EXIT_QUALIFICATION_APIC_ACCESS_OFFSET(pVmxTransient->uExitQualification); 7987 VBOXSTRICTRC rc2 = IOMMMIOPhysHandler(pVM, pVCpu, (uAccessType == VMX_APIC_ACCESS_TYPE_LINEAR_READ) ? 0 : X86_TRAP_PF_RW, 7990 PVM pVM = pVCpu->CTX_SUFF(pVM); 7991 VBOXSTRICTRC rc2 = IOMMMIOPhysHandler(pVM, pVCpu, 7992 (uAccessType == VMX_APIC_ACCESS_TYPE_LINEAR_READ) ? 0 : X86_TRAP_PF_RW, 7988 7993 CPUMCTX2CORE(pMixedCtx), GCPhys); 7989 7994 rc = VBOXSTRICTRC_VAL(rc2); … … 8015 8020 * VM-exit. 8016 8021 */ 8017 static DECLCALLBACK(int) hmR0VmxExitMovDRx(PVM pVM, PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient)8022 static DECLCALLBACK(int) hmR0VmxExitMovDRx(PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient) 8018 8023 { 8019 8024 VMX_VALIDATE_EXIT_HANDLER_PARAMS(); … … 8022 8027 if (CPUMIsGuestDebugStateActive(pVCpu)) 8023 8028 { 8024 AssertMsgFailed(("Unexpected MOV DRx exit. pV M=%p pVCpu=%p pMixedCtx=%p\n", pVM, pVCpu, pMixedCtx));8029 AssertMsgFailed(("Unexpected MOV DRx exit. pVCpu=%p pMixedCtx=%p\n", pVCpu, pMixedCtx)); 8025 8030 return VERR_VMX_UNEXPECTED_EXIT_CODE; 8026 8031 } … … 8038 8043 8039 8044 /* Save the host & load the guest debug state, restart execution of the MOV DRx instruction. */ 8045 PVM pVM = pVCpu->CTX_SUFF(pVM); 8040 8046 rc = CPUMR0LoadGuestDebugState(pVM, pVCpu, pMixedCtx, true /* include DR6 */); 8041 8047 AssertRC(rc); … … 8064 8070 AssertRCReturn(rc, rc); 8065 8071 8072 PVM pVM = pVCpu->CTX_SUFF(pVM); 8066 8073 if (VMX_EXIT_QUALIFICATION_DRX_DIRECTION(pVmxTransient->uExitQualification) == VMX_EXIT_QUALIFICATION_DRX_DIRECTION_WRITE) 8067 8074 { … … 8095 8102 * Conditional VM-exit. 8096 8103 */ 8097 static DECLCALLBACK(int) hmR0VmxExitEptMisconfig(PVM pVM, PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient)8104 static DECLCALLBACK(int) hmR0VmxExitEptMisconfig(PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient) 8098 8105 { 8099 8106 VMX_VALIDATE_EXIT_HANDLER_PARAMS(); 8100 Assert(pV M->hm.s.fNestedPaging);8107 Assert(pVCpu->CTX_SUFF(pVM)->hm.s.fNestedPaging); 8101 8108 8102 8109 /* If this VM-exit occurred while delivering an event through the guest IDT, handle it accordingly. */ 8103 int rc = hmR0VmxCheckExitDueToEventDelivery(pV M, pVCpu, pMixedCtx, pVmxTransient);8110 int rc = hmR0VmxCheckExitDueToEventDelivery(pVCpu, pMixedCtx, pVmxTransient); 8104 8111 if (RT_UNLIKELY(rc == VINF_VMX_DOUBLE_FAULT)) 8105 8112 return VINF_SUCCESS; … … 8127 8134 * weird case. See @bugref{6043}. 8128 8135 */ 8136 PVM pVM = pVCpu->CTX_SUFF(pVM); 8129 8137 VBOXSTRICTRC rc2 = PGMR0Trap0eHandlerNPMisconfig(pVM, pVCpu, PGMMODE_EPT, CPUMCTX2CORE(pMixedCtx), GCPhys, UINT32_MAX); 8130 8138 Log(("EPT misconfig at %#RX64 RIP=%#RX64 rc=%d\n", GCPhys, pMixedCtx->rip, rc)); … … 8146 8154 * VM-exit. 8147 8155 */ 8148 static DECLCALLBACK(int) hmR0VmxExitEptViolation(PVM pVM, PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient)8156 static DECLCALLBACK(int) hmR0VmxExitEptViolation(PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient) 8149 8157 { 8150 8158 VMX_VALIDATE_EXIT_HANDLER_PARAMS(); 8151 Assert(pV M->hm.s.fNestedPaging);8159 Assert(pVCpu->CTX_SUFF(pVM)->hm.s.fNestedPaging); 8152 8160 8153 8161 /* If this VM-exit occurred while delivering an event through the guest IDT, handle it accordingly. */ 8154 int rc = hmR0VmxCheckExitDueToEventDelivery(pV M, pVCpu, pMixedCtx, pVmxTransient);8162 int rc = hmR0VmxCheckExitDueToEventDelivery(pVCpu, pMixedCtx, pVmxTransient); 8155 8163 if (RT_UNLIKELY(rc == VINF_VMX_DOUBLE_FAULT)) 8156 8164 return VINF_SUCCESS; … … 8190 8198 8191 8199 /* Handle the pagefault trap for the nested shadow table. */ 8200 PVM pVM = pVCpu->CTX_SUFF(pVM); 8192 8201 rc = PGMR0Trap0eHandlerNestedPaging(pVM, pVCpu, PGMMODE_EPT, uErrorCode, CPUMCTX2CORE(pMixedCtx), GCPhys); 8193 8202 TRPMResetTrap(pVCpu); … … 8216 8225 * VM-exit exception handler for #MF (Math Fault: floating point exception). 8217 8226 */ 8218 static DECLCALLBACK(int) hmR0VmxExitXcptMF(PVM pVM, PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient)8227 static DECLCALLBACK(int) hmR0VmxExitXcptMF(PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient) 8219 8228 { 8220 8229 VMX_VALIDATE_EXIT_XCPT_HANDLER_PARAMS(); … … 8230 8239 return VERR_EM_INTERPRETER; 8231 8240 } 8232 rc = hmR0VmxInjectEventVmcs(pV M, pVCpu, pMixedCtx,8241 rc = hmR0VmxInjectEventVmcs(pVCpu, pMixedCtx, 8233 8242 VMX_VMCS_CTRL_ENTRY_IRQ_INFO_FROM_EXIT_INT_INFO(pVmxTransient->uExitIntrInfo), 8234 8243 pVmxTransient->cbInstr, pVmxTransient->uExitIntrErrorCode); … … 8241 8250 * VM-exit exception handler for #BP (Breakpoint exception). 8242 8251 */ 8243 static DECLCALLBACK(int) hmR0VmxExitXcptBP(PVM pVM, PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient)8252 static DECLCALLBACK(int) hmR0VmxExitXcptBP(PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient) 8244 8253 { 8245 8254 VMX_VALIDATE_EXIT_XCPT_HANDLER_PARAMS(); … … 8251 8260 STAM_COUNTER_INC(&pVCpu->hm.s.StatExitGuestBP); 8252 8261 8262 PVM pVM = pVCpu->CTX_SUFF(pVM); 8253 8263 rc = DBGFRZTrap03Handler(pVM, pVCpu, CPUMCTX2CORE(pMixedCtx)); 8254 8264 if (rc == VINF_EM_RAW_GUEST_TRAP) … … 8259 8269 AssertRCReturn(rc, rc); 8260 8270 8261 rc = hmR0VmxInjectEventVmcs(pV M, pVCpu, pMixedCtx,8271 rc = hmR0VmxInjectEventVmcs(pVCpu, pMixedCtx, 8262 8272 VMX_VMCS_CTRL_ENTRY_IRQ_INFO_FROM_EXIT_INT_INFO(pVmxTransient->uExitIntrInfo), 8263 8273 pVmxTransient->cbInstr, pVmxTransient->uExitIntrErrorCode); … … 8273 8283 * VM-exit exception handler for #DB (Debug exception). 8274 8284 */ 8275 static DECLCALLBACK(int) hmR0VmxExitXcptDB(PVM pVM, PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient)8285 static DECLCALLBACK(int) hmR0VmxExitXcptDB(PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient) 8276 8286 { 8277 8287 VMX_VALIDATE_EXIT_XCPT_HANDLER_PARAMS(); … … 8286 8296 uDR6 |= (pVmxTransient->uExitQualification 8287 8297 & (X86_DR6_B0 | X86_DR6_B1 | X86_DR6_B2 | X86_DR6_B3 | X86_DR6_BD | X86_DR6_BS)); 8298 PVM pVM = pVCpu->CTX_SUFF(pVM); 8288 8299 rc = DBGFRZTrap01Handler(pVM, pVCpu, CPUMCTX2CORE(pMixedCtx), uDR6); 8289 8300 STAM_COUNTER_INC(&pVCpu->hm.s.StatExitGuestDB); … … 8310 8321 rc |= hmR0VmxReadExitInstrLenVmcs(pVCpu, pVmxTransient); 8311 8322 rc |= hmR0VmxReadExitIntrErrorCodeVmcs(pVCpu, pVmxTransient); 8312 rc |= hmR0VmxInjectEventVmcs(pV M, pVCpu, pMixedCtx,8313 VMX_VMCS_CTRL_ENTRY_IRQ_INFO_FROM_EXIT_INT_INFO(pVmxTransient->uExitIntrInfo),8314 pVmxTransient->cbInstr, pVmxTransient->uExitIntrErrorCode);8323 rc |= hmR0VmxInjectEventVmcs(pVCpu, pMixedCtx, 8324 VMX_VMCS_CTRL_ENTRY_IRQ_INFO_FROM_EXIT_INT_INFO(pVmxTransient->uExitIntrInfo), 8325 pVmxTransient->cbInstr, pVmxTransient->uExitIntrErrorCode); 8315 8326 AssertRCReturn(rc,rc); 8316 8327 return rc; … … 8325 8336 * point exception). 8326 8337 */ 8327 static DECLCALLBACK(int) hmR0VmxExitXcptNM(PVM pVM, PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient)8338 static DECLCALLBACK(int) hmR0VmxExitXcptNM(PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient) 8328 8339 { 8329 8340 VMX_VALIDATE_EXIT_XCPT_HANDLER_PARAMS(); … … 8338 8349 8339 8350 /* Lazy FPU loading; Load the guest-FPU state transparently and continue execution of the guest. */ 8351 PVM pVM = pVCpu->CTX_SUFF(pVM); 8340 8352 rc = CPUMR0LoadGuestFPU(pVM, pVCpu, pMixedCtx); 8341 8353 if (rc == VINF_SUCCESS) … … 8351 8363 rc = hmR0VmxReadExitIntrInfoVmcs(pVCpu, pVmxTransient); 8352 8364 AssertRCReturn(rc, rc); 8353 rc = hmR0VmxInjectEventVmcs(pV M, pVCpu, pMixedCtx,8354 8355 8365 rc = hmR0VmxInjectEventVmcs(pVCpu, pMixedCtx, 8366 VMX_VMCS_CTRL_ENTRY_IRQ_INFO_FROM_EXIT_INT_INFO(pVmxTransient->uExitIntrInfo), 8367 pVmxTransient->cbInstr, 0 /* error code */); 8356 8368 AssertRCReturn(rc, rc); 8357 8369 STAM_COUNTER_INC(&pVCpu->hm.s.StatExitGuestNM); … … 8365 8377 * @remarks Requires pVmxTransient->uExitIntrInfo to be up-to-date. 8366 8378 */ 8367 static DECLCALLBACK(int) hmR0VmxExitXcptGP(PVM pVM, PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient)8379 static DECLCALLBACK(int) hmR0VmxExitXcptGP(PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient) 8368 8380 { 8369 8381 VMX_VALIDATE_EXIT_XCPT_HANDLER_PARAMS(); … … 8380 8392 rc |= hmR0VmxSaveGuestRip(pVCpu, pMixedCtx); 8381 8393 Log(("#GP Gst: RIP %#RX64\n", pMixedCtx->rip)); 8382 rc |= hmR0VmxInjectEventVmcs(pV M, pVCpu, pMixedCtx,8383 8384 8394 rc |= hmR0VmxInjectEventVmcs(pVCpu, pMixedCtx, 8395 VMX_VMCS_CTRL_ENTRY_IRQ_INFO_FROM_EXIT_INT_INFO(pVmxTransient->uExitIntrInfo), 8396 pVmxTransient->cbInstr, pVmxTransient->uExitIntrErrorCode); 8385 8397 AssertRCReturn(rc, rc); 8386 8398 return rc; … … 8393 8405 8394 8406 Assert(CPUMIsGuestInRealModeEx(pMixedCtx)); 8395 Assert(!pV M->hm.s.vmx.fUnrestrictedGuest);8407 Assert(!pVCpu->CTX_SUFF(pVM)->hm.s.vmx.fUnrestrictedGuest); 8396 8408 8397 8409 /* EMInterpretDisasCurrent() requires a lot of the state, save the entire state. */ … … 8401 8413 PDISCPUSTATE pDis = &pVCpu->hm.s.DisState; 8402 8414 unsigned int cbOp = 0; 8415 PVM pVM = pVCpu->CTX_SUFF(pVM); 8403 8416 rc = EMInterpretDisasCurrent(pVM, pVCpu, pDis, &cbOp); 8404 8417 if (RT_SUCCESS(rc)) … … 8561 8574 { 8562 8575 uint16_t uVector = pDis->Param1.uValue & 0xff; 8563 rc = hmR0VmxInjectIntN(pV M, pVCpu, pMixedCtx, uVector, pDis->cbInstr);8576 rc = hmR0VmxInjectIntN(pVCpu, pMixedCtx, uVector, pDis->cbInstr); 8564 8577 AssertRCReturn(rc, rc); 8565 8578 STAM_COUNTER_INC(&pVCpu->hm.s.StatExitInt); … … 8571 8584 if (pMixedCtx->eflags.Bits.u1OF) 8572 8585 { 8573 rc = hmR0VmxInjectXcptOF(pV M, pVCpu, pMixedCtx, pDis->cbInstr);8586 rc = hmR0VmxInjectXcptOF(pVCpu, pMixedCtx, pDis->cbInstr); 8574 8587 STAM_COUNTER_INC(&pVCpu->hm.s.StatExitInt); 8575 8588 } … … 8605 8618 * VMX transient structure to be up-to-date. 8606 8619 */ 8607 static DECLCALLBACK(int) hmR0VmxExitXcptGeneric(PVM pVM, PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient)8620 static DECLCALLBACK(int) hmR0VmxExitXcptGeneric(PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient) 8608 8621 { 8609 8622 VMX_VALIDATE_EXIT_XCPT_HANDLER_PARAMS(); … … 8611 8624 /* Re-inject the exception into the guest. This cannot be a double-fault condition which would have been handled in 8612 8625 hmR0VmxCheckExitDueToEventDelivery(). */ 8613 int rc = hmR0VmxInjectEventVmcs(pV M, pVCpu, pMixedCtx,8626 int rc = hmR0VmxInjectEventVmcs(pVCpu, pMixedCtx, 8614 8627 VMX_VMCS_CTRL_ENTRY_IRQ_INFO_FROM_EXIT_INT_INFO(pVmxTransient->uExitIntrInfo), 8615 8628 pVmxTransient->cbInstr, pVmxTransient->uExitIntrErrorCode); … … 8622 8635 * VM-exit exception handler for #PF (Page-fault exception). 8623 8636 */ 8624 static DECLCALLBACK(int) hmR0VmxExitXcptPF(PVM pVM, PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient)8637 static DECLCALLBACK(int) hmR0VmxExitXcptPF(PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient) 8625 8638 { 8626 8639 VMX_VALIDATE_EXIT_XCPT_HANDLER_PARAMS(); 8627 8640 PVM pVM = pVCpu->CTX_SUFF(pVM); 8628 8641 int rc = hmR0VmxReadExitQualificationVmcs(pVCpu, pVmxTransient); 8629 8642 rc |= hmR0VmxReadExitIntrInfoVmcs(pVCpu, pVmxTransient); … … 8638 8651 { 8639 8652 pMixedCtx->cr2 = pVmxTransient->uExitQualification; 8640 rc = hmR0VmxInjectEventVmcs(pV M, pVCpu, pMixedCtx,8653 rc = hmR0VmxInjectEventVmcs(pVCpu, pMixedCtx, 8641 8654 VMX_VMCS_CTRL_ENTRY_IRQ_INFO_FROM_EXIT_INT_INFO(pVmxTransient->uExitIntrInfo), 8642 8655 pVmxTransient->cbInstr, pVmxTransient->uExitIntrErrorCode); … … 8647 8660 /* A guest page-fault occurred during delivery of a page-fault. Inject #DF. */ 8648 8661 Assert(!pVCpu->hm.s.Event.fPending); 8649 rc = hmR0VmxInjectXcptDF(pV M, pVCpu, pMixedCtx);8662 rc = hmR0VmxInjectXcptDF(pVCpu, pMixedCtx); 8650 8663 } 8651 8664 STAM_COUNTER_INC(&pVCpu->hm.s.StatExitGuestPF); … … 8720 8733 TRPMResetTrap(pVCpu); 8721 8734 pMixedCtx->cr2 = pVmxTransient->uExitQualification; 8722 rc = hmR0VmxInjectEventVmcs(pV M, pVCpu, pMixedCtx,8735 rc = hmR0VmxInjectEventVmcs(pVCpu, pMixedCtx, 8723 8736 VMX_VMCS_CTRL_ENTRY_IRQ_INFO_FROM_EXIT_INT_INFO(pVmxTransient->uExitIntrInfo), 8724 8737 pVmxTransient->cbInstr, uGstErrorCode); … … 8731 8744 TRPMResetTrap(pVCpu); 8732 8745 Log(("#PF: Injecting #DF\n")); 8733 rc = hmR0VmxInjectXcptDF(pV M, pVCpu, pMixedCtx);8746 rc = hmR0VmxInjectXcptDF(pVCpu, pMixedCtx); 8734 8747 } 8735 8748 STAM_COUNTER_INC(&pVCpu->hm.s.StatExitGuestPF);
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