- Timestamp:
- Apr 13, 2013 4:16:43 PM (12 years ago)
- Location:
- trunk/src/VBox/VMM
- Files:
-
- 2 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/VMM/VMMAll/TRPMAll.cpp
r45531 r45534 129 129 { 130 130 AssertMsg(pVCpu->trpm.s.uActiveVector != ~0U, ("No active trap!\n")); 131 AssertMsg(pVCpu->trpm.s.uActiveVector == 0xe, ("Not trap 0e!\n"));131 AssertMsg(pVCpu->trpm.s.uActiveVector == X86_XCPT_PF, ("Not page-fault trap!\n")); 132 132 return pVCpu->trpm.s.uActiveCR2; 133 133 } … … 149 149 return pVCpu->trpm.s.cbInstr; 150 150 } 151 152 151 153 152 … … 264 263 switch (pVCpu->trpm.s.uActiveVector) 265 264 { 266 case 0x0a: case 0x0b: case 0x0c: case 0x0d: case 0x0e:265 case X86_XCPT_TS: case X86_XCPT_NP: case X86_XCPT_SS: case X86_XCPT_GP: case X86_XCPT_PF: 267 266 AssertMsg(uErrorCode != ~(RTGCUINT)0, ("Invalid uErrorCode=%#x u8TrapNo=%d\n", uErrorCode, pVCpu->trpm.s.uActiveVector)); 268 267 break; 269 case 0x11: case 0x08:268 case X86_XCPT_AC: case X86_XCPT_DF: 270 269 AssertMsg(uErrorCode == 0, ("Invalid uErrorCode=%#x u8TrapNo=%d\n", uErrorCode, pVCpu->trpm.s.uActiveVector)); 271 270 break; -
trunk/src/VBox/VMM/VMMR0/HMVMXR0.cpp
r45532 r45534 5874 5874 const bool fBlockSti = (uIntrState & VMX_VMCS_GUEST_INTERRUPTIBILITY_STATE_BLOCK_STI); 5875 5875 5876 Assert(!fBlockSti || (pVCpu->hm.s.vmx.fUpdatedGuestState & VMX_UPDATED_GUEST_RFLAGS)); 5877 Assert(!fBlockSti || pMixedCtx->eflags.Bits.u1IF); /* Cannot set block-by-STI when interrupts are disabled. */ 5878 5876 5879 int rc = VINF_SUCCESS; 5877 5880 if (pVCpu->hm.s.Event.fPending) /* First, inject any pending HM events. */ … … 5957 5960 5958 5961 /* 5959 * There's no need to clear the entry-interruption information field here if we're not injecting anything.5962 * There's no need to clear the VM entry-interruption information field here if we're not injecting anything. 5960 5963 * VT-x clears the valid bit on every VM-exit. See Intel spec. 24.8.3 "VM-Entry Controls for Event Injection". 5961 5964 */ … … 6273 6276 6274 6277 /* Validate. */ 6275 Assert(VMX_EXIT_INTERRUPTION_INFO_VALID(u32IntrInfo)); 6276 Assert(!VMX_EXIT_INTERRUPTION_INFO_NMI_UNBLOCK(u32IntrInfo)); 6277 Assert(!(u32IntrInfo & 0x7ffff000)); 6278 Assert(VMX_EXIT_INTERRUPTION_INFO_VALID(u32IntrInfo)); /* Bit 31 (Valid bit) must be set by caller. */ 6279 Assert(!VMX_EXIT_INTERRUPTION_INFO_NMI_UNBLOCK(u32IntrInfo)); /* Bit 12 MBZ. */ 6280 Assert(!(u32IntrInfo & 0x7ffff000)); /* Bits 30:12 MBZ. */ 6278 6281 6279 6282 /* Inject. */
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