Changeset 45647 in vbox
- Timestamp:
- Apr 19, 2013 1:50:31 PM (12 years ago)
- File:
-
- 1 edited
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trunk/src/VBox/VMM/VMMR0/HMVMXR0.cpp
r45641 r45647 5833 5833 { 5834 5834 /* Get the current interruptibility-state of the guest and then figure out what can be injected. */ 5835 uint32_t uIntrState 5836 const bool fBlockMovSS= !!(uIntrState & VMX_VMCS_GUEST_INTERRUPTIBILITY_STATE_BLOCK_MOVSS);5837 const bool fBlockSti= !!(uIntrState & VMX_VMCS_GUEST_INTERRUPTIBILITY_STATE_BLOCK_STI);5835 uint32_t uIntrState = hmR0VmxGetGuestIntrState(pVCpu, pMixedCtx); 5836 bool fBlockMovSS = !!(uIntrState & VMX_VMCS_GUEST_INTERRUPTIBILITY_STATE_BLOCK_MOVSS); 5837 bool fBlockSti = !!(uIntrState & VMX_VMCS_GUEST_INTERRUPTIBILITY_STATE_BLOCK_STI); 5838 5838 5839 5839 Assert(!fBlockSti || (pVCpu->hm.s.vmx.fUpdatedGuestState & HMVMX_UPDATED_GUEST_RFLAGS)); … … 5931 5931 */ 5932 5932 int rc2 = hmR0VmxLoadGuestIntrState(pVCpu, uIntrState); 5933 5934 /* 5935 * Delivery pending debug exception if the guest is single-stepping. The interruptibility-state could have been changed by 5936 * hmR0VmxInjectEventVmcs() (e.g. real-on-v86 injecting software interrupts), re-evaluate it and set the BS bit. 5937 */ 5938 fBlockMovSS = !!(uIntrState & VMX_VMCS_GUEST_INTERRUPTIBILITY_STATE_BLOCK_MOVSS); 5939 fBlockSti = !!(uIntrState & VMX_VMCS_GUEST_INTERRUPTIBILITY_STATE_BLOCK_STI); 5940 if ( fBlockSti 5941 || fBlockMovSS) 5942 { 5943 Assert(pVCpu->hm.s.vmx.fUpdatedGuestState & HMVMX_UPDATED_GUEST_RFLAGS); 5944 if (pMixedCtx->eflags.Bits.u1TF) /* We don't have any IA32_DEBUGCTL MSR for guests. Treat as all bits 0. */ 5945 { 5946 /* This field is cleared on all VM-exits except (VMX_EXIT_TPR_BELOW_THRESHOLD, VMX_EXIT_APIC_WRITE, 5947 VMX_EXIT_VIRTUALIZED_EOI, VMX_EXIT_MTF). See Intel spec. 27.3.4 "Saving Non-Register State". */ 5948 rc2 |= VMXWriteVmcsGstN(VMX_VMCS_GUEST_PENDING_DEBUG_EXCEPTIONS, VMX_VMCS_GUEST_DEBUG_EXCEPTIONS_BS); 5949 } 5950 } 5951 5933 5952 AssertRC(rc2); 5934 5953 Assert(rc == VINF_SUCCESS || rc == VINF_EM_RESET);
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