Changeset 45728 in vbox for trunk/src/VBox/VMM/VMMR3
- Timestamp:
- Apr 25, 2013 12:08:17 PM (12 years ago)
- Location:
- trunk/src/VBox/VMM/VMMR3
- Files:
-
- 3 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/VMM/VMMR3/EMHM.cpp
r45701 r45728 501 501 */ 502 502 #ifdef VBOX_WITH_RAW_MODE 503 /** @todo change this FF hack into an assertion, they simply SHALL NOT be set in504 * HM mode. */505 503 Assert(!VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_SELM_SYNC_TSS | VMCPU_FF_SELM_SYNC_GDT | VMCPU_FF_SELM_SYNC_LDT)); 506 VMCPU_FF_CLEAR(pVCpu, (VMCPU_FF_SELM_SYNC_GDT | VMCPU_FF_SELM_SYNC_LDT | VMCPU_FF_TRPM_SYNC_IDT | VMCPU_FF_SELM_SYNC_TSS)); /* not relevant in HM mode; shouldn't be set really. */507 504 #endif 508 505 if ( VM_FF_ISPENDING(pVM, VM_FF_HIGH_PRIORITY_PRE_RAW_MASK) -
trunk/src/VBox/VMM/VMMR3/HM.cpp
r45714 r45728 837 837 static void hmR3DisableRawMode(PVM pVM) 838 838 { 839 #ifdef VBOX_WITH_RAW_MODE840 /* Turn off IDT/LDT/GDT and TSS monitoring and sycing. */841 TRPMR3DisableMonitoring(pVM);842 #endif843 844 839 /* Disable mapping of the hypervisor into the shadow page table. */ 845 840 PGMR3MappingsDisable(pVM); -
trunk/src/VBox/VMM/VMMR3/TRPM.cpp
r45618 r45728 476 476 pVCpu->trpm.s.offVM = RT_OFFSETOF(VM, aCpus[i].trpm); 477 477 pVCpu->trpm.s.offVMCpu = RT_OFFSETOF(VMCPU, trpm); 478 pVCpu->trpm.s.uActiveVector = ~0 ;478 pVCpu->trpm.s.uActiveVector = ~0U; 479 479 } 480 480 481 481 pVM->trpm.s.GuestIdtr.pIdt = RTRCPTR_MAX; 482 482 pVM->trpm.s.pvMonShwIdtRC = RTRCPTR_MAX; 483 pVM->trpm.s.fDisableMonitoring = false;484 483 pVM->trpm.s.fSafeToDropGuestIDTMonitoring = false; 485 484 … … 520 519 * Statistics. 521 520 */ 522 STAM_REG(pVM, &pVM->trpm.s.StatRCWriteGuestIDTFault, STAMTYPE_COUNTER, "/TRPM/RC/IDTWritesFault", STAMUNIT_OCCURENCES, "Guest IDT writes the we returned to R3 to handle."); 523 STAM_REG(pVM, &pVM->trpm.s.StatRCWriteGuestIDTHandled, STAMTYPE_COUNTER, "/TRPM/RC/IDTWritesHandled", STAMUNIT_OCCURENCES, "Guest IDT writes that we handled successfully."); 524 STAM_REG(pVM, &pVM->trpm.s.StatSyncIDT, STAMTYPE_PROFILE, "/PROF/TRPM/SyncIDT", STAMUNIT_TICKS_PER_CALL, "Profiling of TRPMR3SyncIDT()."); 525 526 /* traps */ 527 STAM_REG(pVM, &pVM->trpm.s.aStatGCTraps[0x00], STAMTYPE_PROFILE_ADV, "/TRPM/GC/Traps/00", STAMUNIT_TICKS_PER_CALL, "#DE - Divide error."); 528 STAM_REG(pVM, &pVM->trpm.s.aStatGCTraps[0x01], STAMTYPE_PROFILE_ADV, "/TRPM/GC/Traps/01", STAMUNIT_TICKS_PER_CALL, "#DB - Debug (single step and more)."); 529 //STAM_REG(pVM, &pVM->trpm.s.aStatGCTraps[0x02], STAMTYPE_PROFILE_ADV, "/TRPM/GC/Traps/02", STAMUNIT_TICKS_PER_CALL, "NMI"); 530 STAM_REG(pVM, &pVM->trpm.s.aStatGCTraps[0x03], STAMTYPE_PROFILE_ADV, "/TRPM/GC/Traps/03", STAMUNIT_TICKS_PER_CALL, "#BP - Breakpoint."); 531 STAM_REG(pVM, &pVM->trpm.s.aStatGCTraps[0x04], STAMTYPE_PROFILE_ADV, "/TRPM/GC/Traps/04", STAMUNIT_TICKS_PER_CALL, "#OF - Overflow."); 532 STAM_REG(pVM, &pVM->trpm.s.aStatGCTraps[0x05], STAMTYPE_PROFILE_ADV, "/TRPM/GC/Traps/05", STAMUNIT_TICKS_PER_CALL, "#BR - Bound range exceeded."); 533 STAM_REG(pVM, &pVM->trpm.s.aStatGCTraps[0x06], STAMTYPE_PROFILE_ADV, "/TRPM/GC/Traps/06", STAMUNIT_TICKS_PER_CALL, "#UD - Undefined opcode."); 534 STAM_REG(pVM, &pVM->trpm.s.aStatGCTraps[0x07], STAMTYPE_PROFILE_ADV, "/TRPM/GC/Traps/07", STAMUNIT_TICKS_PER_CALL, "#NM - Device not available (FPU)."); 535 //STAM_REG(pVM, &pVM->trpm.s.aStatGCTraps[0x08], STAMTYPE_PROFILE_ADV, "/TRPM/GC/Traps/08", STAMUNIT_TICKS_PER_CALL, "#DF - Double fault."); 536 STAM_REG(pVM, &pVM->trpm.s.aStatGCTraps[0x09], STAMTYPE_PROFILE_ADV, "/TRPM/GC/Traps/09", STAMUNIT_TICKS_PER_CALL, "#?? - Coprocessor segment overrun (obsolete)."); 537 STAM_REG(pVM, &pVM->trpm.s.aStatGCTraps[0x0a], STAMTYPE_PROFILE_ADV, "/TRPM/GC/Traps/0a", STAMUNIT_TICKS_PER_CALL, "#TS - Task switch fault."); 538 STAM_REG(pVM, &pVM->trpm.s.aStatGCTraps[0x0b], STAMTYPE_PROFILE_ADV, "/TRPM/GC/Traps/0b", STAMUNIT_TICKS_PER_CALL, "#NP - Segment not present."); 539 STAM_REG(pVM, &pVM->trpm.s.aStatGCTraps[0x0c], STAMTYPE_PROFILE_ADV, "/TRPM/GC/Traps/0c", STAMUNIT_TICKS_PER_CALL, "#SS - Stack segment fault."); 540 STAM_REG(pVM, &pVM->trpm.s.aStatGCTraps[0x0d], STAMTYPE_PROFILE_ADV, "/TRPM/GC/Traps/0d", STAMUNIT_TICKS_PER_CALL, "#GP - General protection fault."); 541 STAM_REG(pVM, &pVM->trpm.s.aStatGCTraps[0x0e], STAMTYPE_PROFILE_ADV, "/TRPM/GC/Traps/0e", STAMUNIT_TICKS_PER_CALL, "#PF - Page fault."); 542 //STAM_REG(pVM, &pVM->trpm.s.aStatGCTraps[0x0f], STAMTYPE_PROFILE_ADV, "/TRPM/GC/Traps/0f", STAMUNIT_TICKS_PER_CALL, "Reserved."); 543 STAM_REG(pVM, &pVM->trpm.s.aStatGCTraps[0x10], STAMTYPE_PROFILE_ADV, "/TRPM/GC/Traps/10", STAMUNIT_TICKS_PER_CALL, "#MF - Math fault.."); 544 STAM_REG(pVM, &pVM->trpm.s.aStatGCTraps[0x11], STAMTYPE_PROFILE_ADV, "/TRPM/GC/Traps/11", STAMUNIT_TICKS_PER_CALL, "#AC - Alignment check."); 545 STAM_REG(pVM, &pVM->trpm.s.aStatGCTraps[0x12], STAMTYPE_PROFILE_ADV, "/TRPM/GC/Traps/12", STAMUNIT_TICKS_PER_CALL, "#MC - Machine check."); 546 STAM_REG(pVM, &pVM->trpm.s.aStatGCTraps[0x13], STAMTYPE_PROFILE_ADV, "/TRPM/GC/Traps/13", STAMUNIT_TICKS_PER_CALL, "#XF - SIMD Floating-Point Exception."); 547 548 #ifdef VBOX_WITH_STATISTICS 521 #ifdef VBOX_WITH_RAW_MODE 522 if (!HMIsEnabled(pVM)) 523 { 524 STAM_REG(pVM, &pVM->trpm.s.StatRCWriteGuestIDTFault, STAMTYPE_COUNTER, "/TRPM/RC/IDTWritesFault", STAMUNIT_OCCURENCES, "Guest IDT writes the we returned to R3 to handle."); 525 STAM_REG(pVM, &pVM->trpm.s.StatRCWriteGuestIDTHandled, STAMTYPE_COUNTER, "/TRPM/RC/IDTWritesHandled", STAMUNIT_OCCURENCES, "Guest IDT writes that we handled successfully."); 526 STAM_REG(pVM, &pVM->trpm.s.StatSyncIDT, STAMTYPE_PROFILE, "/PROF/TRPM/SyncIDT", STAMUNIT_TICKS_PER_CALL, "Profiling of TRPMR3SyncIDT()."); 527 528 /* traps */ 529 STAM_REG(pVM, &pVM->trpm.s.aStatGCTraps[0x00], STAMTYPE_PROFILE_ADV, "/TRPM/GC/Traps/00", STAMUNIT_TICKS_PER_CALL, "#DE - Divide error."); 530 STAM_REG(pVM, &pVM->trpm.s.aStatGCTraps[0x01], STAMTYPE_PROFILE_ADV, "/TRPM/GC/Traps/01", STAMUNIT_TICKS_PER_CALL, "#DB - Debug (single step and more)."); 531 //STAM_REG(pVM, &pVM->trpm.s.aStatGCTraps[0x02], STAMTYPE_PROFILE_ADV, "/TRPM/GC/Traps/02", STAMUNIT_TICKS_PER_CALL, "NMI"); 532 STAM_REG(pVM, &pVM->trpm.s.aStatGCTraps[0x03], STAMTYPE_PROFILE_ADV, "/TRPM/GC/Traps/03", STAMUNIT_TICKS_PER_CALL, "#BP - Breakpoint."); 533 STAM_REG(pVM, &pVM->trpm.s.aStatGCTraps[0x04], STAMTYPE_PROFILE_ADV, "/TRPM/GC/Traps/04", STAMUNIT_TICKS_PER_CALL, "#OF - Overflow."); 534 STAM_REG(pVM, &pVM->trpm.s.aStatGCTraps[0x05], STAMTYPE_PROFILE_ADV, "/TRPM/GC/Traps/05", STAMUNIT_TICKS_PER_CALL, "#BR - Bound range exceeded."); 535 STAM_REG(pVM, &pVM->trpm.s.aStatGCTraps[0x06], STAMTYPE_PROFILE_ADV, "/TRPM/GC/Traps/06", STAMUNIT_TICKS_PER_CALL, "#UD - Undefined opcode."); 536 STAM_REG(pVM, &pVM->trpm.s.aStatGCTraps[0x07], STAMTYPE_PROFILE_ADV, "/TRPM/GC/Traps/07", STAMUNIT_TICKS_PER_CALL, "#NM - Device not available (FPU)."); 537 //STAM_REG(pVM, &pVM->trpm.s.aStatGCTraps[0x08], STAMTYPE_PROFILE_ADV, "/TRPM/GC/Traps/08", STAMUNIT_TICKS_PER_CALL, "#DF - Double fault."); 538 STAM_REG(pVM, &pVM->trpm.s.aStatGCTraps[0x09], STAMTYPE_PROFILE_ADV, "/TRPM/GC/Traps/09", STAMUNIT_TICKS_PER_CALL, "#?? - Coprocessor segment overrun (obsolete)."); 539 STAM_REG(pVM, &pVM->trpm.s.aStatGCTraps[0x0a], STAMTYPE_PROFILE_ADV, "/TRPM/GC/Traps/0a", STAMUNIT_TICKS_PER_CALL, "#TS - Task switch fault."); 540 STAM_REG(pVM, &pVM->trpm.s.aStatGCTraps[0x0b], STAMTYPE_PROFILE_ADV, "/TRPM/GC/Traps/0b", STAMUNIT_TICKS_PER_CALL, "#NP - Segment not present."); 541 STAM_REG(pVM, &pVM->trpm.s.aStatGCTraps[0x0c], STAMTYPE_PROFILE_ADV, "/TRPM/GC/Traps/0c", STAMUNIT_TICKS_PER_CALL, "#SS - Stack segment fault."); 542 STAM_REG(pVM, &pVM->trpm.s.aStatGCTraps[0x0d], STAMTYPE_PROFILE_ADV, "/TRPM/GC/Traps/0d", STAMUNIT_TICKS_PER_CALL, "#GP - General protection fault."); 543 STAM_REG(pVM, &pVM->trpm.s.aStatGCTraps[0x0e], STAMTYPE_PROFILE_ADV, "/TRPM/GC/Traps/0e", STAMUNIT_TICKS_PER_CALL, "#PF - Page fault."); 544 //STAM_REG(pVM, &pVM->trpm.s.aStatGCTraps[0x0f], STAMTYPE_PROFILE_ADV, "/TRPM/GC/Traps/0f", STAMUNIT_TICKS_PER_CALL, "Reserved."); 545 STAM_REG(pVM, &pVM->trpm.s.aStatGCTraps[0x10], STAMTYPE_PROFILE_ADV, "/TRPM/GC/Traps/10", STAMUNIT_TICKS_PER_CALL, "#MF - Math fault.."); 546 STAM_REG(pVM, &pVM->trpm.s.aStatGCTraps[0x11], STAMTYPE_PROFILE_ADV, "/TRPM/GC/Traps/11", STAMUNIT_TICKS_PER_CALL, "#AC - Alignment check."); 547 STAM_REG(pVM, &pVM->trpm.s.aStatGCTraps[0x12], STAMTYPE_PROFILE_ADV, "/TRPM/GC/Traps/12", STAMUNIT_TICKS_PER_CALL, "#MC - Machine check."); 548 STAM_REG(pVM, &pVM->trpm.s.aStatGCTraps[0x13], STAMTYPE_PROFILE_ADV, "/TRPM/GC/Traps/13", STAMUNIT_TICKS_PER_CALL, "#XF - SIMD Floating-Point Exception."); 549 } 550 #endif 551 552 # ifdef VBOX_WITH_STATISTICS 549 553 rc = MMHyperAlloc(pVM, sizeof(STAMCOUNTER) * 256, sizeof(STAMCOUNTER), MM_TAG_TRPM, (void **)&pVM->trpm.s.paStatForwardedIRQR3); 550 554 AssertRCReturn(rc, rc); 551 555 pVM->trpm.s.paStatForwardedIRQRC = MMHyperR3ToRC(pVM, pVM->trpm.s.paStatForwardedIRQR3); 552 pVM->trpm.s.paStatForwardedIRQR0 = MMHyperR3ToR0(pVM, pVM->trpm.s.paStatForwardedIRQR3);553 556 for (unsigned i = 0; i < 256; i++) 554 557 STAMR3RegisterF(pVM, &pVM->trpm.s.paStatForwardedIRQR3[i], STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_OCCURENCES, "Forwarded interrupts.", 555 558 i < 0x20 ? "/TRPM/ForwardRaw/TRAP/%02X" : "/TRPM/ForwardRaw/IRQ/%02X", i); 556 559 557 rc = MMHyperAlloc(pVM, sizeof(STAMCOUNTER) * 256, sizeof(STAMCOUNTER), MM_TAG_TRPM, (void **)&pVM->trpm.s.paStatHostIrqR3); 558 AssertRCReturn(rc, rc); 559 pVM->trpm.s.paStatHostIrqRC = MMHyperR3ToRC(pVM, pVM->trpm.s.paStatHostIrqR3); 560 pVM->trpm.s.paStatHostIrqR0 = MMHyperR3ToR0(pVM, pVM->trpm.s.paStatHostIrqR3); 561 for (unsigned i = 0; i < 256; i++) 562 STAMR3RegisterF(pVM, &pVM->trpm.s.paStatHostIrqR3[i], STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_OCCURENCES, 563 "Host interrupts.", "/TRPM/HostIRQs/%02x", i); 560 # ifdef VBOX_WITH_RAW_MODE 561 if (!HMIsEnabled(pVM)) 562 { 563 rc = MMHyperAlloc(pVM, sizeof(STAMCOUNTER) * 256, sizeof(STAMCOUNTER), MM_TAG_TRPM, (void **)&pVM->trpm.s.paStatHostIrqR3); 564 AssertRCReturn(rc, rc); 565 pVM->trpm.s.paStatHostIrqRC = MMHyperR3ToRC(pVM, pVM->trpm.s.paStatHostIrqR3); 566 for (unsigned i = 0; i < 256; i++) 567 STAMR3RegisterF(pVM, &pVM->trpm.s.paStatHostIrqR3[i], STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_OCCURENCES, 568 "Host interrupts.", "/TRPM/HostIRQs/%02x", i); 569 } 570 # endif 571 # endif 572 573 #ifdef VBOX_WITH_RAW_MODE 574 if (!HMIsEnabled(pVM)) 575 { 576 STAM_REG(pVM, &pVM->trpm.s.StatForwardProfR3, STAMTYPE_PROFILE_ADV, "/TRPM/ForwardRaw/ProfR3", STAMUNIT_TICKS_PER_CALL, "Profiling TRPMForwardTrap."); 577 STAM_REG(pVM, &pVM->trpm.s.StatForwardProfRZ, STAMTYPE_PROFILE_ADV, "/TRPM/ForwardRaw/ProfRZ", STAMUNIT_TICKS_PER_CALL, "Profiling TRPMForwardTrap."); 578 STAM_REG(pVM, &pVM->trpm.s.StatForwardFailNoHandler, STAMTYPE_COUNTER, "/TRPM/ForwardRaw/FailNoHandler", STAMUNIT_OCCURENCES,"Failure to forward interrupt in raw mode."); 579 STAM_REG(pVM, &pVM->trpm.s.StatForwardFailPatchAddr, STAMTYPE_COUNTER, "/TRPM/ForwardRaw/FailPatchAddr", STAMUNIT_OCCURENCES,"Failure to forward interrupt in raw mode."); 580 STAM_REG(pVM, &pVM->trpm.s.StatForwardFailR3, STAMTYPE_COUNTER, "/TRPM/ForwardRaw/FailR3", STAMUNIT_OCCURENCES, "Failure to forward interrupt in raw mode."); 581 STAM_REG(pVM, &pVM->trpm.s.StatForwardFailRZ, STAMTYPE_COUNTER, "/TRPM/ForwardRaw/FailRZ", STAMUNIT_OCCURENCES, "Failure to forward interrupt in raw mode."); 582 583 STAM_REG(pVM, &pVM->trpm.s.StatTrap0dDisasm, STAMTYPE_PROFILE, "/TRPM/RC/Traps/0d/Disasm", STAMUNIT_TICKS_PER_CALL, "Profiling disassembly part of trpmGCTrap0dHandler."); 584 STAM_REG(pVM, &pVM->trpm.s.StatTrap0dRdTsc, STAMTYPE_COUNTER, "/TRPM/RC/Traps/0d/RdTsc", STAMUNIT_OCCURENCES, "Number of RDTSC #GPs."); 585 } 564 586 #endif 565 587 566 STAM_REG(pVM, &pVM->trpm.s.StatForwardProfR3, STAMTYPE_PROFILE_ADV, "/TRPM/ForwardRaw/ProfR3", STAMUNIT_TICKS_PER_CALL, "Profiling TRPMForwardTrap.");567 STAM_REG(pVM, &pVM->trpm.s.StatForwardProfRZ, STAMTYPE_PROFILE_ADV, "/TRPM/ForwardRaw/ProfRZ", STAMUNIT_TICKS_PER_CALL, "Profiling TRPMForwardTrap.");568 STAM_REG(pVM, &pVM->trpm.s.StatForwardFailNoHandler, STAMTYPE_COUNTER, "/TRPM/ForwardRaw/FailNoHandler", STAMUNIT_OCCURENCES,"Failure to forward interrupt in raw mode.");569 STAM_REG(pVM, &pVM->trpm.s.StatForwardFailPatchAddr, STAMTYPE_COUNTER, "/TRPM/ForwardRaw/FailPatchAddr", STAMUNIT_OCCURENCES,"Failure to forward interrupt in raw mode.");570 STAM_REG(pVM, &pVM->trpm.s.StatForwardFailR3, STAMTYPE_COUNTER, "/TRPM/ForwardRaw/FailR3", STAMUNIT_OCCURENCES, "Failure to forward interrupt in raw mode.");571 STAM_REG(pVM, &pVM->trpm.s.StatForwardFailRZ, STAMTYPE_COUNTER, "/TRPM/ForwardRaw/FailRZ", STAMUNIT_OCCURENCES, "Failure to forward interrupt in raw mode.");572 573 STAM_REG(pVM, &pVM->trpm.s.StatTrap0dDisasm, STAMTYPE_PROFILE, "/TRPM/RC/Traps/0d/Disasm", STAMUNIT_TICKS_PER_CALL, "Profiling disassembly part of trpmGCTrap0dHandler.");574 STAM_REG(pVM, &pVM->trpm.s.StatTrap0dRdTsc, STAMTYPE_COUNTER, "/TRPM/RC/Traps/0d/RdTsc", STAMUNIT_OCCURENCES, "Number of RDTSC #GPs.");575 576 588 #ifdef VBOX_WITH_RAW_MODE 577 589 /* 578 590 * Default action when entering raw mode for the first time 579 591 */ 580 PVMCPU pVCpu = &pVM->aCpus[0]; /* raw mode implies on VCPU */ 581 VMCPU_FF_SET(pVCpu, VMCPU_FF_TRPM_SYNC_IDT); 592 if (!HMIsEnabled(pVM)) 593 { 594 PVMCPU pVCpu = &pVM->aCpus[0]; /* raw mode implies on VCPU */ 595 VMCPU_FF_SET(pVCpu, VMCPU_FF_TRPM_SYNC_IDT); 596 } 582 597 #endif 583 598 return 0; … … 596 611 VMMR3DECL(void) TRPMR3Relocate(PVM pVM, RTGCINTPTR offDelta) 597 612 { 613 #ifdef VBOX_WITH_RAW_MODE 614 if (HMIsEnabled(pVM)) 615 return; 616 598 617 /* Only applies to raw mode which supports only 1 VCPU. */ 599 618 PVMCPU pVCpu = &pVM->aCpus[0]; 600 601 619 LogFlow(("TRPMR3Relocate\n")); 620 602 621 /* 603 622 * Get the trap handler addresses. … … 670 689 CPUMSetHyperIDTR(pVCpu, VM_RC_ADDR(pVM, &pVM->trpm.s.aIdt[0]), sizeof(pVM->trpm.s.aIdt)-1); 671 690 672 if ( !pVM->trpm.s.fDisableMonitoring 673 && !HMIsEnabled(pVM)) 674 { 675 #ifdef TRPM_TRACK_SHADOW_IDT_CHANGES 676 if (pVM->trpm.s.pvMonShwIdtRC != RTRCPTR_MAX) 677 { 678 rc = PGMHandlerVirtualDeregister(pVM, pVM->trpm.s.pvMonShwIdtRC); 679 AssertRC(rc); 680 } 681 pVM->trpm.s.pvMonShwIdtRC = VM_RC_ADDR(pVM, &pVM->trpm.s.aIdt[0]); 682 rc = PGMR3HandlerVirtualRegister(pVM, PGMVIRTHANDLERTYPE_HYPERVISOR, pVM->trpm.s.pvMonShwIdtRC, pVM->trpm.s.pvMonShwIdtRC + sizeof(pVM->trpm.s.aIdt) - 1, 683 0, 0, "trpmRCShadowIDTWriteHandler", 0, "Shadow IDT write access handler"); 691 # ifdef TRPM_TRACK_SHADOW_IDT_CHANGES 692 if (pVM->trpm.s.pvMonShwIdtRC != RTRCPTR_MAX) 693 { 694 rc = PGMHandlerVirtualDeregister(pVM, pVM->trpm.s.pvMonShwIdtRC); 684 695 AssertRC(rc); 685 #endif 686 } 696 } 697 pVM->trpm.s.pvMonShwIdtRC = VM_RC_ADDR(pVM, &pVM->trpm.s.aIdt[0]); 698 rc = PGMR3HandlerVirtualRegister(pVM, PGMVIRTHANDLERTYPE_HYPERVISOR, pVM->trpm.s.pvMonShwIdtRC, pVM->trpm.s.pvMonShwIdtRC + sizeof(pVM->trpm.s.aIdt) - 1, 699 0, 0, "trpmRCShadowIDTWriteHandler", 0, "Shadow IDT write access handler"); 700 AssertRC(rc); 701 # endif 687 702 688 703 /* Relocate IDT handlers for forwarding guest traps/interrupts. */ … … 708 723 } 709 724 710 # ifdef VBOX_WITH_STATISTICS725 # ifdef VBOX_WITH_STATISTICS 711 726 pVM->trpm.s.paStatForwardedIRQRC += offDelta; 712 pVM->trpm.s.paStatForwardedIRQR0 = MMHyperR3ToR0(pVM, pVM->trpm.s.paStatForwardedIRQR3);713 727 pVM->trpm.s.paStatHostIrqRC += offDelta; 714 pVM->trpm.s.paStatHostIrqR0 = MMHyperR3ToR0(pVM, pVM->trpm.s.paStatHostIrqR3); 715 #endif 728 # endif 729 #endif /* VBOX_WITH_RAW_MODE */ 716 730 } 717 731 … … 726 740 { 727 741 NOREF(pVM); 728 return 0;742 return VINF_SUCCESS; 729 743 } 730 744 … … 739 753 VMMR3DECL(void) TRPMR3ResetCpu(PVMCPU pVCpu) 740 754 { 741 pVCpu->trpm.s.uActiveVector = ~0 ;755 pVCpu->trpm.s.uActiveVector = ~0U; 742 756 } 743 757 … … 782 796 * Default action when entering raw mode for the first time 783 797 */ 784 PVMCPU pVCpu = &pVM->aCpus[0]; /* raw mode implies on VCPU */ 785 VMCPU_FF_SET(pVCpu, VMCPU_FF_TRPM_SYNC_IDT); 798 if (!HMIsEnabled(pVM)) 799 { 800 PVMCPU pVCpu = &pVM->aCpus[0]; /* raw mode implies on VCPU */ 801 VMCPU_FF_SET(pVCpu, VMCPU_FF_TRPM_SYNC_IDT); 802 } 786 803 #endif 787 804 } … … 852 869 SSMR3PutGCUInt(pSSM, pTrpmCpu->uPrevVector); 853 870 } 854 SSMR3PutBool(pSSM, pTrpm->fDisableMonitoring);871 SSMR3PutBool(pSSM, HMIsEnabled(pVM)); 855 872 PVMCPU pVCpu = &pVM->aCpus[0]; /* raw mode implies 1 VCPU */ 856 873 SSMR3PutUInt(pSSM, VM_WHEN_RAW_MODE(VMCPU_FF_ISSET(pVCpu, VMCPU_FF_TRPM_SYNC_IDT), 0)); … … 925 942 } 926 943 927 SSMR3GetBool(pSSM, &pVM->trpm.s.fDisableMonitoring); 944 bool fIgnored; 945 SSMR3GetBool(pSSM, &fIgnored); 928 946 } 929 947 else … … 940 958 SSMR3GetGCUInt(pSSM, &pTrpmCpu->uPrevVector); 941 959 942 RTGCUINT fDisableMonitoring; 943 SSMR3GetGCUInt(pSSM, &fDisableMonitoring); 944 pTrpm->fDisableMonitoring = !!fDisableMonitoring; 960 RTGCUINT fIgnored; 961 SSMR3GetGCUInt(pSSM, &fIgnored); 945 962 } 946 963 … … 1025 1042 int rc; 1026 1043 1027 if (pVM->trpm.s.fDisableMonitoring) 1028 { 1029 VMCPU_FF_CLEAR(pVCpu, VMCPU_FF_TRPM_SYNC_IDT); 1030 return VINF_SUCCESS; /* Nothing to do */ 1031 } 1044 AssertReturn(!HMIsEnabled(pVM), VERR_TRPM_HM_IPE); 1032 1045 1033 1046 if (fRawRing0 && CSAMIsEnabled(pVM)) … … 1121 1134 1122 1135 1123 /**1124 * Disable IDT monitoring and syncing1125 *1126 * @param pVM Pointer to the VM.1127 */1128 VMMR3DECL(void) TRPMR3DisableMonitoring(PVM pVM)1129 {1130 /*1131 * Deregister any virtual handlers.1132 */1133 1136 # ifdef TRPM_TRACK_GUEST_IDT_CHANGES 1134 if (pVM->trpm.s.GuestIdtr.pIdt != RTRCPTR_MAX)1135 {1136 if (!pVM->trpm.s.fSafeToDropGuestIDTMonitoring)1137 {1138 int rc = PGMHandlerVirtualDeregister(pVM, pVM->trpm.s.GuestIdtr.pIdt);1139 AssertRC(rc);1140 }1141 pVM->trpm.s.GuestIdtr.pIdt = RTRCPTR_MAX;1142 }1143 pVM->trpm.s.GuestIdtr.cbIdt = 0;1144 # endif1145 1146 # ifdef TRPM_TRACK_SHADOW_IDT_CHANGES1147 if (pVM->trpm.s.pvMonShwIdtRC != RTRCPTR_MAX)1148 {1149 int rc = PGMHandlerVirtualDeregister(pVM, pVM->trpm.s.pvMonShwIdtRC);1150 AssertRC(rc);1151 pVM->trpm.s.pvMonShwIdtRC = RTRCPTR_MAX;1152 }1153 # endif1154 1155 PVMCPU pVCpu = &pVM->aCpus[0]; /* raw mode implies on VCPU */1156 VMCPU_FF_CLEAR(pVCpu, VMCPU_FF_TRPM_SYNC_IDT);1157 1158 pVM->trpm.s.fDisableMonitoring = true;1159 }1160 1161 1162 1137 /** 1163 1138 * \#PF Handler callback for virtual access handler ranges. … … 1182 1157 Log(("trpmR3GuestIDTWriteHandler: write to %RGv size %d\n", GCPtr, cbBuf)); NOREF(GCPtr); NOREF(cbBuf); 1183 1158 NOREF(pvPtr); NOREF(pvUser); NOREF(pvBuf); 1159 Assert(!HMIsEnabled(pVM)); 1184 1160 1185 1161 VMCPU_FF_SET(VMMGetCpu(pVM), VMCPU_FF_TRPM_SYNC_IDT); 1186 1162 return VINF_PGM_HANDLER_DO_DEFAULT; 1187 1163 } 1164 # endif /* TRPM_TRACK_GUEST_IDT_CHANGES */ 1188 1165 1189 1166 … … 1195 1172 * @param iTrap Trap/interrupt gate number. 1196 1173 */ 1197 VMMR3DECL(int)trpmR3ClearPassThroughHandler(PVM pVM, unsigned iTrap)1174 int trpmR3ClearPassThroughHandler(PVM pVM, unsigned iTrap) 1198 1175 { 1199 1176 /* Only applies to raw mode which supports only 1 VCPU. */ … … 1259 1236 VMMR3DECL(uint32_t) TRPMR3QueryGateByHandler(PVM pVM, RTRCPTR GCPtr) 1260 1237 { 1238 AssertReturn(!HMIsEnabled(pVM), ~0U); 1239 1261 1240 for (uint32_t iTrap = 0; iTrap < RT_ELEMENTS(pVM->trpm.s.aGuestTrapHandler); iTrap++) 1262 1241 { … … 1288 1267 { 1289 1268 AssertReturn(iTrap < RT_ELEMENTS(pVM->trpm.s.aIdt), TRPM_INVALID_HANDLER); 1269 AssertReturn(!HMIsEnabled(pVM), TRPM_INVALID_HANDLER); 1290 1270 1291 1271 return pVM->trpm.s.aGuestTrapHandler[iTrap]; … … 1306 1286 /* Only valid in raw mode which implies 1 VCPU */ 1307 1287 Assert(PATMIsEnabled(pVM) && pVM->cCpus == 1); 1288 AssertReturn(!HMIsEnabled(pVM), VERR_TRPM_HM_IPE); 1308 1289 PVMCPU pVCpu = &pVM->aCpus[0]; 1309 1290
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