Changeset 45792 in vbox for trunk/src/VBox/VMM

Timestamp:

Apr 28, 2013 4:28:51 PM (12 years ago)

Author:

vboxsync

Message:

CR0.WP applies to CPL > 3, not just CPL == 0. Sketched out a Netware hack.

Location:

trunk/src/VBox/VMM

Files:

• VMMAll/PGMAll.cpp (modified) (1 diff)
• VMMAll/PGMAllBth.h (modified) (2 diffs)
• include/PGMInternal.h (modified) (1 diff)

trunk/src/VBox/VMM/VMMAll/PGMAll.cpp

@@ -918 +918 @@
 
 /**
+ * Changing the page flags for a single page in the shadow page tables so as to
+ * make it supervisor and writable.
+ *
+ * This if for dealing with CR0.WP=0 and readonly user pages.
+ *
+ * @returns VBox status code.
+ * @param   pVCpu       Pointer to the VMCPU.
+ * @param   GCPtr       Virtual address of the first page in the range.
+ * @param   fOpFlags    A combination of the PGM_MK_PG_XXX flags.
+ */
+int pgmShwMakePageSupervisorAndWritable(PVMCPU pVCpu, RTGCPTR GCPtr, uint32_t fOpFlags)
+{
+    return pdmShwModifyPage(pVCpu, GCPtr, X86_PTE_RW, ~(uint64_t)X86_PTE_US, fOpFlags);
+}
+
+
+/**
  * Gets the shadow page directory for the specified address, PAE.
  *

trunk/src/VBox/VMM/VMMAll/PGMAllBth.h

@@ -984 +984 @@
             if (    !GstWalk.Core.fEffectiveRW
                 &&  (CPUMGetGuestCR0(pVCpu) & (X86_CR0_WP | X86_CR0_PG)) == X86_CR0_PG
-                &&  CPUMGetGuestCPL(pVCpu) == 0)
+                &&  CPUMGetGuestCPL(pVCpu) > 3)
             {
                 Assert((uErr & (X86_TRAP_PF_RW | X86_TRAP_PF_P)) == (X86_TRAP_PF_RW | X86_TRAP_PF_P));
+#    ifdef PGM_WITH_NETWARE_WP0_HACK
+                if (   GstWalk.Core.fEffectiveUS
+                    && !GstWalk.Core.fBigPage)
+                {
+                    /* Temorarily change the page to a RW super visor page. We'll trap
+                       and switch it back when user mode tries to read from it again.
+                       (See further down.) */
+                    Log(("PGM #PF: Netware WP0+RO+US hack: pvFault=%RGp uErr=%#x\n", pvFault, uErr));
+                    rc = pgmShwMakePageSupervisorAndWritable(pVCpu, pvFault, PGM_MK_PG_IS_WRITE_FAULT);
+                    PGM_INVL_PG(pVCpu, pvFault);
+                    if (rc == VINF_SUCCESS || rc == VINF_PGM_SYNC_CR3)
+                    {
+                        STAM_STATS({ pVCpu->pgm.s.CTX_SUFF(pStatTrap0eAttribution) = &pVCpu->pgm.s.CTX_SUFF(pStats)->StatRZTrap0eTime2WPEmulation; });  /**< @todo New stat. */
+                        return rc;
+                    }
+                    Log(("pgmShwMakePageSupervisorAndWritable(%RGv) failed with rc=%Rrc - ignored\n", pvFault, rc));
+                }
+#    endif
                 rc = VBOXSTRICTRC_TODO(PGMInterpretInstruction(pVM, pVCpu, pRegFrame, pvFault));
                 if (RT_SUCCESS(rc))
@@ -1042 +1060 @@
             }
         }
+#    if defined(PGM_WITH_NETWARE_WP0_HACK) && PGM_WITH_PAGING(PGM_GST_TYPE, PGM_SHW_TYPE)
+        /*
+         * Check for Netware WP0+RO+US hack from above and undo it when user
+         * mode accesses the page again.
+         */
+        else if (    !GstWalk.Core.fEffectiveRW
+                 &&  GstWalk.Core.fEffectiveUS
+                 &&  GstWalk.Core.fBigPage
+                 &&  (CPUMGetGuestCR0(pVCpu) & (X86_CR0_WP | X86_CR0_PG)) == X86_CR0_PG
+                 &&  CPUMGetGuestCPL(pVCpu) == 3
+                )
+        {
+            Log(("PGM #PF: Undo netware WP0+RO+US hack: pvFault=%RGp uErr=%#x\n", pvFault, uErr));
+            rc = PGM_BTH_NAME(SyncPage)(pVCpu, GstWalk.Pde, pvFault, 1, uErr);
+            if (RT_SUCCESS(rc))
+            {
+                PGM_INVL_PG(pVCpu, pvFault);
+                STAM_STATS({ pVCpu->pgm.s.CTX_SUFF(pStatTrap0eAttribution) = &pVCpu->pgm.s.CTX_SUFF(pStats)->StatRZTrap0eTime2WPEmulation; }); /**< @todo New stat. */
+                return VINF_SUCCESS;
+            }
+        }
+#    endif
+
         /** @todo else: why are we here? */
 

trunk/src/VBox/VMM/include/PGMInternal.h

@@ -4017 +4017 @@
 int             pgmMapDeactivateCR3(PVM pVM, PPGMPOOLPAGE pShwPageCR3);
 
+int             pgmShwMakePageSupervisorAndWritable(PVMCPU pVCpu, RTGCPTR GCPtr, uint32_t fOpFlags);
 int             pgmShwSyncPaePDPtr(PVMCPU pVCpu, RTGCPTR GCPtr, X86PGPAEUINT uGstPdpe, PX86PDPAE *ppPD);
 int             pgmShwSyncNestedPageLocked(PVMCPU pVCpu, RTGCPHYS GCPhysFault, uint32_t cPages, PGMMODE enmShwPagingMode);