Changeset 45823 in vbox for trunk/src/VBox/VMM

Timestamp:

Apr 29, 2013 3:55:06 PM (12 years ago)

Author:

vboxsync

Message:

VMM/HMVMXR0: Resetup preemption timer when the preemption timer expires unconditionally, and other HM bits.

File:

• trunk/src/VBox/VMM/VMMR0/HMVMXR0.cpp (modified) (11 diffs)

trunk/src/VBox/VMM/VMMR0/HMVMXR0.cpp

@@ -1840 +1840 @@
 
     /* Set VMCS link pointer. Reserved for future use, must be -1. Intel spec. 24.4 "Guest-State Area". */
-    rc |= VMXWriteVmcs64(VMX_VMCS64_GUEST_VMCS_LINK_PTR_FULL, 0xffffffffffffffffULL);
+    rc |= VMXWriteVmcs64(VMX_VMCS64_GUEST_VMCS_LINK_PTR_FULL, UINT64_C(0xffffffffffffffff));
 
     /* Setup debug controls */
@@ -2866 +2866 @@
             /* Validate. See Intel spec. 28.2.2 "EPT Translation Mechanism" and 24.6.11 "Extended-Page-Table Pointer (EPTP)" */
             Assert(pVCpu->hm.s.vmx.HCPhysEPTP);
-            Assert(!(pVCpu->hm.s.vmx.HCPhysEPTP & 0xfff0000000000000ULL));
+            Assert(!(pVCpu->hm.s.vmx.HCPhysEPTP & UINT64_C(0xfff0000000000000)));
             Assert(!(pVCpu->hm.s.vmx.HCPhysEPTP & 0xfff));
 
             /* VMX_EPT_MEMTYPE_WB support is already checked in hmR0VmxSetupTaggedTlb(). */
-            pVCpu->hm.s.vmx.HCPhysEPTP |=  VMX_EPT_MEMTYPE_WB
-                                         | (VMX_EPT_PAGE_WALK_LENGTH_DEFAULT << VMX_EPT_PAGE_WALK_LENGTH_SHIFT);
+            pVCpu->hm.s.vmx.HCPhysEPTP |=   VMX_EPT_MEMTYPE_WB
+                                          | (VMX_EPT_PAGE_WALK_LENGTH_DEFAULT << VMX_EPT_PAGE_WALK_LENGTH_SHIFT);
 
             /* Validate. See Intel spec. 26.2.1 "Checks on VMX Controls" */
@@ -3051 +3051 @@
     if (pVCpu->hm.s.vmx.u32EntryCtls & VMX_VMCS_CTRL_ENTRY_CONTROLS_LOAD_DEBUG)
     {
-        Assert((pMixedCtx->dr[7] & 0xffffffff00000000ULL) == 0);  /* upper 32 bits are reserved (MBZ). */
+        Assert(!(pMixedCtx->dr[7] >> 32));                        /* upper 32 bits are reserved (MBZ). */
         /* Validate. Intel spec. 17.2 "Debug Registers", recompiler paranoia checks. */
         Assert((pMixedCtx->dr[7] & 0xd800) == 0);                 /* bits 15, 14, 12, 11 are reserved (MBZ). */
@@ -3495 +3495 @@
         AssertRCReturn(rc, rc);
 
-        Assert(!(pMixedCtx->gdtr.cbGdt & 0xffff0000ULL));       /* Bits 31:16 MBZ. */
+        Assert(!(pMixedCtx->gdtr.cbGdt & UINT64_C(0xffff0000)));       /* Bits 31:16 MBZ. */
         Log(("Load: VMX_VMCS_GUEST_GDTR_BASE=%#RX64\n", pMixedCtx->gdtr.pGdt));
         pVCpu->hm.s.fContextUseFlags &= ~HM_CHANGED_GUEST_GDTR;
@@ -3546 +3546 @@
         AssertRCReturn(rc, rc);
 
-        Assert(!(pMixedCtx->idtr.cbIdt & 0xffff0000ULL));       /* Bits 31:16 MBZ. */
+        Assert(!(pMixedCtx->idtr.cbIdt & UINT64_C(0xffff0000)));       /* Bits 31:16 MBZ. */
         Log(("Load: VMX_VMCS_GUEST_IDTR_BASE=%#RX64\n", pMixedCtx->idtr.pIdt));
         pVCpu->hm.s.fContextUseFlags &= ~HM_CHANGED_GUEST_IDTR;
@@ -5179 +5179 @@
     if (!(pVCpu->hm.s.vmx.fUpdatedGuestState & HMVMX_UPDATED_GUEST_SEGMENT_REGS))
     {
-        rc = hmR0VmxSaveGuestCR0(pVCpu, pMixedCtx);
+        rc  = hmR0VmxSaveGuestCR0(pVCpu, pMixedCtx);
         rc |= VMXLOCAL_READ_SEG(CS, cs);
         rc |= VMXLOCAL_READ_SEG(SS, ss);
@@ -5636 +5636 @@
     STAM_PROFILE_ADV_STOP(&pVCpu->hm.s.StatExitXcptNmi, y3);
     STAM_COUNTER_INC(&pVCpu->hm.s.StatSwitchLongJmpToR3);
+    VMCPU_CMPXCHG_STATE(pVCpu, VMCPUSTATE_STARTED_HM, VMCPUSTATE_STARTED_EXEC);
 }
 
@@ -6015 +6016 @@
         || uVector == X86_XCPT_OF)
     {
-        u32IntrInfo         |= (VMX_EXIT_INTERRUPTION_INFO_TYPE_SW_XCPT << VMX_EXIT_INTERRUPTION_INFO_TYPE_SHIFT);
+        u32IntrInfo |= (VMX_EXIT_INTERRUPTION_INFO_TYPE_SW_XCPT << VMX_EXIT_INTERRUPTION_INFO_TYPE_SHIFT);
     }
     else
-        u32IntrInfo         |= (VMX_EXIT_INTERRUPTION_INFO_TYPE_SW_INT << VMX_EXIT_INTERRUPTION_INFO_TYPE_SHIFT);
+        u32IntrInfo |= (VMX_EXIT_INTERRUPTION_INFO_TYPE_SW_INT << VMX_EXIT_INTERRUPTION_INFO_TYPE_SHIFT);
     STAM_COUNTER_INC(&pVCpu->hm.s.StatIntInject);
     hmR0VmxSetPendingEvent(pVCpu, u32IntrInfo, cbInstr, 0 /* u32ErrCode */, 0 /* GCPtrFaultAddress */);
@@ -6472 +6473 @@
         return VINF_EM_RAW_INTERRUPT;
     }
+    VMCPU_ASSERT_STATE(pVCpu, VMCPUSTATE_STARTED_HM);
     VMCPU_SET_STATE(pVCpu, VMCPUSTATE_STARTED_EXEC);
 #endif
@@ -7417 +7419 @@
     VMX_VALIDATE_EXIT_HANDLER_PARAMS();
 
-    /* If we're saving the preemption-timer value on every VM-exit & we've reached zero, reset it up on next VM-entry. */
-    if (pVCpu->hm.s.vmx.u32ExitCtls & VMX_VMCS_CTRL_EXIT_CONTROLS_SAVE_VMX_PREEMPT_TIMER)
-        pVmxTransient->fUpdateTscOffsettingAndPreemptTimer = true;
+    /* If the preemption-timer has expired, reinitialize the preemption timer on next VM-entry. */
+    pVmxTransient->fUpdateTscOffsettingAndPreemptTimer = true;
 
     /* If there are any timer events pending, fall back to ring-3, otherwise resume guest execution. */
@@ -8369 +8370 @@
         /* Successfully synced our shadow page tables or emulation MMIO instruction. */
         STAM_COUNTER_INC(&pVCpu->hm.s.StatExitReasonNpf);
-        pVCpu->hm.s.fContextUseFlags |=  HM_CHANGED_GUEST_RIP | HM_CHANGED_GUEST_RSP | HM_CHANGED_GUEST_RFLAGS
-                                       | HM_CHANGED_VMX_GUEST_APIC_STATE;
+        pVCpu->hm.s.fContextUseFlags |=   HM_CHANGED_GUEST_RIP | HM_CHANGED_GUEST_RSP | HM_CHANGED_GUEST_RFLAGS
+                                        | HM_CHANGED_VMX_GUEST_APIC_STATE;
         return VINF_SUCCESS;
     }