Changeset 45904 in vbox

Timestamp:

May 6, 2013 11:53:53 AM (12 years ago)

Author:

vboxsync

svn:sync-xref-src-repo-rev:

85530

Message:

VMM/HMVMXR0: Fixes for pure 32-bit darwin hosts (not hybrid) with better identification and separation of guest-natural, host-natural fields.

Location:

trunk

Files:

• include/VBox/vmm/hm_vmx.h (modified) (3 diffs)
• src/VBox/VMM/VMMR0/HMVMXR0.cpp (modified) (8 diffs)
• src/VBox/VMM/VMMR0/HWVMXR0.h (modified) (1 diff)

trunk/include/VBox/vmm/hm_vmx.h

@@ -1729 +1729 @@
 #ifdef VBOX_WITH_OLD_VTX_CODE
 # if HC_ARCH_BITS == 64
-# define VMXWriteVmcs VMXWriteVmcs64
+#  define VMXWriteVmcs VMXWriteVmcs64
 # else
-# define VMXWriteVmcs VMXWriteVmcs32
+#  define VMXWriteVmcs VMXWriteVmcs32
 # endif
 #else /* !VBOX_WITH_OLD_VTX_CODE */
-# if HC_ARCH_BITS == 64 || defined(VBOX_WITH_HYBRID_32BIT_KERNEL)
-# define VMXWriteVmcsHstN VMXWriteVmcs64
-# else
-# define VMXWriteVmcsHstN VMXWriteVmcs32
+# ifdef VBOX_WITH_HYBRID_32BIT_KERNEL
+#  define VMXWriteVmcsHstN(idxField, uVal)       HMVMX_IS_64BIT_HOST_MODE() ?                     \
+                                                   VMXWriteVmcs64(idxField, uVal)                 \
+                                                 : VMXWriteVmcs32(idxField, uVal)
+#  define VMXWriteVmcsGstN(idxField, u64Val)     (pVCpu->CTX_SUFF(pVM)->hm.s.fAllow64BitGuests) ? \
+                                                   VMXWriteVmcs64(idxField, u64Val)               \
+                                                 : VMXWriteVmcs32(idxField, u64Val)
+# elif HC_ARCH_BITS == 32
+#  define VMXWriteVmcsHstN                       VMXWriteVmcs32
+#  define VMXWriteVmcsGstN(idxField, u64Val)     VMXWriteVmcs64Ex(pVCpu, idxField, u64Val)
+# else  /* HC_ARCH_BITS == 64 */
+#  define VMXWriteVmcsHstN                       VMXWriteVmcs64
+#  define VMXWriteVmcsGstN                       VMXWriteVmcs64
 # endif
-# define VMXWriteVmcsGstN VMXWriteVmcs64
-#endif
+#endif  /* !VBOX_WITH_OLD_VTX_CODE */
 
 
@@ -1837 +1845 @@
 #endif
 
+#ifdef VBOX_WITH_OLD_VTX_CODE
 # if HC_ARCH_BITS == 64
 #  define VMXReadVmcsField VMXReadVmcs64
@@ -1842 +1851 @@
 #  define VMXReadVmcsField VMXReadVmcs32
 # endif
+#endif
 
 /**

trunk/src/VBox/VMM/VMMR0/HMVMXR0.cpp

@@ -2198 +2198 @@
         /* We need the 64-bit TR base for hybrid darwin. */
         uint64_t u64TRBase = X86DESC64_BASE((PX86DESC64)pDesc);
-        rc = VMXWriteVmcsHstN(VMX_VMCS_HOST_TR_BASE, u64TRBase);
+        rc = VMXWriteVmcs64(VMX_VMCS_HOST_TR_BASE, u64TRBase);
     }
     else
@@ -2223 +2223 @@
         uint64_t u64FSBase = ASMRdMsr(MSR_K8_FS_BASE);
         uint64_t u64GSBase = ASMRdMsr(MSR_K8_GS_BASE);
-        rc  = VMXWriteVmcsHstN(VMX_VMCS_HOST_FS_BASE, u64FSBase);
-        rc |= VMXWriteVmcsHstN(VMX_VMCS_HOST_GS_BASE, u64GSBase);
+        rc  = VMXWriteVmcs64(VMX_VMCS_HOST_FS_BASE, u64FSBase);
+        rc |= VMXWriteVmcs64(VMX_VMCS_HOST_GS_BASE, u64GSBase);
         AssertRCReturn(rc, rc);
     }
@@ -2303 +2303 @@
      * Host Sysenter MSRs.
      */
-    rc |= VMXWriteVmcs32(VMX_VMCS32_HOST_SYSENTER_CS,    ASMRdMsr_Low(MSR_IA32_SYSENTER_CS));
+    rc |= VMXWriteVmcs32(VMX_VMCS32_HOST_SYSENTER_CS,        ASMRdMsr_Low(MSR_IA32_SYSENTER_CS));
 # ifdef VBOX_WITH_HYBRID_32BIT_KERNEL
     if (HMVMX_IS_64BIT_HOST_MODE())
     {
-        rc |= VMXWriteVmcsHstN(VMX_VMCS_HOST_SYSENTER_ESP,   ASMRdMsr(MSR_IA32_SYSENTER_ESP));
-        rc |= VMXWriteVmcsHstN(VMX_VMCS_HOST_SYSENTER_EIP,   ASMRdMsr(MSR_IA32_SYSENTER_EIP));
+        rc |= VMXWriteVmcs64(VMX_VMCS_HOST_SYSENTER_ESP,     ASMRdMsr(MSR_IA32_SYSENTER_ESP));
+        rc |= VMXWriteVmcs64(VMX_VMCS_HOST_SYSENTER_EIP,     ASMRdMsr(MSR_IA32_SYSENTER_EIP));
     }
     else
     {
-        rc |= VMXWriteVmcsHstN(VMX_VMCS_HOST_SYSENTER_ESP,   ASMRdMsr_Low(MSR_IA32_SYSENTER_ESP));
-        rc |= VMXWriteVmcsHstN(VMX_VMCS_HOST_SYSENTER_EIP,   ASMRdMsr_Low(MSR_IA32_SYSENTER_EIP));
+        rc |= VMXWriteVmcs32(VMX_VMCS_HOST_SYSENTER_ESP,     ASMRdMsr_Low(MSR_IA32_SYSENTER_ESP));
+        rc |= VMXWriteVmcs32(VMX_VMCS_HOST_SYSENTER_EIP,     ASMRdMsr_Low(MSR_IA32_SYSENTER_EIP));
     }
 # elif HC_ARCH_BITS == 32
-    rc |= VMXWriteVmcsHstN(VMX_VMCS_HOST_SYSENTER_ESP,       ASMRdMsr_Low(MSR_IA32_SYSENTER_ESP));
-    rc |= VMXWriteVmcsHstN(VMX_VMCS_HOST_SYSENTER_EIP,       ASMRdMsr_Low(MSR_IA32_SYSENTER_EIP));
+    rc |= VMXWriteVmcs32(VMX_VMCS_HOST_SYSENTER_ESP,         ASMRdMsr_Low(MSR_IA32_SYSENTER_ESP));
+    rc |= VMXWriteVmcs32(VMX_VMCS_HOST_SYSENTER_EIP,         ASMRdMsr_Low(MSR_IA32_SYSENTER_EIP));
 # else
-    rc |= VMXWriteVmcsHstN(VMX_VMCS_HOST_SYSENTER_ESP,       ASMRdMsr(MSR_IA32_SYSENTER_ESP));
-    rc |= VMXWriteVmcsHstN(VMX_VMCS_HOST_SYSENTER_EIP,       ASMRdMsr(MSR_IA32_SYSENTER_EIP));
+    rc |= VMXWriteVmcs64(VMX_VMCS_HOST_SYSENTER_ESP,         ASMRdMsr(MSR_IA32_SYSENTER_ESP));
+    rc |= VMXWriteVmcs64(VMX_VMCS_HOST_SYSENTER_EIP,         ASMRdMsr(MSR_IA32_SYSENTER_EIP));
 # endif
     AssertRCReturn(rc, rc);
@@ -2833 +2833 @@
          * we want to be notified immediately of guest CR0 changes (e.g. PG to update our shadow page tables).
          */
-        uint64_t u64CR0Mask = 0;
-        u64CR0Mask =  X86_CR0_PE
+        uint64_t u32CR0Mask = 0;
+        u32CR0Mask =  X86_CR0_PE
                     | X86_CR0_NE
                     | X86_CR0_WP
@@ -2842 +2842 @@
                     | X86_CR0_NW;   /* Bit ignored on VM-entry and VM-exit. Don't let the guest modify the host CR0.NW */
         if (pVM->hm.s.vmx.fUnrestrictedGuest)
-            u64CR0Mask &= ~X86_CR0_PE;
+            u32CR0Mask &= ~X86_CR0_PE;
         if (pVM->hm.s.fNestedPaging)
-            u64CR0Mask &= ~X86_CR0_WP;
+            u32CR0Mask &= ~X86_CR0_WP;
 
         /* If the guest FPU state is active, don't need to VM-exit on writes to FPU related bits in CR0. */
         if (fInterceptNM)
-            u64CR0Mask |=  (X86_CR0_TS | X86_CR0_MP);
+            u32CR0Mask |=  (X86_CR0_TS | X86_CR0_MP);
         else
-            u64CR0Mask &= ~(X86_CR0_TS | X86_CR0_MP);
+            u32CR0Mask &= ~(X86_CR0_TS | X86_CR0_MP);
 
         /* Write the CR0 mask into the VMCS and update the VCPU's copy of the current CR0 mask. */
-        pVCpu->hm.s.vmx.cr0_mask = u64CR0Mask;
-        rc |= VMXWriteVmcsHstN(VMX_VMCS_CTRL_CR0_MASK, u64CR0Mask);
+        pVCpu->hm.s.vmx.cr0_mask = u32CR0Mask;
+        rc |= VMXWriteVmcs32(VMX_VMCS_CTRL_CR0_MASK, u32CR0Mask);
         AssertRCReturn(rc, rc);
 
@@ -2928 +2928 @@
                 GCPhysGuestCR3 = GCPhys;
             }
+
+            Log(("Load: VMX_VMCS_GUEST_CR3=%#RGv (GstN)\n", GCPhysGuestCR3));
+            rc = VMXWriteVmcsGstN(VMX_VMCS_GUEST_CR3, GCPhysGuestCR3);
         }
         else
         {
             /* Non-nested paging case, just use the hypervisor's CR3. */
-            GCPhysGuestCR3 = PGMGetHyperCR3(pVCpu);
-        }
-
-        Log(("Load: VMX_VMCS_GUEST_CR3=%#RGv\n", GCPhysGuestCR3));
-        rc = VMXWriteVmcsGstN(VMX_VMCS_GUEST_CR3, GCPhysGuestCR3);
+            RTHCPHYS HCPhysGuestCR3 = PGMGetHyperCR3(pVCpu);
+
+            Log(("Load: VMX_VMCS_GUEST_CR3=%#RHv (HstN)\n", HCPhysGuestCR3));
+            rc = VMXWriteVmcsHstN(VMX_VMCS_GUEST_CR3, HCPhysGuestCR3);
+        }
         AssertRCReturn(rc, rc);
 
@@ -2951 +2954 @@
 
         /* The guest's view of its CR4 is unblemished. */
-        rc  = VMXWriteVmcs32(VMX_VMCS_CTRL_CR4_READ_SHADOW, u32GuestCR4);
+        rc = VMXWriteVmcs32(VMX_VMCS_CTRL_CR4_READ_SHADOW, u32GuestCR4);
         AssertRCReturn(rc, rc);
         Log(("Load: VMX_VMCS_CTRL_CR4_READ_SHADOW=%#RX32\n", u32GuestCR4));
@@ -3025 +3028 @@
 
         /* Setup CR4 mask. CR4 flags owned by the host, if the guest attempts to change them, that would cause a VM exit. */
-        uint64_t u64CR4Mask = 0;
-        u64CR4Mask =  X86_CR4_VME
+        uint32_t u32CR4Mask = 0;
+        u32CR4Mask =  X86_CR4_VME
                     | X86_CR4_PAE
                     | X86_CR4_PGE
                     | X86_CR4_PSE
                     | X86_CR4_VMXE;
-        pVCpu->hm.s.vmx.cr4_mask = u64CR4Mask;
-        rc |= VMXWriteVmcsHstN(VMX_VMCS_CTRL_CR4_MASK, u64CR4Mask);
+        pVCpu->hm.s.vmx.cr4_mask = u32CR4Mask;
+        rc |= VMXWriteVmcs32(VMX_VMCS_CTRL_CR4_MASK, u32CR4Mask);
         AssertRCReturn(rc, rc);
 

trunk/src/VBox/VMM/VMMR0/HWVMXR0.h

@@ -69 +69 @@
 # endif
 #  define VMXReadVmcs                                    VMXReadVmcsField
-#else
-# if HC_ARCH_BITS == 32 && !defined(VBOX_WITH_HYBRID_32BIT_KERNEL)
-# define VMXReadVmcsHstN                                 VMXReadVmcs32
-# define VMXReadVmcsGstN(idxField, pVal)                 VMXReadCachedVmcsEx(pVCpu, idxField##_CACHE_IDX, pVal)
-# define VMXReadVmcsGstNByIdxVal(idxField, pVal)         VMXReadCachedVmcsEx(pVCpu, idxField, pVal)
-# else
-# define VMXReadVmcsHstN                                 VMXReadVmcs64
-# define VMXReadVmcsGstN                                 VMXReadVmcs64
-# define VMXReadVmcsGstNByIdxVal                         VMXReadVmcs64
+#else /* !VBOX_WITH_OLD_VTX_CODE */
+# ifdef VBOX_WITH_HYBRID_32BIT_KERNEL
+#  define VMXReadVmcsHstN(idxField, pVal)                 HMVMX_IS_64BIT_HOST_MODE() ?                     \
+                                                            VMXReadVmcs64(idxField, pVal)                  \
+                                                          : VMXReadVmcs32(idxField, (uint32_t *)pVal)
+#  define VMXReadVmcsGstN(idxField, pVal)                 (pVCpu->CTX_SUFF(pVM)->hm.s.fAllow64BitGuests) ? \
+                                                            VMXReadVmcs64(idxField, pVal)                  \
+                                                          : VMXReadVmcs32(idxField, (uint32_t *)pVal)
+#  define VMXReadVmcsGstNByIdxVal(idxField, pVal)         VMXReadVmcsGstN(idxField, pVal)
+# elif HC_ARCH_BITS == 32
+#  define VMXReadVmcsHstN                                 VMXReadVmcs32
+#  define VMXReadVmcsGstN(idxField, pVal)                 VMXReadCachedVmcsEx(pVCpu, idxField##_CACHE_IDX, pVal)
+#  define VMXReadVmcsGstNByIdxVal(idxField, pVal)         VMXReadCachedVmcsEx(pVCpu, idxField, pVal)
+# else /* HC_ARCH_BITS == 64 */
+#  define VMXReadVmcsHstN                                 VMXReadVmcs64
+#  define VMXReadVmcsGstN                                 VMXReadVmcs64
+#  define VMXReadVmcsGstNByIdxVal                         VMXReadVmcs64
 # endif
-#endif
+#endif  /* !VBOX_WITH_OLD_VTX_CODE */
 
 #endif /* IN_RING0 */