VirtualBox

Changeset 45908 in vbox for trunk/src/VBox/VMM


Ignore:
Timestamp:
May 6, 2013 12:59:37 PM (12 years ago)
Author:
vboxsync
Message:

Don't OR status codes together, just AssertRCReturn immediately. If two methods fails with different statuses, we'll be *very* confused. Also, for (human) analysis, return VINF_SUCCESS when you mean no informational statuses are used. int rc = VINF_SUCCESS; at the top and return rc; at the bottom *might* save an xor eax,eax; instruction in the slow path, but it makes it harder to read. (It also forces the compiler to remember the last rc value, which might not come without a cost on register starved 32-bit.)

File:
1 edited

Legend:

Unmodified
Added
Removed
  • trunk/src/VBox/VMM/VMMR0/HMVMXR0.cpp

    r45906 r45908  
    47274727static int hmR0VmxSaveGuestCR0(PVMCPU pVCpu, PCPUMCTX pMixedCtx)
    47284728{
    4729     int rc = VINF_SUCCESS;
    47304729    if (!(pVCpu->hm.s.vmx.fUpdatedGuestState & HMVMX_UPDATED_GUEST_CR0))
    47314730    {
    47324731        uint32_t uVal    = 0;
     4732        int rc = VMXReadVmcs32(VMX_VMCS_GUEST_CR0,            &uVal);
     4733        AssertRCReturn(rc, rc);
    47334734        uint32_t uShadow = 0;
    4734         rc  = VMXReadVmcs32(VMX_VMCS_GUEST_CR0,            &uVal);
    4735         rc |= VMXReadVmcs32(VMX_VMCS_CTRL_CR0_READ_SHADOW, &uShadow);
     4735        rc     = VMXReadVmcs32(VMX_VMCS_CTRL_CR0_READ_SHADOW, &uShadow);
    47364736        AssertRCReturn(rc, rc);
     4737
    47374738        uVal = (uShadow & pVCpu->hm.s.vmx.cr0_mask) | (uVal & ~pVCpu->hm.s.vmx.cr0_mask);
    47384739        CPUMSetGuestCR0(pVCpu, uVal);
    47394740        pVCpu->hm.s.vmx.fUpdatedGuestState |= HMVMX_UPDATED_GUEST_CR0;
    47404741    }
    4741     return rc;
     4742    return VINF_SUCCESS;
    47424743}
    47434744
     
    48374838static int hmR0VmxSaveGuestRflags(PVMCPU pVCpu, PCPUMCTX pMixedCtx)
    48384839{
    4839     int rc = VINF_SUCCESS;
    48404840    if (!(pVCpu->hm.s.vmx.fUpdatedGuestState & HMVMX_UPDATED_GUEST_RFLAGS))
    48414841    {
    48424842        uint32_t uVal = 0;
    4843         rc = VMXReadVmcs32(VMX_VMCS_GUEST_RFLAGS, &uVal);
     4843        int rc = VMXReadVmcs32(VMX_VMCS_GUEST_RFLAGS, &uVal);
    48444844        AssertRCReturn(rc, rc);
    48454845        pMixedCtx->eflags.u32 = uVal;
     
    48574857        pVCpu->hm.s.vmx.fUpdatedGuestState |= HMVMX_UPDATED_GUEST_RFLAGS;
    48584858    }
    4859     return rc;
     4859    return VINF_SUCCESS;
    48604860}
    48614861
     
    51375137 */
    51385138DECLINLINE(int) hmR0VmxReadSegmentReg(PVMCPU pVCpu, uint32_t idxSel, uint32_t idxLimit, uint32_t idxBase, uint32_t idxAccess,
    5139                                     PCPUMSELREG pSelReg)
     5139                                      PCPUMSELREG pSelReg)
    51405140{
    51415141    uint32_t u32Val = 0;
    51425142    int rc = VMXReadVmcs32(idxSel, &u32Val);
     5143    AssertRCReturn(rc, rc);
    51435144    pSelReg->Sel      = (uint16_t)u32Val;
    51445145    pSelReg->ValidSel = (uint16_t)u32Val;
    51455146    pSelReg->fFlags   = CPUMSELREG_FLAGS_VALID;
    51465147
    5147     rc |= VMXReadVmcs32(idxLimit, &u32Val);
     5148    rc = VMXReadVmcs32(idxLimit, &u32Val);
     5149    AssertRCReturn(rc, rc);
    51485150    pSelReg->u32Limit = u32Val;
    51495151
    51505152    RTGCUINTREG uGCVal = 0;
    5151     rc |= VMXReadVmcsGstNByIdxVal(idxBase, &uGCVal);
     5153    rc = VMXReadVmcsGstNByIdxVal(idxBase, &uGCVal);
     5154    AssertRCReturn(rc, rc);
    51525155    pSelReg->u64Base = uGCVal;
    51535156
    5154     rc |= VMXReadVmcs32(idxAccess, &u32Val);
     5157    rc = VMXReadVmcs32(idxAccess, &u32Val);
     5158    AssertRCReturn(rc, rc);
    51555159    pSelReg->Attr.u = u32Val;
    5156     AssertRCReturn(rc, rc);
    51575160
    51585161    /*
     
    51685171        pSelReg->Attr.u = HMVMX_SEL_UNUSABLE;
    51695172    }
    5170     return rc;
     5173    return VINF_SUCCESS;
    51715174}
    51725175
     
    51955198static int hmR0VmxSaveGuestSegmentRegs(PVMCPU pVCpu, PCPUMCTX pMixedCtx)
    51965199{
    5197     int rc = VINF_SUCCESS;
    5198 
    51995200    /* Guest segment registers. */
    52005201    if (!(pVCpu->hm.s.vmx.fUpdatedGuestState & HMVMX_UPDATED_GUEST_SEGMENT_REGS))
    52015202    {
    5202         rc  = hmR0VmxSaveGuestCR0(pVCpu, pMixedCtx);
    5203         rc |= VMXLOCAL_READ_SEG(CS, cs);
    5204         rc |= VMXLOCAL_READ_SEG(SS, ss);
    5205         rc |= VMXLOCAL_READ_SEG(DS, ds);
    5206         rc |= VMXLOCAL_READ_SEG(ES, es);
    5207         rc |= VMXLOCAL_READ_SEG(FS, fs);
    5208         rc |= VMXLOCAL_READ_SEG(GS, gs);
     5203        int rc = hmR0VmxSaveGuestCR0(pVCpu, pMixedCtx);
     5204        AssertRCReturn(rc, rc);
     5205        rc = VMXLOCAL_READ_SEG(CS, cs);
     5206        AssertRCReturn(rc, rc);
     5207        rc = VMXLOCAL_READ_SEG(SS, ss);
     5208        AssertRCReturn(rc, rc);
     5209        rc = VMXLOCAL_READ_SEG(DS, ds);
     5210        AssertRCReturn(rc, rc);
     5211        rc = VMXLOCAL_READ_SEG(ES, es);
     5212        AssertRCReturn(rc, rc);
     5213        rc = VMXLOCAL_READ_SEG(FS, fs);
     5214        AssertRCReturn(rc, rc);
     5215        rc = VMXLOCAL_READ_SEG(GS, gs);
    52095216        AssertRCReturn(rc, rc);
    52105217
     
    52225229    }
    52235230
    5224     return rc;
     5231    return VINF_SUCCESS;
    52255232}
    52265233
     
    76297636    /* EMInterpretRdmsr() requires CR0, Eflags and SS segment register. */
    76307637    int rc = hmR0VmxSaveGuestCR0(pVCpu, pMixedCtx);
    7631     rc    |= hmR0VmxSaveGuestRflags(pVCpu, pMixedCtx);
    7632     rc    |= hmR0VmxSaveGuestSegmentRegs(pVCpu, pMixedCtx);
     7638    AssertRCReturn(rc, rc);
     7639    rc     = hmR0VmxSaveGuestRflags(pVCpu, pMixedCtx);
     7640    AssertRCReturn(rc, rc);
     7641    rc     = hmR0VmxSaveGuestSegmentRegs(pVCpu, pMixedCtx);
    76337642    AssertRCReturn(rc, rc);
    76347643
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