Changeset 45966 in vbox for trunk/src/VBox/VMM

Timestamp:

May 9, 2013 3:39:52 PM (12 years ago)

Author:

vboxsync

Message:

VMM/HMVMXR0: Only cause a VM-exit when the highest-priority pending interrupt can be delivered to the guest and not whenever the guest lowers its TPR.

File:

• trunk/src/VBox/VMM/VMMR0/HMVMXR0.cpp (modified) (3 diffs)

trunk/src/VBox/VMM/VMMR0/HMVMXR0.cpp

@@ -2485 +2485 @@
             Assert(pVCpu->hm.s.vmx.HCPhysVirtApic);
 
-            bool    fPendingIntr = false;
-            uint8_t u8GuestTpr   = 0;
-            rc = PDMApicGetTPR(pVCpu, &u8GuestTpr, &fPendingIntr, NULL /* pu8PendingIntr */);
+            bool    fPendingIntr  = false;
+            uint8_t u8Tpr         = 0;
+            uint8_t u8PendingIntr = 0;
+            rc = PDMApicGetTPR(pVCpu, &u8Tpr, &fPendingIntr, &u8PendingIntr);
             AssertRCReturn(rc, rc);
 
@@ -2496 +2497 @@
              * the interrupt when we VM-exit for other reasons.
              */
-            pVCpu->hm.s.vmx.pbVirtApic[0x80] = u8GuestTpr;       /* Offset 0x80 is TPR in the APIC MMIO range. */
-            /* Bits 3-0 of the TPR threshold field correspond to bits 7-4 of the TPR (which is the Task-Priority Class). */
-            uint32_t u32TprThreshold = fPendingIntr ? (u8GuestTpr >> 4) : 0;
+            pVCpu->hm.s.vmx.pbVirtApic[0x80] = u8Tpr;            /* Offset 0x80 is TPR in the APIC MMIO range. */
+            uint32_t u32TprThreshold = 0;
+            if (fPendingIntr)
+            {
+                /* Bits 3-0 of the TPR threshold field correspond to bits 7-4 of the TPR (which is the Task-Priority Class). */
+                const uint8_t u8PendingPriority = (u8PendingIntr >> 4);
+                const uint8_t u8TprPriority     = (u8Tpr >> 4) & 7;
+                if (u8PendingPriority <= u8TprPriority)
+                    u32TprThreshold = u8PendingPriority;
+            }
             Assert(!(u32TprThreshold & 0xfffffff0));             /* Bits 31:4 MBZ. */
 
@@ -2508 +2516 @@
             {
                 Assert(!CPUMIsGuestInLongModeEx(pMixedCtx));     /* EFER always up-to-date. */
-                pMixedCtx->msrLSTAR = u8GuestTpr;
+                pMixedCtx->msrLSTAR = u8Tpr;
                 if (pVCpu->hm.s.vmx.u32ProcCtls & VMX_VMCS_CTRL_PROC_EXEC_USE_MSR_BITMAPS)
                 {