Index: trunk/src/VBox/VMM/VMMR0/HMVMXR0.cpp
===================================================================
--- trunk/src/VBox/VMM/VMMR0/HMVMXR0.cpp	(revision 46090)
+++ trunk/src/VBox/VMM/VMMR0/HMVMXR0.cpp	(revision 46098)
@@ -3866,9 +3866,9 @@
                 rc = VMXReadVmcs32(VMX_VMCS32_CTRL_PROC_EXEC, &u32Val);                 AssertRC(rc);
                 Log(("VMX_VMCS32_CTRL_PROC_EXEC               %#RX32\n", u32Val));
-                rc = VMXReadVmcs32(VMX_VMCS32_CTRL_PROC_EXEC2, &u32Val);       AssertRC(rc);
+                rc = VMXReadVmcs32(VMX_VMCS32_CTRL_PROC_EXEC2, &u32Val);                AssertRC(rc);
                 Log(("VMX_VMCS32_CTRL_PROC_EXEC2              %#RX32\n", u32Val));
-                rc = VMXReadVmcs32(VMX_VMCS32_CTRL_ENTRY, &u32Val);            AssertRC(rc);
+                rc = VMXReadVmcs32(VMX_VMCS32_CTRL_ENTRY, &u32Val);                     AssertRC(rc);
                 Log(("VMX_VMCS32_CTRL_ENTRY                   %#RX32\n", u32Val));
-                rc = VMXReadVmcs32(VMX_VMCS32_CTRL_EXIT, &u32Val);             AssertRC(rc);
+                rc = VMXReadVmcs32(VMX_VMCS32_CTRL_EXIT, &u32Val);                      AssertRC(rc);
                 Log(("VMX_VMCS32_CTRL_EXIT                    %#RX32\n", u32Val));
                 rc = VMXReadVmcs32(VMX_VMCS32_CTRL_CR3_TARGET_COUNT, &u32Val);          AssertRC(rc);
@@ -3906,19 +3906,19 @@
 
                 /* Guest bits. */
-                rc = VMXReadVmcsGstN(VMX_VMCS_GUEST_RIP, &u64Val);        AssertRC(rc);
+                rc = VMXReadVmcsGstN(VMX_VMCS_GUEST_RIP, &u64Val);          AssertRC(rc);
                 Log(("Old Guest Rip %#RX64 New %#RX64\n", pCtx->rip, u64Val));
-                rc = VMXReadVmcsGstN(VMX_VMCS_GUEST_RSP, &u64Val);        AssertRC(rc);
+                rc = VMXReadVmcsGstN(VMX_VMCS_GUEST_RSP, &u64Val);          AssertRC(rc);
                 Log(("Old Guest Rsp %#RX64 New %#RX64\n", pCtx->rsp, u64Val));
-                rc = VMXReadVmcs32(VMX_VMCS_GUEST_RFLAGS, &u32Val);       AssertRC(rc);
+                rc = VMXReadVmcs32(VMX_VMCS_GUEST_RFLAGS, &u32Val);         AssertRC(rc);
                 Log(("Old Guest Rflags %#RX32 New %#RX32\n", pCtx->eflags.u32, u32Val));
-                rc = VMXReadVmcs32(VMX_VMCS16_GUEST_FIELD_VPID, &u32Val); AssertRC(rc);
+                rc = VMXReadVmcs32(VMX_VMCS16_GUEST_FIELD_VPID, &u32Val);   AssertRC(rc);
                 Log(("VMX_VMCS16_GUEST_FIELD_VPID %u\n", u32Val));
 
                 /* Host bits. */
-                rc = VMXReadVmcsHstN(VMX_VMCS_HOST_CR0, &uHCReg); AssertRC(rc);
+                rc = VMXReadVmcsHstN(VMX_VMCS_HOST_CR0, &uHCReg);           AssertRC(rc);
                 Log(("Host CR0 %#RHr\n", uHCReg));
-                rc = VMXReadVmcsHstN(VMX_VMCS_HOST_CR3, &uHCReg); AssertRC(rc);
+                rc = VMXReadVmcsHstN(VMX_VMCS_HOST_CR3, &uHCReg);           AssertRC(rc);
                 Log(("Host CR3 %#RHr\n", uHCReg));
-                rc = VMXReadVmcsHstN(VMX_VMCS_HOST_CR4, &uHCReg); AssertRC(rc);
+                rc = VMXReadVmcsHstN(VMX_VMCS_HOST_CR4, &uHCReg);           AssertRC(rc);
                 Log(("Host CR4 %#RHr\n", uHCReg));
 
@@ -3926,5 +3926,5 @@
                 PCX86DESCHC pDesc;
                 ASMGetGDTR(&HostGdtr);
-                rc = VMXReadVmcs32(VMX_VMCS16_HOST_FIELD_CS, &u32Val);
+                rc = VMXReadVmcs32(VMX_VMCS16_HOST_FIELD_CS, &u32Val);      AssertRC(rc);
                 Log(("Host CS %#08x\n", u32Val));
                 if (u32Val < HostGdtr.cbGdt)
@@ -3934,5 +3934,5 @@
                 }
 
-                rc = VMXReadVmcs32(VMX_VMCS16_HOST_FIELD_DS, &u32Val); AssertRC(rc);
+                rc = VMXReadVmcs32(VMX_VMCS16_HOST_FIELD_DS, &u32Val);      AssertRC(rc);
                 Log(("Host DS %#08x\n", u32Val));
                 if (u32Val < HostGdtr.cbGdt)
@@ -3942,5 +3942,5 @@
                 }
 
-                rc = VMXReadVmcs32(VMX_VMCS16_HOST_FIELD_ES, &u32Val); AssertRC(rc);
+                rc = VMXReadVmcs32(VMX_VMCS16_HOST_FIELD_ES, &u32Val);      AssertRC(rc);
                 Log(("Host ES %#08x\n", u32Val));
                 if (u32Val < HostGdtr.cbGdt)
@@ -3950,5 +3950,5 @@
                 }
 
-                rc = VMXReadVmcs32(VMX_VMCS16_HOST_FIELD_FS, &u32Val); AssertRC(rc);
+                rc = VMXReadVmcs32(VMX_VMCS16_HOST_FIELD_FS, &u32Val);      AssertRC(rc);
                 Log(("Host FS %#08x\n", u32Val));
                 if (u32Val < HostGdtr.cbGdt)
@@ -3958,5 +3958,5 @@
                 }
 
-                rc = VMXReadVmcs32(VMX_VMCS16_HOST_FIELD_GS, &u32Val); AssertRC(rc);
+                rc = VMXReadVmcs32(VMX_VMCS16_HOST_FIELD_GS, &u32Val);      AssertRC(rc);
                 Log(("Host GS %#08x\n", u32Val));
                 if (u32Val < HostGdtr.cbGdt)
@@ -3966,5 +3966,5 @@
                 }
 
-                rc = VMXReadVmcs32(VMX_VMCS16_HOST_FIELD_SS, &u32Val); AssertRC(rc);
+                rc = VMXReadVmcs32(VMX_VMCS16_HOST_FIELD_SS, &u32Val);      AssertRC(rc);
                 Log(("Host SS %#08x\n", u32Val));
                 if (u32Val < HostGdtr.cbGdt)
@@ -3974,5 +3974,5 @@
                 }
 
-                rc = VMXReadVmcs32(VMX_VMCS16_HOST_FIELD_TR,  &u32Val); AssertRC(rc);
+                rc = VMXReadVmcs32(VMX_VMCS16_HOST_FIELD_TR,  &u32Val);     AssertRC(rc);
                 Log(("Host TR %#08x\n", u32Val));
                 if (u32Val < HostGdtr.cbGdt)
@@ -3982,19 +3982,19 @@
                 }
 
-                rc = VMXReadVmcsHstN(VMX_VMCS_HOST_TR_BASE, &uHCReg); AssertRC(rc);
+                rc = VMXReadVmcsHstN(VMX_VMCS_HOST_TR_BASE, &uHCReg);       AssertRC(rc);
                 Log(("Host TR Base %#RHv\n", uHCReg));
-                rc = VMXReadVmcsHstN(VMX_VMCS_HOST_GDTR_BASE, &uHCReg); AssertRC(rc);
+                rc = VMXReadVmcsHstN(VMX_VMCS_HOST_GDTR_BASE, &uHCReg);     AssertRC(rc);
                 Log(("Host GDTR Base %#RHv\n", uHCReg));
-                rc = VMXReadVmcsHstN(VMX_VMCS_HOST_IDTR_BASE, &uHCReg); AssertRC(rc);
+                rc = VMXReadVmcsHstN(VMX_VMCS_HOST_IDTR_BASE, &uHCReg);     AssertRC(rc);
                 Log(("Host IDTR Base %#RHv\n", uHCReg));
-                rc = VMXReadVmcs32(VMX_VMCS32_HOST_SYSENTER_CS, &u32Val); AssertRC(rc);
+                rc = VMXReadVmcs32(VMX_VMCS32_HOST_SYSENTER_CS, &u32Val);   AssertRC(rc);
                 Log(("Host SYSENTER CS  %#08x\n", u32Val));
-                rc = VMXReadVmcsHstN(VMX_VMCS_HOST_SYSENTER_EIP, &uHCReg); AssertRC(rc);
+                rc = VMXReadVmcsHstN(VMX_VMCS_HOST_SYSENTER_EIP, &uHCReg);  AssertRC(rc);
                 Log(("Host SYSENTER EIP %#RHv\n", uHCReg));
-                rc = VMXReadVmcsHstN(VMX_VMCS_HOST_SYSENTER_ESP, &uHCReg); AssertRC(rc);
+                rc = VMXReadVmcsHstN(VMX_VMCS_HOST_SYSENTER_ESP, &uHCReg);  AssertRC(rc);
                 Log(("Host SYSENTER ESP %#RHv\n", uHCReg));
-                rc = VMXReadVmcsHstN(VMX_VMCS_HOST_RSP, &uHCReg); AssertRC(rc);
+                rc = VMXReadVmcsHstN(VMX_VMCS_HOST_RSP, &uHCReg);           AssertRC(rc);
                 Log(("Host RSP %#RHv\n", uHCReg));
-                rc = VMXReadVmcsHstN(VMX_VMCS_HOST_RIP, &uHCReg); AssertRC(rc);
+                rc = VMXReadVmcsHstN(VMX_VMCS_HOST_RIP, &uHCReg);           AssertRC(rc);
                 Log(("Host RIP %#RHv\n", uHCReg));
 # if HC_ARCH_BITS == 64 || defined(VBOX_WITH_HYBRID_32BIT_KERNEL)
@@ -4064,4 +4064,5 @@
 #endif /* VBOX_STRICT */
 
+
 /**
  * Executes the specified handler in 64-bit mode.
@@ -4126,5 +4127,5 @@
     STAM_PROFILE_ADV_STOP(&pVCpu->hm.s.StatWorldSwitch3264, z);
 
-    /** @todo replace with hmR0VmxEnterRootMode() and LeaveRootMode(). */
+    /** @todo replace with hmR0VmxEnterRootMode() and hmR0VmxLeaveRootMode(). */
     /* Make sure the VMX instructions don't cause #UD faults. */
     ASMSetCR4(ASMGetCR4() | X86_CR4_VMXE);
@@ -4206,5 +4207,5 @@
     AssertMsg(pCache->TestIn.HCPhysCpuPage == HCPhysCpuPage, ("%RHp vs %RHp\n", pCache->TestIn.HCPhysCpuPage, HCPhysCpuPage));
     AssertMsg(pCache->TestIn.HCPhysVmcs    == pVCpu->hm.s.vmx.HCPhysVmcs, ("%RHp vs %RHp\n", pCache->TestIn.HCPhysVmcs,
-                                                                               pVCpu->hm.s.vmx.HCPhysVmcs));
+                                                                           pVCpu->hm.s.vmx.HCPhysVmcs));
     AssertMsg(pCache->TestIn.HCPhysVmcs    == pCache->TestOut.HCPhysVmcs, ("%RHp vs %RHp\n", pCache->TestIn.HCPhysVmcs,
                                                                            pCache->TestOut.HCPhysVmcs));
@@ -4214,5 +4215,5 @@
               ("%RGv vs %RGv\n", pCache->TestIn.pCache, VM_RC_ADDR(pVM, &pVM->aCpus[pVCpu->idCpu].hm.s.vmx.VMCSCache)));
     AssertMsg(pCache->TestIn.pCtx          == pCache->TestOut.pCtx, ("%RGv vs %RGv\n", pCache->TestIn.pCtx,
-                                                                    pCache->TestOut.pCtx));
+                                                                     pCache->TestOut.pCtx));
     Assert(!(pCache->TestOut.eflags & X86_EFL_IF));
 #endif
@@ -4233,10 +4234,10 @@
 static int hmR0VmxInitVmcsReadCache(PVM pVM, PVMCPU pVCpu)
 {
-#define VMXLOCAL_INIT_READ_CACHE_FIELD(pCache, idxField)                            \
-{                                                                                   \
-    Assert(pCache->Read.aField[idxField##_CACHE_IDX] == 0);                         \
-    pCache->Read.aField[idxField##_CACHE_IDX] = idxField;                           \
-    pCache->Read.aFieldVal[idxField##_CACHE_IDX] = 0;                               \
-    ++cReadFields;                                                                  \
+#define VMXLOCAL_INIT_READ_CACHE_FIELD(pCache, idxField)       \
+{                                                              \
+    Assert(pCache->Read.aField[idxField##_CACHE_IDX] == 0);    \
+    pCache->Read.aField[idxField##_CACHE_IDX] = idxField;      \
+    pCache->Read.aFieldVal[idxField##_CACHE_IDX] = 0;          \
+    ++cReadFields;                                             \
 }
 
@@ -4246,5 +4247,10 @@
     uint32_t cReadFields = 0;
 
-    /* Guest-natural selector base fields */
+    /*
+     * Don't remove the #if 0'd fields in this code. They're listed here for consistency
+     * and serve to indicate exceptions to the rules.
+     */
+
+    /* Guest-natural selector base fields. */
 #if 0
     /* These are 32-bit in practice. See Intel spec. 2.5 "Control Registers". */
@@ -5202,6 +5208,7 @@
  *
  * @remarks No-long-jump zone!!!
- * @remarks Never call this function directly. Use the VMXLOCAL_READ_SEG() macro
- *          as that takes care of whether to read from the VMCS cache or not.
+ * @remarks Never call this function directly!!! Use the VMXLOCAL_READ_SEG()
+ *          macro as that takes care of whether to read from the VMCS cache or
+ *          not.
  */
 DECLINLINE(int) hmR0VmxReadSegmentReg(PVMCPU pVCpu, uint32_t idxSel, uint32_t idxLimit, uint32_t idxBase, uint32_t idxAccess,
@@ -5242,4 +5249,5 @@
     return VINF_SUCCESS;
 }
+
 
 #ifdef VMX_USE_CACHED_VMCS_ACCESSES
@@ -5252,4 +5260,5 @@
                           VMX_VMCS_GUEST_##Sel##_BASE, VMX_VMCS32_GUEST_##Sel##_ACCESS_RIGHTS, &pMixedCtx->CtxSel)
 #endif
+
 
 /**
@@ -5689,4 +5698,5 @@
 
     Log(("HM event->TRPM: uVector=%#x enmTrapType=%d\n", uVector, enmTrapType));
+
     int rc = TRPMAssertTrap(pVCpu, uVector, enmTrapType);
     AssertRC(rc);
@@ -7580,4 +7590,5 @@
 {
     VMX_VALIDATE_EXIT_HANDLER_PARAMS();
+
     /* We expose XSETBV to the guest, fallback to the recompiler for emulation. */
     /** @todo check if XSETBV is supported by the recompiler. */
@@ -7592,4 +7603,5 @@
 {
     VMX_VALIDATE_EXIT_HANDLER_PARAMS();
+
     /* The guest should not invalidate the host CPU's TLBs, fallback to recompiler. */
     /** @todo implement EMInterpretInvpcid() */
@@ -7682,4 +7694,5 @@
 {
     VMX_VALIDATE_EXIT_HANDLER_PARAMS();
+
     /* By default, we don't enable VMX_VMCS_CTRL_PROC_EXEC2_DESCRIPTOR_TABLE_EXIT. */
     STAM_COUNTER_INC(&pVCpu->hm.s.StatExitXdtrAccess);
@@ -7697,4 +7710,5 @@
 {
     VMX_VALIDATE_EXIT_HANDLER_PARAMS();
+
     /* By default, we don't enable VMX_VMCS_CTRL_PROC_EXEC2_RDRAND_EXIT. */
     STAM_COUNTER_INC(&pVCpu->hm.s.StatExitRdrand);
@@ -7712,4 +7726,5 @@
 {
     VMX_VALIDATE_EXIT_HANDLER_PARAMS();
+
     /* EMInterpretRdmsr() requires CR0, Eflags and SS segment register. */
     int rc  = hmR0VmxSaveGuestCR0(pVCpu, pMixedCtx);
@@ -7843,4 +7858,5 @@
 {
     VMX_VALIDATE_EXIT_HANDLER_PARAMS();
+
     /* By default, we don't enable VMX_VMCS_CTRL_PROC_EXEC_PAUSE_EXIT. */
     STAM_COUNTER_INC(&pVCpu->hm.s.StatExitPause);
