VirtualBox

Changeset 4622 in vbox


Ignore:
Timestamp:
Sep 8, 2007 6:28:46 AM (17 years ago)
Author:
vboxsync
Message:

FreeBSD if_pcn fixes:

  • pci subsystem id and subsystem vendor id BCR registers (prevent it from being recognized.
  • Support reading the EPROM in words or dword too. (dword is used by if_pcn).
  • Fixed issue with switching to dword mode (incorrect address check).
  • Fixed the most obvious issues wrt to the init procedure described in Appendix C.
File:
1 edited

Legend:

Unmodified
Added
Removed

  • trunk/src/VBox/Devices/Network/DevPCNet.cpp

    r4565 r4622  
    4747 */
    4848
    49 /** To enable the PDMThread based send thread code. 
    50  * This is just a emergency switch in case changes doesn't quite work and 
     49/** To enable the PDMThread based send thread code.
     50 * This is just a emergency switch in case changes doesn't quite work and
    5151 * we want to get 1.5 out.
    5252 * @todo cleanup after 1.5.  */
    … …  
    204204    /** If set the link is temporarily down because of a saved state load. */
    205205    bool                                fLinkTempDown;
    206     /** This flag is set on SavePrep to prevent altering of memory after pgmR3Save() was called 
    207      * @todo r=bird: This is inadequate, we are not supposed to do anything at all while the VM 
     206    /** This flag is set on SavePrep to prevent altering of memory after pgmR3Save() was called
     207     * @todo r=bird: This is inadequate, we are not supposed to do anything at all while the VM
    208208     *               isn't running. Naturally, the problem really lies with the driver and not
    209209     *               the pcnet code. We will have to address this properly at some time. */
    … …  
    229229#else
    230230    RTTHREAD                            hSendThread;
    231 #endif 
     231#endif
    232232
    233233    /** Access critical section. */
    … …  
    317317#define BCR_INTCON      21  /* Reserved */
    318318#define BCR_PLAT        22
    319 #define BCR_PCISID      23
    320 #define BCR_PCISVID     24
     319#define BCR_PCISVID     23
     320#define BCR_PCISID      24
    321321#define BCR_SRAMSIZ     25
    322322#define BCR_SRAMB       26
    … …  
    20632063                        if (VBOX_FAILURE(rc))
    20642064                            return rc; /* can happen during termination */
    2065 #endif 
     2065#endif
    20662066                    }
    20672067                }
    … …  
    21742174                        if (VBOX_FAILURE(rc))
    21752175                            return rc; /* can happen during termination */
    2176 #endif 
     2176#endif
    21772177                    }
    21782178                    else if (CSR_LOOP(pData) && !fDropFrame)
    … …  
    22382238
    22392239#ifdef USE_PDMTHREAD
    2240 /** 
     2240/**
    22412241 * Async I/O thread for delayed sending of packets.
    2242  * 
     2242 *
    22432243 * @returns VBox status code. Returning failure will naturally terminate the thread.
    22442244 * @param   pDevIns     The pcnet device instance.
    … …  
    22522252     * We can enter this function in two states, initializing or resuming.
    22532253     *
    2254      * The idea about the initializing bit is that we can do per-thread 
     2254     * The idea about the initializing bit is that we can do per-thread
    22552255     * initialization while the creator thread can still pick up errors.
    22562256     * At present, there is nothing to init, or at least nothing that
    … …  
    22612261
    22622262    /*
    2263      * Stay in the run-loop until we're supposed to leave the 
     2263     * Stay in the run-loop until we're supposed to leave the
    22642264     * running state. If something really bad happens, we'll
    22652265     * quit the loop while in the running state and return
    … …  
    22782278
    22792279        /*
    2280          * Perform async send. Mind that we might be requested to 
     2280         * Perform async send. Mind that we might be requested to
    22812281         * suspended while waiting for the critical section.
    22822282         */
    … …  
    23002300/**
    23012301 * Unblock the send thread so it can respond to a state change.
    2302  * 
     2302 *
    23032303 * @returns VBox status code.
    23042304 * @param   pDevIns     The pcnet device instance.
    … …  
    24782478        case 22: /* NRBAL */
    24792479        case 23: /* NRBAU */
    2480         case 24: /* BADRL */
    2481         case 25: /* BADRU */
    24822480        case 26: /* NRDAL */
    24832481        case 27: /* NRDAU */
    24842482        case 28: /* CRDAL */
    24852483        case 29: /* CRDAU */
    2486         case 30: /* BADXL */
    2487         case 31: /* BADXU */
    24882484        case 32: /* NXDAL */
    24892485        case 33: /* NXDAU */
    … …  
    25042500        case 72: /* RCVRC */
    25052501        case 74: /* XMTRC */
    2506         case 76: /* RCVRL */ /** @todo call pcnetUpdateRingHandlers */
    2507                              /** @todo receive ring length is stored in two's complement! */
    2508         case 78: /* XMTRL */ /** @todo call pcnetUpdateRingHandlers */
    2509                              /** @todo transmit ring length is stored in two's complement! */
    25102502        case 112: /* MISSC */
    25112503            if (CSR_STOP(pData) || CSR_SPND(pData))
    … …  
    25492541        case 17: /* IADRH */
    25502542            return pcnetCSRWriteU16(pData, 2, val);
     2543
     2544        /*
     2545         * 24 and 25 are the Base Address of Receive Descriptor.
     2546         * We combine and mirror these in GCRDRA.
     2547         */
     2548        case 24: /* BADRL */
     2549        case 25: /* BADRU */
     2550            if (!CSR_STOP(pData) && !CSR_SPND(pData))
     2551            {
     2552                Log(("PCNet#%d: WRITE CSR%d, %#06x !!\n", PCNETSTATE_2_DEVINS(pData)->iInstance, u32RAP, val));
     2553                return rc;
     2554            }
     2555            if (u32RAP == 24)
     2556                pData->GCRDRA = (pData->GCRDRA & 0xffff0000) | (val & 0x0000ffff);
     2557            else
     2558                pData->GCRDRA = (pData->GCRDRA & 0x0000ffff) | ((val & 0x0000ffff) << 16);
     2559            Log(("PCNet#%d: WRITE CSR%d, %#06x => GCRDRA=%08x (alt init)\n", PCNETSTATE_2_DEVINS(pData)->iInstance,
     2560                 u32RAP, val, pData->GCRDRA));
     2561            break;
     2562
     2563        /*
     2564         * 30 & 31 are the Base Address of Transmit Descriptor.
     2565         * We combine and mirrorthese in GCTDRA.
     2566         */
     2567        case 30: /* BADXL */
     2568        case 31: /* BADXU */
     2569            if (!CSR_STOP(pData) && !CSR_SPND(pData))
     2570            {
     2571                Log(("PCNet#%d: WRITE CSR%d, %#06x !!\n", PCNETSTATE_2_DEVINS(pData)->iInstance, u32RAP, val));
     2572                return rc;
     2573            }
     2574            if (u32RAP == 30)
     2575                pData->GCTDRA = (pData->GCTDRA & 0xffff0000) | (val & 0x0000ffff);
     2576            else
     2577                pData->GCTDRA = (pData->GCTDRA & 0x0000ffff) | ((val & 0x0000ffff) << 16);
     2578            Log(("PCNet#%d: WRITE CSR%d, %#06x => GCTDRA=%08x (alt init)\n", PCNETSTATE_2_DEVINS(pData)->iInstance,
     2579                 u32RAP, val, pData->GCTDRA));
     2580            break;
     2581
    25512582        case 58: /* Software Style */
    25522583            LOG_REGISTER(("PCNet#%d: WRITE SW_STYLE, %#06x\n",
    … …  
    25542585            rc = pcnetBCRWriteU16(pData, BCR_SWS, val);
    25552586            break;
     2587
     2588        /*
     2589         * Registers 76 and 78 aren't stored correctly (see todos), but I'm don't dare
     2590         * try fix that right now. So, as a quick hack for 'alt init' I'll just correct them here.
     2591         */
     2592        case 76: /* RCVRL */ /** @todo call pcnetUpdateRingHandlers */
     2593                             /** @todo receive ring length is stored in two's complement! */
     2594        case 78: /* XMTRL */ /** @todo call pcnetUpdateRingHandlers */
     2595                             /** @todo transmit ring length is stored in two's complement! */
     2596            if (!CSR_STOP(pData) && !CSR_SPND(pData))
     2597            {
     2598                Log(("PCNet#%d: WRITE CSR%d, %#06x !!\n", PCNETSTATE_2_DEVINS(pData)->iInstance, u32RAP, val));
     2599                return rc;
     2600            }
     2601            Log(("PCNet#%d: WRITE CSR%d, %#06x (hacked %#06x) (alt init)\n", PCNETSTATE_2_DEVINS(pData)->iInstance,
     2602                 u32RAP, val, 1 + ~(uint16_t)val));
     2603            val = 1 + ~(uint16_t)val;
     2604
     2605            /*
     2606             * HACK ALERT! Set the counter registers too.
     2607             */
     2608            pData->aCSR[u32RAP - 4] = val;
     2609            break;
     2610
    25562611        default:
    25572612            return rc;
    … …  
    28212876    pData->iLog2DescSize   = 3;
    28222877    pData->aBCR[BCR_PLAT ] = 0xff06;
     2878    pData->aBCR[BCR_PCIVID] = PCIDevGetVendorId(&pData->PciDev);
     2879    pData->aBCR[BCR_PCISID] = PCIDevGetSubSystemId(&pData->PciDev);
     2880    pData->aBCR[BCR_PCISVID] = PCIDevGetSubSystemVendorId(&pData->PciDev);
    28232881
    28242882    pcnetSoftReset(pData);
    … …  
    28702928        }
    28712929    }
     2930    else
     2931        Log(("#%d pcnetIoportWriteU16: addr=%#010x val=%#06x BCR_DWIO !!\n", PCNETSTATE_2_DEVINS(pData)->iInstance, addr, val));
    28722932
    28732933    return rc;
    … …  
    29062966        }
    29072967    }
     2968    else
     2969        Log(("#%d pcnetIoportReadU16: addr=%#010x val=%#06x BCR_DWIO !!\n", PCNETSTATE_2_DEVINS(pData)->iInstance, addr, val & 0xffff));
     2970
    29082971    pcnetUpdateIrq(pData);
    29092972
    … …  
    29413004        }
    29423005    }
    2943     else if (addr == 0)
     3006    else if ((addr & 0x0f) == 0)
    29443007    {
    29453008        /* switch device to dword I/O mode */
    … …  
    29493012#endif
    29503013    }
     3014    else
     3015        Log(("#%d pcnetIoportWriteU32: addr=%#010x val=%#010x !BCR_DWIO !!\n", PCNETSTATE_2_DEVINS(pData)->iInstance, addr, val));
    29513016
    29523017    return rc;
    … …  
    29853050        }
    29863051    }
     3052    else
     3053        Log(("#%d pcnetIoportReadU32: addr=%#010x val=%#010x !BCR_DWIO !!\n", PCNETSTATE_2_DEVINS(pData)->iInstance, addr, val));
    29873054    pcnetUpdateIrq(pData);
    29883055
    … …  
    31103177    PCNetState *pData = PDMINS2DATA(pDevIns, PCNetState *);
    31113178    int        rc;
    3112     if (cb == 1)
    3113     {
    3114         STAM_PROFILE_ADV_START(&pData->StatAPROMRead, a);
    3115         rc = PDMCritSectEnter(&pData->CritSect, VINF_IOM_HC_IOPORT_WRITE);
    3116         if (rc == VINF_SUCCESS)
     3179
     3180    STAM_PROFILE_ADV_START(&pData->StatAPROMRead, a);
     3181    rc = PDMCritSectEnter(&pData->CritSect, VINF_IOM_HC_IOPORT_WRITE);
     3182    if (rc == VINF_SUCCESS)
     3183    {
     3184
     3185        /* FreeBSD is accessing in dwords. */
     3186        if (cb == 1)
     3187            *pu32 = pcnetAPROMReadU8(pData, Port);
     3188        else if (cb == 2 && !BCR_DWIO(pData))
     3189            *pu32 = pcnetAPROMReadU8(pData, Port)
     3190                  | (pcnetAPROMReadU8(pData, Port + 1) << 8);
     3191        else if (cb == 4 && BCR_DWIO(pData))
     3192            *pu32 = pcnetAPROMReadU8(pData, Port)
     3193                  | (pcnetAPROMReadU8(pData, Port + 1) << 8)
     3194                  | (pcnetAPROMReadU8(pData, Port + 2) << 16)
     3195                  | (pcnetAPROMReadU8(pData, Port + 3) << 24);
     3196        else
    31173197        {
    3118             *pu32 = pcnetAPROMReadU8(pData, Port);
    3119             PDMCritSectLeave(&pData->CritSect);
     3198            Log(("#%d pcnetIOPortAPromRead: Port=%RTiop cb=%d BCR_DWIO !!\n", PCNETSTATE_2_DEVINS(pData)->iInstance, Port, cb));
     3199            rc = VERR_IOM_IOPORT_UNUSED;
    31203200        }
    3121         STAM_PROFILE_ADV_STOP(&pData->StatAPROMRead, a);
    3122     }
    3123     else
    3124         rc =  VERR_IOM_IOPORT_UNUSED;
     3201        PDMCritSectLeave(&pData->CritSect);
     3202    }
     3203    STAM_PROFILE_ADV_STOP(&pData->StatAPROMRead, a);
    31253204    LogFlow(("#%d pcnetIOPortAPromRead: Port=%RTiop *pu32=%#RX32 cb=%d rc=%Vrc\n",
    31263205             PCNETSTATE_2_DEVINS(pData)->iInstance, Port, *pu32, cb, rc));
    … …  
    38093888    SSMR3GetU64(pSSMHandle, &pData->u64LastPoll);
    38103889    SSMR3GetMem(pSSMHandle, &Mac, sizeof(Mac));
    3811     Assert(     !memcmp(&Mac, &pData->MacConfigured, sizeof(Mac)) 
     3890    Assert(     !memcmp(&Mac, &pData->MacConfigured, sizeof(Mac))
    38123891           ||   SSMR3HandleGetAfter(pSSMHandle) == SSMAFTER_DEBUG_IT);
    38133892    SSMR3GetBool(pSSMHandle, &pData->fAm79C973);
    … …  
    39224001        if (cb > 70) /* unqualified guess */
    39234002            pData->Led.Asserted.s.fReading = pData->Led.Actual.s.fReading = 1;
    3924         pcnetReceiveNoSync(pData, (const uint8_t*)pvBuf, cb);
     4003        pcnetReceiveNoSync(pData, (const uint8_t *)pvBuf, cb);
    39254004        pData->Led.Actual.s.fReading = 0;
    39264005    }
    … …  
    40894168    {
    40904169#ifdef USE_PDMTHREAD
    4091         /* 
     4170        /*
    40924171         * At this point the send thread is suspended and will not enter
    4093          * this module again. So, no coordination is needed here and PDM 
     4172         * this module again. So, no coordination is needed here and PDM
    40944173         * will take care of terminating and cleaning up the thread.
    40954174         */
    … …  
    41054184        PDMCritSectLeave(&pData->CritSect);
    41064185        PDMR3CritSectDelete(&pData->CritSect);
    4107 #endif 
     4186#endif
    41084187    }
    41094188    return VINF_SUCCESS;
    … …  
    43824461    rc = RTThreadCreate(&pData->hSendThread, pcnetAsyncSend, (void *)pData, 128*1024, RTTHREADTYPE_IO, 0, "PCNET_SEND");
    43834462    AssertRC(rc);
    4384 #endif 
     4463#endif
    43854464
    43864465#ifdef VBOX_WITH_STATISTICS
Note: See TracChangeset for help on using the changeset viewer.

© 2024 Oracle Support Privacy / Do Not Sell My Info Terms of Use Trademark Policy Automated Access Etiquette