- Timestamp:
- May 27, 2013 1:44:19 PM (12 years ago)
- Location:
- trunk/src/VBox/VMM
- Files:
-
- 3 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/VMM/VMMAll/CPUMAllRegs.cpp
r46165 r46286 1971 1971 } 1972 1972 1973 case CPUMCPUIDFEATURE_SYSCALL: 1974 { 1975 if (pVM->cpum.s.aGuestCpuIdExt[0].eax >= 0x80000001) 1976 return !!(pVM->cpum.s.aGuestCpuIdExt[1].edx & X86_CPUID_EXT_FEATURE_EDX_SYSCALL); 1977 } 1978 1973 1979 case CPUMCPUIDFEATURE_RDTSCP: 1974 1980 { -
trunk/src/VBox/VMM/VMMR0/HMVMXR0.cpp
r46284 r46286 2323 2323 if (u32HostExtFeatures & (X86_CPUID_EXT_FEATURE_EDX_NX | X86_CPUID_EXT_FEATURE_EDX_LONG_MODE)) 2324 2324 { 2325 uint64_t u64HostEfer = ASMRdMsr(MSR_K6_EFER); 2326 2327 #if HC_ARCH_BITS == 64 2328 /* Paranoia. 64-bit code requires these bits to be set always. */ 2329 Assert(u64HostEfer & (MSR_K6_EFER_LMA | MSR_K6_EFER_LME) == (MSR_K6_EFER_LMA | MSR_K6_EFER_LME)); 2330 /* All our supported 64-bit host platforms must have NXE bit set. Otherwise we can change the below code to save EFER. */ 2331 Assert(u64HostEfer & (MSR_K6_EFER_NXE)); 2332 2333 /* The SCE bit is only applicable in 64-bit mode. Save EFER if it doesn't match what the guest has. 2334 See Intel spec. 30.10.4.3 "Handling the SYSCALL and SYSRET Instructions". */ 2335 if (CPUMIsGuestInLongMode(pVCpu)) 2336 { 2337 uint64_t u64GuestEfer; 2338 rc = CPUMQueryGuestMsr(pVCpu, MSR_K6_EFER, &u64GuestEfer); 2339 AssertRC(rc); 2340 2341 if ((u64HostEfer & MSR_K6_EFER_SCE) != (u64GuestEfer & MSR_K6_EFER_SCE)) 2342 { 2343 pHostMsr->u32IndexMSR = MSR_K6_EFER; 2344 pHostMsr->u32Reserved = 0; 2345 pHostMsr->u64Value = u64HostEfer; 2346 pHostMsr++; cHostMsrs++; 2347 } 2348 } 2349 #else /* HC_ARCH_BITS != 64 */ 2325 2350 pHostMsr->u32IndexMSR = MSR_K6_EFER; 2326 2351 pHostMsr->u32Reserved = 0; … … 2329 2354 { 2330 2355 /* Must match the EFER value in our 64 bits switcher. */ 2331 pHostMsr->u64Value = ASMRdMsr(MSR_K6_EFER)| MSR_K6_EFER_LME | MSR_K6_EFER_SCE | MSR_K6_EFER_NXE;2356 pHostMsr->u64Value = u64HostEfer | MSR_K6_EFER_LME | MSR_K6_EFER_SCE | MSR_K6_EFER_NXE; 2332 2357 } 2333 2358 else 2334 2359 # endif 2335 pHostMsr->u64Value = ASMRdMsr(MSR_K6_EFER);2360 pHostMsr->u64Value = u64HostEfer; 2336 2361 pHostMsr++; cHostMsrs++; 2362 #endif /* HC_ARCH_BITS == 64 */ 2337 2363 } 2338 2364 … … 2487 2513 val |= VMX_VMCS_CTRL_EXIT_SAVE_DEBUG; 2488 2514 2489 /* Set the host long mode active (EFER.LMA) bit (which Intel calls "Host address-space size") if necessary. */ 2515 /* 2516 * Set the host long mode active (EFER.LMA) bit (which Intel calls "Host address-space size") if necessary. 2517 * On VM-exit, VT-x sets both the host EFER.LMA and EFER.LME bit to this value. See assertion in hmR0VmxSaveHostMsrs(). 2518 */ 2490 2519 #if HC_ARCH_BITS == 64 || defined(VBOX_WITH_HYBRID_32BIT_KERNEL) 2491 2520 if (HMVMX_IS_64BIT_HOST_MODE()) … … 3719 3748 /** @todo support save IA32_EFER, i.e. 3720 3749 * VMX_VMCS_CTRL_EXIT_SAVE_GUEST_EFER_MSR, in which case the 3721 * guest EFER need not be part of the VM-entry MSR-load area. */ 3750 * guest EFER need not be part of the VM-entry MSR-load area. Also 3751 * allow the guest to read EFER without causing a VM-exit when 3752 * possible. */ 3753 /* Do -not- load guest EFER as we don't save/restore the host EFER always. See hmr0VmxSaveHostMsrs() */ 3754 #if 0 3722 3755 pGuestMsr->u32IndexMSR = MSR_K6_EFER; 3723 3756 pGuestMsr->u32Reserved = 0; … … 3727 3760 pGuestMsr->u64Value &= ~(MSR_K6_EFER_LMA | MSR_K6_EFER_LME); 3728 3761 pGuestMsr++; cGuestMsrs++; 3762 #endif 3729 3763 if (fSupportsLongMode) 3730 3764 { -
trunk/src/VBox/VMM/include/HMInternal.h
r46267 r46286 682 682 PGMMODE enmPrevGuestMode; 683 683 #else 684 /** Which host-state bits to restore before being preempted. */ 684 685 uint32_t fRestoreHostFlags; 686 /** The host-state restoration structure. */ 685 687 VMXRESTOREHOST RestoreHost; 686 688 /** Set if guest was executing in real mode (extra checks). */
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