Changeset 46358 in vbox
- Timestamp:
- Jun 3, 2013 10:21:12 AM (12 years ago)
- svn:sync-xref-src-repo-rev:
- 86172
- Location:
- trunk/src/VBox/VMM
- Files:
-
- 3 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/VMM/VMMR0/HMR0.cpp
r46357 r46358 1432 1432 /* Always reload the host context and the guest's CR0 register for the FPU bits (#NM, #MF, CR0.NE, CR0.TS, CR0.MP). */ 1433 1433 pVCpu->hm.s.fContextUseFlags |= HM_CHANGED_GUEST_CR0 | HM_CHANGED_HOST_CONTEXT; 1434 1435 /* Setup the register and mask according to the current execution mode. */1436 if (pCtx->msrEFER & MSR_K6_EFER_LMA)1437 pVM->hm.s.u64RegisterMask = UINT64_C(0xFFFFFFFFFFFFFFFF);1438 else1439 pVM->hm.s.u64RegisterMask = UINT64_C(0xFFFFFFFF);1440 1434 1441 1435 /* Enable VT-x or AMD-V if local init is required, or enable if it's a -
trunk/src/VBox/VMM/include/HMInternal.h
r46304 r46358 297 297 bool fTPRPatchingActive; 298 298 bool u8Alignment[7]; 299 300 /** And mask for copying register contents. */301 uint64_t u64RegisterMask;302 299 303 300 /** Maximum ASID allowed. */ -
trunk/src/VBox/VMM/testcase/tstVMStructSize.cpp
r45528 r46358 402 402 403 403 /* hm - 32-bit gcc won't align uint64_t naturally, so check. */ 404 CHECK_MEMBER_ALIGNMENT(HM, u 64RegisterMask, 8);404 CHECK_MEMBER_ALIGNMENT(HM, uMaxAsid, 8); 405 405 CHECK_MEMBER_ALIGNMENT(HM, vmx.hostCR4, 8); 406 406 CHECK_MEMBER_ALIGNMENT(HM, vmx.msr.feature_ctrl, 8);
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