Changeset 46548 in vbox for trunk/src/VBox/VMM/testcase
- Timestamp:
- Jun 14, 2013 9:42:21 AM (11 years ago)
- Location:
- trunk/src/VBox/VMM/testcase
- Files:
-
- 2 edited
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Instructions/env-common.mac (modified) (1 diff)
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tstX86-1A.asm (modified) (20 diffs)
Legend:
- Unmodified
- Added
- Removed
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trunk/src/VBox/VMM/testcase/Instructions/env-common.mac
r46543 r46548 129 129 %else 130 130 mov sBX, [VBINSTST_NAME(g_uVBInsTstSubTestIndicator)] 131 mov sCX, [xBP + 4 + x S] ; expected132 mov sAX, [xBP + 4 + x S+ 4] ; actual133 mov sDX, [xBP + 4 + x S+ 8] ; reg#131 mov sCX, [xBP + 4 + xCB] ; expected 132 mov sAX, [xBP + 4 + xCB + 4] ; actual 133 mov sDX, [xBP + 4 + xCB + 8] ; reg# 134 134 push sBX 135 135 push sCX -
trunk/src/VBox/VMM/testcase/tstX86-1A.asm
r40248 r46548 1522 1522 1523 1523 .failed3: 1524 add xSP, 20h + x S1524 add xSP, 20h + xCB 1525 1525 jmp .return 1526 1526 … … 1942 1942 push xDI 1943 1943 1944 lea xDI, [xSP + x S* 5]1944 lea xDI, [xSP + xCB * 5] 1945 1945 mov xCX, 512 / 4 1946 1946 mov eax, 0cccccccch … … 1954 1954 1955 1955 ; Save the FPU state. 1956 mov dword [xSP + x S+ X86FXSTATE.FPUIP], 01957 mov dword [xSP + x S+ X86FXSTATE.FPUCS], 01958 mov dword [xSP + x S+ X86FXSTATE.FPUDP], 01959 mov dword [xSP + x S+ X86FXSTATE.FPUDS], 01960 arch_fxsave [xSP + x S]1956 mov dword [xSP + xCB + X86FXSTATE.FPUIP], 0 1957 mov dword [xSP + xCB + X86FXSTATE.FPUCS], 0 1958 mov dword [xSP + xCB + X86FXSTATE.FPUDP], 0 1959 mov dword [xSP + xCB + X86FXSTATE.FPUDS], 0 1960 arch_fxsave [xSP + xCB] 1961 1961 1962 1962 ; Save GRegs (80h bytes). 1963 1963 %ifdef RT_ARCH_AMD64 1964 mov [xSP + 512 + x S+ 000h], xAX1965 mov [xSP + 512 + x S+ 008h], xBX1966 mov [xSP + 512 + x S+ 010h], xCX1967 mov [xSP + 512 + x S+ 018h], xDX1968 mov [xSP + 512 + x S+ 020h], xDI1969 mov [xSP + 512 + x S+ 028h], xSI1970 mov [xSP + 512 + x S+ 030h], xBP1971 mov [xSP + 512 + x S+ 038h], r81972 mov [xSP + 512 + x S+ 040h], r91973 mov [xSP + 512 + x S+ 048h], r101974 mov [xSP + 512 + x S+ 050h], r111975 mov [xSP + 512 + x S+ 058h], r121976 mov [xSP + 512 + x S+ 060h], r131977 mov [xSP + 512 + x S+ 068h], r141978 mov [xSP + 512 + x S+ 070h], r151964 mov [xSP + 512 + xCB + 000h], xAX 1965 mov [xSP + 512 + xCB + 008h], xBX 1966 mov [xSP + 512 + xCB + 010h], xCX 1967 mov [xSP + 512 + xCB + 018h], xDX 1968 mov [xSP + 512 + xCB + 020h], xDI 1969 mov [xSP + 512 + xCB + 028h], xSI 1970 mov [xSP + 512 + xCB + 030h], xBP 1971 mov [xSP + 512 + xCB + 038h], r8 1972 mov [xSP + 512 + xCB + 040h], r9 1973 mov [xSP + 512 + xCB + 048h], r10 1974 mov [xSP + 512 + xCB + 050h], r11 1975 mov [xSP + 512 + xCB + 058h], r12 1976 mov [xSP + 512 + xCB + 060h], r13 1977 mov [xSP + 512 + xCB + 068h], r14 1978 mov [xSP + 512 + xCB + 070h], r15 1979 1979 pushf 1980 1980 pop rax 1981 mov [xSP + 512 + x S+ 078h], rax1982 mov rax, [xSP + 512 + x S+ 000h]1981 mov [xSP + 512 + xCB + 078h], rax 1982 mov rax, [xSP + 512 + xCB + 000h] 1983 1983 %else 1984 mov [xSP + 512 + x S+ 000h], eax1985 mov [xSP + 512 + x S+ 004h], eax1986 mov [xSP + 512 + x S+ 008h], ebx1987 mov [xSP + 512 + x S+ 00ch], ebx1988 mov [xSP + 512 + x S+ 010h], ecx1989 mov [xSP + 512 + x S+ 014h], ecx1990 mov [xSP + 512 + x S+ 018h], edx1991 mov [xSP + 512 + x S+ 01ch], edx1992 mov [xSP + 512 + x S+ 020h], edi1993 mov [xSP + 512 + x S+ 024h], edi1994 mov [xSP + 512 + x S+ 028h], esi1995 mov [xSP + 512 + x S+ 02ch], esi1996 mov [xSP + 512 + x S+ 030h], ebp1997 mov [xSP + 512 + x S+ 034h], ebp1998 mov [xSP + 512 + x S+ 038h], eax1999 mov [xSP + 512 + x S+ 03ch], eax2000 mov [xSP + 512 + x S+ 040h], eax2001 mov [xSP + 512 + x S+ 044h], eax2002 mov [xSP + 512 + x S+ 048h], eax2003 mov [xSP + 512 + x S+ 04ch], eax2004 mov [xSP + 512 + x S+ 050h], eax2005 mov [xSP + 512 + x S+ 054h], eax2006 mov [xSP + 512 + x S+ 058h], eax2007 mov [xSP + 512 + x S+ 05ch], eax2008 mov [xSP + 512 + x S+ 060h], eax2009 mov [xSP + 512 + x S+ 064h], eax2010 mov [xSP + 512 + x S+ 068h], eax2011 mov [xSP + 512 + x S+ 06ch], eax2012 mov [xSP + 512 + x S+ 070h], eax2013 mov [xSP + 512 + x S+ 074h], eax1984 mov [xSP + 512 + xCB + 000h], eax 1985 mov [xSP + 512 + xCB + 004h], eax 1986 mov [xSP + 512 + xCB + 008h], ebx 1987 mov [xSP + 512 + xCB + 00ch], ebx 1988 mov [xSP + 512 + xCB + 010h], ecx 1989 mov [xSP + 512 + xCB + 014h], ecx 1990 mov [xSP + 512 + xCB + 018h], edx 1991 mov [xSP + 512 + xCB + 01ch], edx 1992 mov [xSP + 512 + xCB + 020h], edi 1993 mov [xSP + 512 + xCB + 024h], edi 1994 mov [xSP + 512 + xCB + 028h], esi 1995 mov [xSP + 512 + xCB + 02ch], esi 1996 mov [xSP + 512 + xCB + 030h], ebp 1997 mov [xSP + 512 + xCB + 034h], ebp 1998 mov [xSP + 512 + xCB + 038h], eax 1999 mov [xSP + 512 + xCB + 03ch], eax 2000 mov [xSP + 512 + xCB + 040h], eax 2001 mov [xSP + 512 + xCB + 044h], eax 2002 mov [xSP + 512 + xCB + 048h], eax 2003 mov [xSP + 512 + xCB + 04ch], eax 2004 mov [xSP + 512 + xCB + 050h], eax 2005 mov [xSP + 512 + xCB + 054h], eax 2006 mov [xSP + 512 + xCB + 058h], eax 2007 mov [xSP + 512 + xCB + 05ch], eax 2008 mov [xSP + 512 + xCB + 060h], eax 2009 mov [xSP + 512 + xCB + 064h], eax 2010 mov [xSP + 512 + xCB + 068h], eax 2011 mov [xSP + 512 + xCB + 06ch], eax 2012 mov [xSP + 512 + xCB + 070h], eax 2013 mov [xSP + 512 + xCB + 074h], eax 2014 2014 pushf 2015 2015 pop eax 2016 mov [xSP + 512 + x S+ 078h], eax2017 mov [xSP + 512 + x S+ 07ch], eax2018 mov eax, [xSP + 512 + x S+ 000h]2016 mov [xSP + 512 + xCB + 078h], eax 2017 mov [xSP + 512 + xCB + 07ch], eax 2018 mov eax, [xSP + 512 + xCB + 000h] 2019 2019 %endif 2020 2020 ret … … 2029 2029 ; 2030 2030 CompareFPUAndGRegsOnStack: 2031 lea xSP, [xSP - (1024 - x S)]2031 lea xSP, [xSP - (1024 - xCB)] 2032 2032 call SaveFPUAndGRegsToStack 2033 2033 … … 2037 2037 2038 2038 mov xCX, 640 2039 lea xSI, [xSP + x S*3]2039 lea xSI, [xSP + xCB*3] 2040 2040 lea xDI, [xSI + 1024] 2041 2041 … … 2045 2045 2046 2046 ;int3 2047 lea xAX, [xSP + x S*3]2047 lea xAX, [xSP + xCB*3] 2048 2048 xchg xAX, xSI 2049 2049 sub xAX, xSI … … 2060 2060 pop xDI 2061 2061 pop xSI 2062 lea xSP, [xSP + (1024 - x S)]2062 lea xSP, [xSP + (1024 - xCB)] 2063 2063 or eax, eax 2064 2064 ret … … 2073 2073 ; 2074 2074 CompareFPUAndGRegsOnStackIgnoreOpAndIp: 2075 lea xSP, [xSP - (1024 - x S)]2075 lea xSP, [xSP - (1024 - xCB)] 2076 2076 call SaveFPUAndGRegsToStack 2077 2077 … … 2081 2081 2082 2082 mov xCX, 640 2083 lea xSI, [xSP + x S*3]2083 lea xSI, [xSP + xCB*3] 2084 2084 lea xDI, [xSI + 1024] 2085 2085 … … 2094 2094 2095 2095 ;int3 2096 lea xAX, [xSP + x S*3]2096 lea xAX, [xSP + xCB*3] 2097 2097 xchg xAX, xSI 2098 2098 sub xAX, xSI … … 2109 2109 pop xDI 2110 2110 pop xSI 2111 lea xSP, [xSP + (1024 - x S)]2111 lea xSP, [xSP + (1024 - xCB)] 2112 2112 or eax, eax 2113 2113 ret … … 2494 2494 ; 2495 2495 ; @returns ZF=1 on success, ZF=0 on failure. 2496 ; @param xSP + x Sfxsave image followed by fnstenv.2496 ; @param xSP + xCB fxsave image followed by fnstenv. 2497 2497 ; @param xCX Opcode address (no prefixes). 2498 2498 ; … … 2504 2504 ; Check the IP. 2505 2505 %ifdef RT_ARCH_AMD64 2506 cmp rcx, [xBP + x S*2 + X86FXSTATE.FPUIP]2506 cmp rcx, [xBP + xCB*2 + X86FXSTATE.FPUIP] 2507 2507 %else 2508 cmp ecx, [xBP + x S*2 + X86FXSTATE.FPUIP]2508 cmp ecx, [xBP + xCB*2 + X86FXSTATE.FPUIP] 2509 2509 %endif 2510 2510 jne .failure1 … … 2512 2512 .check_fpucs: 2513 2513 mov ax, cs 2514 cmp ax, [xBP + x S*2 + 512 + X86FSTENV32P.FPUCS]2514 cmp ax, [xBP + xCB*2 + 512 + X86FSTENV32P.FPUCS] 2515 2515 jne .failure2 2516 2516 … … 2520 2520 and ax, 07ffh 2521 2521 2522 cmp ax, [xBP + x S*2 + X86FXSTATE.FOP]2522 cmp ax, [xBP + xCB*2 + X86FXSTATE.FOP] 2523 2523 je .success 2524 cmp ax, [xBP + x S*2 + 512 + X86FSTENV32P.FOP]2524 cmp ax, [xBP + xCB*2 + 512 + X86FSTENV32P.FOP] 2525 2525 je .success 2526 2526 2527 2527 ; xor ax, ax 2528 ; cmp ax, [xBP + x S*2 + X86FXSTATE.FOP]2528 ; cmp ax, [xBP + xCB*2 + X86FXSTATE.FOP] 2529 2529 ; jne .failure3 2530 2530 … … 2540 2540 ; fnstenv image instead even if that only contains the lower 32-bit. 2541 2541 xor eax, eax 2542 cmp xAX, [xBP + x S*2 + X86FXSTATE.FPUIP]2542 cmp xAX, [xBP + xCB*2 + X86FXSTATE.FPUIP] 2543 2543 jne .failure1_for_real 2544 cmp xAX, [xBP + x S*2 + X86FXSTATE.FPUDP]2544 cmp xAX, [xBP + xCB*2 + X86FXSTATE.FPUDP] 2545 2545 jne .failure1_for_real 2546 cmp ecx, [xBP + x S*2 + 512 + X86FSTENV32P.FPUIP]2546 cmp ecx, [xBP + xCB*2 + 512 + X86FSTENV32P.FPUIP] 2547 2547 je .check_fpucs 2548 2548 .failure1_for_real: … … 2638 2638 ; 2639 2639 ; @returns ZF=1 on success, ZF=0+EAX on failure. 2640 ; @param xSP + x Sfxsave image followed by fnstenv.2640 ; @param xSP + xCB fxsave image followed by fnstenv. 2641 2641 ; @param xCX Opcode address (no prefixes). 2642 2642 ; @param xDX Memory address (DS relative). … … 2649 2649 ; Check the memory operand. 2650 2650 %ifdef RT_ARCH_AMD64 2651 cmp rdx, [xBP + x S*2 + X86FXSTATE.FPUDP]2651 cmp rdx, [xBP + xCB*2 + X86FXSTATE.FPUDP] 2652 2652 %else 2653 cmp edx, [xBP + x S*2 + X86FXSTATE.FPUDP]2653 cmp edx, [xBP + xCB*2 + X86FXSTATE.FPUDP] 2654 2654 %endif 2655 2655 jne .failure1 … … 2657 2657 .check_fpuds: 2658 2658 mov ax, ds 2659 cmp ax, [xBP + x S*2 + 512 + X86FSTENV32P.FPUDS]2659 cmp ax, [xBP + xCB*2 + 512 + X86FSTENV32P.FPUDS] 2660 2660 jne .failure2 2661 2661 … … 2670 2670 ; if there is a flag controlling this anywhere... 2671 2671 xor eax, eax 2672 cmp xAX, [xBP + x S*2 + X86FXSTATE.FPUDP]2672 cmp xAX, [xBP + xCB*2 + X86FXSTATE.FPUDP] 2673 2673 jne .failure1_for_real 2674 cmp xAX, [xBP + x S*2 + X86FXSTATE.FPUIP]2674 cmp xAX, [xBP + xCB*2 + X86FXSTATE.FPUIP] 2675 2675 jne .failure1_for_real 2676 cmp edx, [xBP + x S*2 + 512 + X86FSTENV32P.FPUDP]2676 cmp edx, [xBP + xCB*2 + 512 + X86FSTENV32P.FPUDP] 2677 2677 je .check_fpuds 2678 2678 .failure1_for_real:
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