Changeset 46550 in vbox for trunk

Timestamp:

Jun 14, 2013 11:32:24 AM (12 years ago)

Author:

vboxsync

Message:

elf, gcc and 32-bit.

Location:

trunk

Files:

• include/iprt/asmdefs.mac (modified) (1 diff)
• src/VBox/VMM/testcase/Instructions/InstructionTestGen.py (modified) (8 diffs)

trunk/include/iprt/asmdefs.mac

@@ -138 +138 @@
   %define IMP2(name)    dword [IMPNAME(name)]
  %endif
+%elifdef ASM_FORMAT_ELF
+ %ifdef RT_ARCH_AMD64
+  %define IMP2(name)    qword [rel IMPNAME(name) wrt ..got]
+ %else
+  %define IMP2(name)    IMPNAME(name) wrt ..plt
+ %endif
+%elifdef ASM_FORMAT_MACHO
+ %ifdef RT_ARCH_AMD64
+  %define IMP2(name)    qword [IMPNAME(name) wrt rip]
+ %else
+  %define IMP2(name)    IMPNAME(name)
+ %endif
 %else
  %ifdef RT_ARCH_AMD64

trunk/src/VBox/VMM/testcase/Instructions/InstructionTestGen.py

@@ -103 +103 @@
                    'r8w', 'r9w', 'r10w', 'r11w', 'r12w', 'r13w', 'r14w', 'r15w');
 g_asGRegs8      = ('al',  'cl',  'dl',  'bl',  'ah',  'ah',  'dh',  'bh');
-g_asGRegs8_64   = ('al',  'cl',  'dl',  'bl',  'spl', 'bpl', 'sil',  'dil',
+g_asGRegs8_64   = ('al',  'cl',  'dl',  'bl',  'spl', 'bpl', 'sil',  'dil',        # pylint: disable=C0103
                    'r8b', 'r9b', 'r10b', 'r11b', 'r12b', 'r13b', 'r14b', 'r15b');
 ## @}
@@ -250 +250 @@
         self.sInstr = sInstr if sInstr else sName.split()[0];
 
+    def isApplicable(self, oGen):
+        """
+        Tests if the instruction test is applicable to the selected environment.
+        """
+        _ = oGen;
+        return True;
 
     def generateTest(self, oGen, sTestFnName):
-        """ Emits the test assembly code. """
+        """
+        Emits the test assembly code.
+        """
         oGen.write(';; @todo not implemented. This is for the linter: %s, %s\n' % (oGen, sTestFnName));
         return True;
@@ -302 +310 @@
         return True;
 
+    def generateOneStdTest(self, oGen, cbEffOp, cbMaxOp, iOp1, iOp2, uInput, uResult):
+        """ Generate one standard test. """
+        oGen.write('        call VBINSTST_NAME(Common_LoadKnownValues)\n');
+        oGen.write('        mov     %s, 0x%x\n' % (oGen.oTarget.asGRegs[iOp2], uInput,));
+        oGen.write('        push    %s\n' % (oGen.oTarget.asGRegs[iOp2],));
+        self.writeInstrGregGreg(cbEffOp, iOp1, iOp2, oGen);
+        oGen.pushConst(uResult, cbMaxOp);
+        oGen.write('        call VBINSTST_NAME(%s)\n' % (oGen.needGRegChecker(iOp1, iOp2),));
+        return True;
+
     def generateStandardTests(self, oGen):
         """ Generate standard tests. """
@@ -311 +329 @@
 
         for cbEffOp in self.acbOpVars:
+            if cbEffOp > cbMaxOp:
+                continue;
             for iOp1 in range(oGen.oTarget.getGRegCount()):
                 if oGen.oTarget.asGRegsNoSp[iOp1] is None:
@@ -318 +338 @@
                         continue;
                     for uInput in auInputs:
-                        uResult = self.fnCalcResult(cbEffOp, uInput, oGen.au64Regs[iOp1] if iOp1 != iOp2 else uInput, oGen);
+                        uResult = self.fnCalcResult(cbEffOp, uInput, oGen.auRegValues[iOp1] if iOp1 != iOp2 else uInput, oGen);
                         oGen.newSubTest();
-                        oGen.write('        call VBINSTST_NAME(Common_LoadKnownValues)\n');
-                        oGen.write('        mov     %s, 0x%x\n' % (oGen.oTarget.asGRegs[iOp2], uInput,));
-                        oGen.write('        push    %s\n' % (oGen.oTarget.asGRegs[iOp2],));
-                        self.writeInstrGregGreg(cbEffOp, iOp1, iOp2, oGen);
-                        oGen.pushConst(uResult, cbMaxOp);
-                        oGen.write('        call VBINSTST_NAME(%s)\n' % (oGen.needGRegChecker(iOp1, iOp2),));
+                        self.generateOneStdTest(oGen, cbEffOp, cbMaxOp, iOp1, iOp2, uInput, uResult);
+        return True;
 
     def generateTest(self, oGen, sTestFnName):
@@ -362 +378 @@
         return True;
 
+    def isApplicable(self, oGen):
+        return oGen.oTarget.is64Bit();
+
     @staticmethod
     def calc_movsxd(cbEffOp, uInput, uCur, oGen):
@@ -403 +422 @@
         self.au32Regs       = [(self.au64Regs[i] & UINT32_MAX) for i in range(8)];
         self.au16Regs       = [(self.au64Regs[i] & UINT16_MAX) for i in range(8)];
+        self.auRegValues    = self.au64Regs if self.oTarget.is64Bit() else self.au32Regs;
 
         # Declare state variables used while generating.
@@ -688 +708 @@
             for iInstrTest in range(iInstrTestStart, iInstrTestEnd):
                 oInstrTest = g_aoInstructionTests[iInstrTest];
-                self.write('%%ifdef ASM_CALL64_GCC\n'
-                           '        lea  rdi, [.szInstr%03u wrt rip]\n'
-                           '%%elifdef ASM_CALL64_MSC\n'
-                           '        lea  rcx, [.szInstr%03u wrt rip]\n'
-                           '%%else\n'
-                           '        mov  xAX, .szInstr%03u\n'
-                           '        mov  [xSP], xAX\n'
-                           '%%endif\n'
-                           '        VBINSTST_CALL_FN_SUB_TEST\n'
-                           '        call VBINSTST_NAME(%s)\n'
-                           % ( iInstrTest, iInstrTest, iInstrTest, self._calcTestFunctionName(oInstrTest, iInstrTest)));
+                if oInstrTest.isApplicable(self):
+                    self.write('%%ifdef ASM_CALL64_GCC\n'
+                               '        lea  rdi, [.szInstr%03u wrt rip]\n'
+                               '%%elifdef ASM_CALL64_MSC\n'
+                               '        lea  rcx, [.szInstr%03u wrt rip]\n'
+                               '%%else\n'
+                               '        mov  xAX, .szInstr%03u\n'
+                               '        mov  [xSP], xAX\n'
+                               '%%endif\n'
+                               '        VBINSTST_CALL_FN_SUB_TEST\n'
+                               '        call VBINSTST_NAME(%s)\n'
+                               % ( iInstrTest, iInstrTest, iInstrTest, self._calcTestFunctionName(oInstrTest, iInstrTest)));
 
             self.write('\n'