Changeset 46748 in vbox for trunk/src/VBox/VMM

Timestamp:

Jun 24, 2013 10:11:21 AM (12 years ago)

Author:

vboxsync

svn:sync-xref-src-repo-rev:

86675

Message:

VMM/HMSVMR0: nits.

File:

• trunk/src/VBox/VMM/VMMR0/HMSVMR0.cpp (modified) (4 diffs)

trunk/src/VBox/VMM/VMMR0/HMSVMR0.cpp

@@ -114 +114 @@
  * @name Exception bitmap mask for all contributory exceptions.
  *
- * Page fault is deliberately excluded here as it's conditional whether it's
- * contributory or benign. It's handled separately.
+ * Page fault is deliberately excluded here as it's conditional as to whether
+ * it's contributory or benign. Page faults are handled separately.
  */
 #define HMSVM_CONTRIBUTORY_XCPT_MASK  ( RT_BIT(X86_XCPT_GP) | RT_BIT(X86_XCPT_NP) | RT_BIT(X86_XCPT_SS) | RT_BIT(X86_XCPT_TS) \
@@ -2003 +2003 @@
             case X86_XCPT_AC:
             {
+                Event.n.u1ErrorCodeValid = 1;
                 Event.n.u32ErrorCode     = uErrCode;
-                Event.n.u1ErrorCodeValid = 1;
                 break;
             }
@@ -2912 +2912 @@
                     switch (Event.n.u8Vector)
                     {
+                        case X86_XCPT_DE:
+                            STAM_COUNTER_INC(&pVCpu->hm.s.StatExitGuestDE);
+                            break;
+
+                        case X86_XCPT_BP:
+                            /** Saves the wrong EIP on the stack (pointing to the int3) instead of the
+                             *  next instruction. */
+                            /** @todo Investigate this later. */
+                            break;
+
+                        case X86_XCPT_UD:
+                            STAM_COUNTER_INC(&pVCpu->hm.s.StatExitGuestUD);
+                            break;
+
+                        case X86_XCPT_NP:
+                            Event.n.u1ErrorCodeValid    = 1;
+                            Event.n.u32ErrorCode        = pVmcb->ctrl.u64ExitInfo1;
+                            STAM_COUNTER_INC(&pVCpu->hm.s.StatExitGuestNP);
+                            break;
+
+                        case X86_XCPT_SS:
+                            Event.n.u1ErrorCodeValid    = 1;
+                            Event.n.u32ErrorCode        = pVmcb->ctrl.u64ExitInfo1;
+                            STAM_COUNTER_INC(&pVCpu->hm.s.StatExitGuestSS);
+                            break;
+
                         case X86_XCPT_GP:
                             Event.n.u1ErrorCodeValid    = 1;
@@ -2917 +2943 @@
                             STAM_COUNTER_INC(&pVCpu->hm.s.StatExitGuestGP);
                             break;
-                        case X86_XCPT_BP:
-                            /** Saves the wrong EIP on the stack (pointing to the int3) instead of the
-                             *  next instruction. */
-                            /** @todo Investigate this later. */
-                            break;
-                        case X86_XCPT_DE:
-                            STAM_COUNTER_INC(&pVCpu->hm.s.StatExitGuestDE);
-                            break;
-                        case X86_XCPT_UD:
-                            STAM_COUNTER_INC(&pVCpu->hm.s.StatExitGuestUD);
-                            break;
-                        case X86_XCPT_SS:
-                            Event.n.u1ErrorCodeValid    = 1;
-                            Event.n.u32ErrorCode        = pVmcb->ctrl.u64ExitInfo1;
-                            STAM_COUNTER_INC(&pVCpu->hm.s.StatExitGuestSS);
-                            break;
-                        case X86_XCPT_NP:
-                            Event.n.u1ErrorCodeValid    = 1;
-                            Event.n.u32ErrorCode        = pVmcb->ctrl.u64ExitInfo1;
-                            STAM_COUNTER_INC(&pVCpu->hm.s.StatExitGuestNP);
-                            break;
                     }
+
                     Log4(("#Xcpt: Vector=%#x at CS:RIP=%04x:%RGv\n", Event.n.u8Vector, pCtx->cs.Sel, (RTGCPTR)pCtx->rip));
                     hmR0SvmSetPendingEvent(pVCpu, &Event, 0 /* GCPtrFaultAddress */);