Changeset 46762 in vbox for trunk/src/VBox/VMM

Timestamp:

Jun 24, 2013 5:05:11 PM (12 years ago)

Author:

vboxsync

svn:sync-xref-src-repo-rev:

86690

Message:

VMM/HMSVMR0: AMD-V bits. Boots past the BIOS.

File:

• trunk/src/VBox/VMM/VMMR0/HMSVMR0.cpp (modified) (17 diffs)

trunk/src/VBox/VMM/VMMR0/HMSVMR0.cpp

@@ -32 +32 @@
 
 #ifdef DEBUG_ramshankar
+# define HMVMX_SYNC_FULL_GUEST_STATE
 # define HMSVM_ALWAYS_TRAP_ALL_XCPTS
 # define HMSVM_ALWAYS_TRAP_PF
@@ -1193 +1194 @@
     {
         HMSVM_LOAD_SEG_REG(CS, cs);
-        HMSVM_LOAD_SEG_REG(SS, cs);
-        HMSVM_LOAD_SEG_REG(DS, cs);
-        HMSVM_LOAD_SEG_REG(ES, cs);
-        HMSVM_LOAD_SEG_REG(FS, cs);
-        HMSVM_LOAD_SEG_REG(GS, cs);
+        HMSVM_LOAD_SEG_REG(SS, ss);
+        HMSVM_LOAD_SEG_REG(DS, ds);
+        HMSVM_LOAD_SEG_REG(ES, es);
+        HMSVM_LOAD_SEG_REG(FS, fs);
+        HMSVM_LOAD_SEG_REG(GS, gs);
 
         pVmcb->ctrl.u64VmcbCleanBits &= ~HMSVM_VMCB_CLEAN_SEG;
@@ -1550 +1551 @@
 
 /**
- * Loads the guest state.
+ * Worker for loading the guest-state into the VMCB.
  *
  * @returns VBox status code.
@@ -1559 +1560 @@
  * @remarks No-long-jump zone!!!
  */
-VMMR0DECL(int) SVMR0LoadGuestState(PVM pVM, PVMCPU pVCpu, PCPUMCTX pCtx)
-{
-    AssertPtr(pVM);
-    AssertPtr(pVCpu);
-    AssertPtr(pCtx);
-    Assert(!RTThreadPreemptIsEnabled(NIL_RTTHREAD));
-
+static int hmR0SvmLoadGuestState(PVM pVM, PVMCPU pVCpu, PCPUMCTX pCtx)
+{
     PSVMVMCB pVmcb = (PSVMVMCB)pVCpu->hm.s.svm.pvVmcb;
     AssertMsgReturn(pVmcb, ("Invalid pVmcb\n"), VERR_SVM_INVALID_PVMCB);
@@ -1608 +1604 @@
               pVM, pVCpu, pVCpu->hm.s.fContextUseFlags));
 
+    Log4(("Load: CS:RIP=%04x:%#RX64\n", pCtx->cs.Sel, pCtx->rip));
+
     STAM_PROFILE_ADV_STOP(&pVCpu->hm.s.StatLoadGuestState, x);
-
     return rc;
+}
+
+
+/**
+ * Loads the guest state.
+ *
+ * @returns VBox status code.
+ * @param   pVM         Pointer to the VM.
+ * @param   pVCpu       Pointer to the VMCPU.
+ * @param   pCtx        Pointer to the guest-CPU context.
+ *
+ * @remarks No-long-jump zone!!!
+ */
+VMMR0DECL(int) SVMR0LoadGuestState(PVM pVM, PVMCPU pVCpu, PCPUMCTX pCtx)
+{
+    /* Nothing to do here. Loading is done below before VM-entry. */
+    return VINF_SUCCESS;
 }
 
@@ -1665 +1679 @@
      * Guest segment registers (includes FS, GS base MSRs for 64-bit guests).
      */
-    HMSVM_SAVE_SEG_REG(CS, ss);
-    HMSVM_SAVE_SEG_REG(SS, cs);
+    HMSVM_SAVE_SEG_REG(CS, cs);
+    HMSVM_SAVE_SEG_REG(SS, ss);
     HMSVM_SAVE_SEG_REG(DS, ds);
     HMSVM_SAVE_SEG_REG(ES, es);
@@ -1925 +1939 @@
 {
     Assert(!pVCpu->hm.s.Event.fPending);
+    Assert(pEvent->n.u1Valid);
 
     pVCpu->hm.s.Event.u64IntrInfo       = pEvent->u;
@@ -1930 +1945 @@
     pVCpu->hm.s.Event.GCPtrFaultAddress = GCPtrFaultAddress;
 
-#ifdef VBOX_STRICT
-    if (GCPtrFaultAddress)
-    {
-        AssertMsg(   pEvent->n.u8Vector == X86_XCPT_PF
-                  && pEvent->n.u3Type   == SVM_EVENT_EXCEPTION,
-                  ("hmR0SvmSetPendingEvent: Setting fault-address for non-#PF. u8Vector=%#x Type=%#RX32 GCPtrFaultAddr=%#RGx\n",
-                   pEvent->n.u8Vector, (uint32_t)pEvent->n.u3Type, GCPtrFaultAddress));
-        Assert(GCPtrFaultAddress == CPUMGetGuestCR2(pVCpu));
-    }
-#endif
-
-    Log4(("hmR0SvmSetPendingEvent: u=%#RX64 u8Vector=%#x ErrorCodeValid=%#x ErrorCode=%#RX32\n", pEvent->u,
-          pEvent->n.u8Vector, pEvent->n.u3Type, (uint8_t)pEvent->n.u1ErrorCodeValid, pEvent->n.u32ErrorCode));
+    Log4(("hmR0SvmSetPendingEvent: u=%#RX64 u8Vector=%#x Type=%#x ErrorCodeValid=%RTbool ErrorCode=%#RX32\n", pEvent->u,
+          pEvent->n.u8Vector, (uint8_t)pEvent->n.u3Type, !!pEvent->n.u1ErrorCodeValid, pEvent->n.u32ErrorCode));
 }
 
@@ -2163 +2167 @@
     if (pVCpu->hm.s.Event.fPending)                            /* First, inject any pending HM events. */
     {
+        Event.u = pVCpu->hm.s.Event.u64IntrInfo;
         Assert(Event.n.u1Valid);
-        Event.u = pVCpu->hm.s.Event.u64IntrInfo;
         bool fInject = true;
         if (   fIntShadow
@@ -2546 +2550 @@
     pVmcb->ctrl.NestedPaging.n.u1NestedPaging = pVM->hm.s.fNestedPaging;
 
+#ifdef HMVMX_SYNC_FULL_GUEST_STATE
+    pVCpu->hm.s.fContextUseFlags |= HM_CHANGED_ALL_GUEST;
+#endif
+
     /* Load the guest state. */
-    int rc = SVMR0LoadGuestState(pVM, pVCpu, pCtx);
+    int rc = hmR0SvmLoadGuestState(pVM, pVCpu, pCtx);
     AssertRC(rc);
     AssertMsg(!pVCpu->hm.s.fContextUseFlags, ("fContextUseFlags =%#x\n", pVCpu->hm.s.fContextUseFlags));
@@ -2673 +2681 @@
     }
 
-    pSvmTransient->u64ExitCode   = pVmcb->ctrl.u64ExitCode;     /* Save the #VMEXIT reason. */
-    pSvmTransient->fVectoringPF  = false;                       /* Vectoring page-fault needs to be determined later. */
+    pSvmTransient->u64ExitCode  = pVmcb->ctrl.u64ExitCode;      /* Save the #VMEXIT reason. */
+    pSvmTransient->fVectoringPF = false;                        /* Vectoring page-fault needs to be determined later. */
     hmR0SvmSaveGuestState(pVCpu, pMixedCtx);                    /* Save the guest state from the VMCB to the guest-CPU context. */
 
@@ -3020 +3028 @@
 
         GCPtrPage = Param1.val.val64;
-        VBOXSTRICTRC rc2 = EMInterpretInvlpg(pVCpu->CTX_SUFF(pVM), pVCpu,  pRegFrame, GCPtrPage);
+        VBOXSTRICTRC rc2 = EMInterpretInvlpg(pVCpu->CTX_SUFF(pVM), pVCpu, pRegFrame, GCPtrPage);
         rc = VBOXSTRICTRC_VAL(rc2);
     }
@@ -3608 +3616 @@
 {
     HMSVM_VALIDATE_EXIT_HANDLER_PARAMS();
+
+    Log4(("hmR0SvmExitReadCRx: CS:RIP=%04x:%#RX64\n", pCtx->cs.Sel, pCtx->rip));
+
     /** @todo Decode Assist. */
     VBOXSTRICTRC rc2 = EMInterpretInstruction(pVCpu, CPUMCTX2CORE(pCtx), 0 /* pvFault */);
@@ -3795 +3806 @@
     static uint32_t const s_aIOOpAnd[8] = { 0, 0xff, 0xffff, 0, 0xffffffff, 0, 0, 0 };  /* AND masks for saving
                                                                                             the result (in AL/AX/EAX). */
+    Log4(("hmR0SvmExitIOInstr: CS:RIP=%04x:%#RX64\n", pCtx->cs.Sel, pCtx->rip));
 
     PSVMVMCB pVmcb = (PSVMVMCB)pVCpu->hm.s.svm.pvVmcb;
@@ -4034 +4046 @@
     TRPMResetTrap(pVCpu);
 
-    Log2(("#NPF: PGMR0Trap0eHandlerNestedPaging returned %Rrc\n",  rc));
+    Log4(("#NPF: PGMR0Trap0eHandlerNestedPaging returned %Rrc CS:RIP=%04x:%#RX64\n", rc, pCtx->cs.Sel, pCtx->rip));
 
     /*
@@ -4144 +4156 @@
             /* A genuine guest #PF, reflect it to the guest. */
             hmR0SvmSetPendingXcptPF(pVCpu, pCtx, u32ErrCode, uFaultAddress);
-            Log4(("#PF: Guest page fault at %04X:%RGv FaultAddr=%RGv ErrCode=%#x\n", pCtx->cs, (RTGCPTR)pCtx->rip, uFaultAddress,
-                  u32ErrCode));
+            Log4(("#PF: Guest page fault at %04X:%RGv FaultAddr=%RGv ErrCode=%#x\n", pCtx->cs.Sel, (RTGCPTR)pCtx->rip,
+                  uFaultAddress, u32ErrCode));
         }
         else
@@ -4188 +4200 @@
 #endif
 
-    Log4(("#PF: uFaultAddress=%#RX64 cs:rip=%#04x:%#RX64 u32ErrCode %#RX32 cr3=%#RX64\n", uFaultAddress, pCtx->cs.Sel,
+    Log4(("#PF: uFaultAddress=%#RX64 CS:RIP=%#04x:%#RX64 u32ErrCode %#RX32 cr3=%#RX64\n", uFaultAddress, pCtx->cs.Sel,
           pCtx->rip, u32ErrCode, pCtx->cr3));