Changeset 46842 in vbox

Timestamp:

Jun 27, 2013 1:34:56 PM (12 years ago)

Author:

vboxsync

svn:sync-xref-src-repo-rev:

86792

Message:

VMM/HM: AMD-V feature bits update.

Location:

trunk

Files:

• include/VBox/vmm/hm_svm.h (modified) (2 diffs)
• src/VBox/VMM/VMMR0/HMSVMR0.cpp (modified) (1 diff)
• src/VBox/VMM/VMMR3/HM.cpp (modified) (1 diff)

trunk/include/VBox/vmm/hm_svm.h

@@ -57 +57 @@
 /** Bit 7 - DecodeAssist - Indicate decode assist is supported. */
 #define AMD_CPUID_SVM_FEATURE_EDX_DECODE_ASSIST             RT_BIT(7)
-/** Where did we get this from? */
-#define AMD_CPUID_SVM_FEATURE_EDX_SSE_3_5_DISABLE           RT_BIT(9)
 /** Bit 10 - PauseFilter - Indicates support for the PAUSE intercept filter. */
 #define AMD_CPUID_SVM_FEATURE_EDX_PAUSE_FILTER              RT_BIT(10)
@@ -64 +62 @@
  *  intercept filter cycle count threshold. */
 #define AMD_CPUID_SVM_FEATURE_EDX_PAUSE_FILTER_THRESHOLD    RT_BIT(12)
+/** Bit 13 - AVIC - Advanced Virtual Interrupt Controller. */
+#define AMD_CPUID_SVM_FEATURE_EDX_AVIC                      RT_BIT(13)
 /** @} */
 

trunk/src/VBox/VMM/VMMR0/HMSVMR0.cpp

@@ -2178 +2178 @@
     SVMEVENT Event;
     Event.u = 0;
-    if (pVCpu->hm.s.Event.fPending)                            /* First, inject any pending HM events. */
+    if (pVCpu->hm.s.Event.fPending)                                /* First, inject any pending HM events. */
     {
         Event.u = pVCpu->hm.s.Event.u64IntrInfo;

trunk/src/VBox/VMM/VMMR3/HM.cpp

@@ -1398 +1398 @@
         HMSVM_REPORT_FEATURE(AMD_CPUID_SVM_FEATURE_EDX_FLUSH_BY_ASID),
         HMSVM_REPORT_FEATURE(AMD_CPUID_SVM_FEATURE_EDX_DECODE_ASSIST),
-        HMSVM_REPORT_FEATURE(AMD_CPUID_SVM_FEATURE_EDX_SSE_3_5_DISABLE),
         HMSVM_REPORT_FEATURE(AMD_CPUID_SVM_FEATURE_EDX_PAUSE_FILTER),
         HMSVM_REPORT_FEATURE(AMD_CPUID_SVM_FEATURE_EDX_PAUSE_FILTER_THRESHOLD),
+        HMSVM_REPORT_FEATURE(AMD_CPUID_SVM_FEATURE_EDX_AVIC),
 #undef HMSVM_REPORT_FEATURE
     };