Index: /trunk/src/VBox/VMM/testcase/Instructions/InstructionTestGen.py
===================================================================
--- /trunk/src/VBox/VMM/testcase/Instructions/InstructionTestGen.py	(revision 47134)
+++ /trunk/src/VBox/VMM/testcase/Instructions/InstructionTestGen.py	(revision 47135)
@@ -384,4 +384,13 @@
         return False;
 
+    def gregNameBits(self, iReg, cBits):
+        """ Gets the name of the given register for the specified width (bits). """
+        return gregName(iReg, cBits, self.is64Bit());
+
+    def gregNameBytes(self, iReg, cbWidth):
+        """ Gets the name of the given register for the specified with (in bytes). """
+        return gregName(iReg, cbWidth * 8, self.is64Bit());
+
+
 
 
@@ -392,4 +401,5 @@
     'bs2-r0-64':        TargetEnv('bs2-r0-64',      TargetEnv.ksInstrSet_64, TargetEnv.ksCpuMode_Long,    0),
     'bs2-r0-64-big':    TargetEnv('bs2-r0-64-big',  TargetEnv.ksInstrSet_64, TargetEnv.ksCpuMode_Long,    0),
+    'bs2-r0-32-big':    TargetEnv('bs2-r0-32-big',  TargetEnv.ksInstrSet_32, TargetEnv.ksCpuMode_Protect, 0),
 };
 
@@ -1238,5 +1248,5 @@
         oGen.write('        push    %s\n' % (oGen.oTarget.asGRegs[X86_GREG_xAX],));
         oGen.write('        VBINSTST_TRAP_INSTR X86_XCPT_DE, 0, %-4s    %s\n'
-                   % (self.sInstr, gregName(iOp2, cbEffOp * 8),));
+                   % (self.sInstr, oGen.gregNameBytes(iOp2, cbEffOp),));
         oGen.write('        call VBINSTST_NAME(%s)\n' % (oGen.needGRegChecker(X86_GREG_xAX, X86_GREG_xDX, iOp2),));
         return True;
@@ -1244,4 +1254,7 @@
     def generateOneDivideErrorTestGreg8Bit(self, oGen, cbEffOp, iOp2, iDividend, iDivisor):
         """ Generate code of one '[I]DIV AX,<GREG>' test that causes #DE (8-bit). """
+        if not oGen.oTarget.is64Bit() and iOp2 == 4: # Avoid AH.
+            iOp2 = 5;
+
         cbMaxOp   = oGen.oTarget.getMaxOpBytes();
         fMaxOp    = UINT64_MAX if cbMaxOp == 8 else UINT32_MAX; assert cbMaxOp in [8, 4];
@@ -1264,5 +1277,5 @@
         oGen.write('        push    sAX\n');
         oGen.write('        VBINSTST_TRAP_INSTR X86_XCPT_DE, 0, %-4s    %s\n'
-                   % (self.sInstr, gregName(iOp2, cbEffOp * 8),));
+                   % (self.sInstr, oGen.gregNameBytes(iOp2, cbEffOp),));
         oGen.write('        call VBINSTST_NAME(%s)\n' % (oGen.needGRegChecker(X86_GREG_xAX, iOp2X),));
         return;
@@ -1279,5 +1292,5 @@
                 iOp2 = oGen.oTarget.randGRegNoSp();
 
-            for cbEffOp in ( 8, 4, 2, 1 ):
+            for cbEffOp in [1]:#( 8, 4, 2, 1 ):
                 if cbEffOp > oGen.oTarget.getMaxOpBytes():
                     continue;
@@ -1299,5 +1312,5 @@
         #oGen.write('        int3\n');
 
-        self.generateStandardTests(oGen);
+        #self.generateStandardTests(oGen);
         self.generateDivideErrorTests(oGen);
 
@@ -1314,8 +1327,8 @@
 #
 g_aoInstructionTests = [
-    InstrTest_Mov_Gv_Ev(),
-    #InstrTest_MovSxD_Gv_Ev(),
+    #InstrTest_Mov_Gv_Ev(),
+    ##InstrTest_MovSxD_Gv_Ev(),
     InstrTest_DivIDiv(fIsIDiv = False),
-    InstrTest_DivIDiv(fIsIDiv = True),
+    #InstrTest_DivIDiv(fIsIDiv = True),
 ];
 
@@ -1525,4 +1538,22 @@
         """ Checks if we're in tiny mode."""
         return self.oOptions.sTestSize == InstructionTestGen.ksTestSize_Tiny;
+
+
+    #
+    # Forwarding calls for oTarget to shorted typing and lessen the attacks
+    # on the right margin.
+    #
+
+    def gregNameBits(self, iReg, cBitsWide):
+        """ Target: Get the name of a general register for the given size (in bits). """
+        return self.oTarget.gregNameBits(iReg, cBitsWide);
+
+    def gregNameBytes(self, iReg, cbWide):
+        """ Target: Get the name of a general register for the given size (in bytes). """
+        return self.oTarget.gregNameBytes(iReg, cbWide);
+
+    def is64Bit(self):
+        """ Target: Is the target 64-bit? """
+        return self.oTarget.is64Bit();
 
 
Index: /trunk/src/VBox/VMM/testcase/Instructions/env-bs2-r0-32-big.mac
===================================================================
--- /trunk/src/VBox/VMM/testcase/Instructions/env-bs2-r0-32-big.mac	(revision 47135)
+++ /trunk/src/VBox/VMM/testcase/Instructions/env-bs2-r0-32-big.mac	(revision 47135)
@@ -0,0 +1,35 @@
+; $Id$
+;; @file
+; Instruction Test Environment - Big Boot Sector Type 2, Ring-0, 64-Bit.
+;
+
+;
+; Copyright (C) 2006-2013 Oracle Corporation
+;
+; This file is part of VirtualBox Open Source Edition (OSE), as
+; available from http://www.virtualbox.org. This file is free software;
+; you can redistribute it and/or modify it under the terms of the GNU
+; General Public License (GPL) as published by the Free Software
+; Foundation, in version 2 as it comes in the "COPYING" file of the
+; VirtualBox OSE distribution. VirtualBox OSE is distributed in the
+; hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
+;
+
+%undef  RT_ARCH_AMD64
+%undef  RT_ARCH_X86
+%undef  RT_ARCH_X86_32
+%undef  RT_ARCH_X86_16
+%undef  ASM_CALL64_MSC
+%undef  ASM_CALL64_GCC
+%undef  ASM_CALL64_BS2
+%undef  ARCH_BITS
+%undef  xWrtRIP
+
+%define ARCH_BITS       32
+%define RT_ARCH_X86
+%define ASM_CALL32_BS2
+%define xWrtRIP
+%define RTCCPTR_PRE     dword
+
+%include "env-bs2-r0-big.mac"
+
