- Timestamp:
- Jan 31, 2007 9:52:32 PM (18 years ago)
- Location:
- trunk/src/VBox/Devices/Graphics
- Files:
-
- 2 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/Devices/Graphics/DevVGA.cpp
r332 r473 192 192 //#define DEBUG_VGA_REG 193 193 194 //#define DEBUG_S3195 194 #define DEBUG_BOCHS_VBE 196 195 197 /* S3 VGA is deprecated - another graphic card will be emulated */198 //#define CONFIG_S3VGA199 196 #endif 200 197 … … 399 396 #ifdef DEBUG_VGA_REG 400 397 printf("vga: read CR%x = 0x%02x\n", s->cr_index, val); 401 #endif402 #ifdef DEBUG_S3403 if (s->cr_index >= 0x20)404 printf("S3: CR read index=0x%x val=0x%x\n",405 s->cr_index, val);406 398 #endif 407 399 break; … … 540 532 break; 541 533 542 #ifdef CONFIG_S3VGA543 /* S3 registers */544 case 0x2d:545 case 0x2e:546 case 0x2f:547 case 0x30:548 /* chip ID, cannot write */549 break;550 case 0x31:551 /* update start address */552 {553 int v;554 s->cr[s->cr_index] = val;555 v = (val >> 4) & 3;556 s->cr[0x69] = (s->cr[69] & ~0x03) | v;557 }558 break;559 case 0x51:560 /* update start address */561 {562 int v;563 s->cr[s->cr_index] = val;564 v = val & 3;565 s->cr[0x69] = (s->cr[69] & ~0x0c) | (v << 2);566 }567 break;568 #endif569 534 default: 570 535 s->cr[s->cr_index] = val; 571 536 break; 572 537 } 573 #ifdef DEBUG_S3574 if (s->cr_index >= 0x20)575 printf("S3: CR write index=0x%x val=0x%x\n",576 s->cr_index, val);577 #endif578 538 break; 579 539 case 0x3ba: … … 598 558 uint32_t val; 599 559 600 if (s->vbe_index <= VBE_DISPI_INDEX_NB) 601 #ifndef VBOX 560 if (s->vbe_index <= VBE_DISPI_INDEX_NB) { 561 if (s->vbe_regs[VBE_DISPI_INDEX_ENABLE] & VBE_DISPI_GETCAPS) { 562 switch(s->vbe_index) { 563 /* XXX: do not hardcode ? */ 564 case VBE_DISPI_INDEX_XRES: 565 val = VBE_DISPI_MAX_XRES; 566 break; 567 case VBE_DISPI_INDEX_YRES: 568 val = VBE_DISPI_MAX_YRES; 569 break; 570 case VBE_DISPI_INDEX_BPP: 571 val = VBE_DISPI_MAX_BPP; 572 break; 573 default: 574 val = s->vbe_regs[s->vbe_index]; 575 break; 576 } 577 } else { 602 578 val = s->vbe_regs[s->vbe_index]; 603 #else /* VBOX */ 604 { 605 /* VBE_DISPI_GETCAPS && VBE_DISPI_INDEX_BPP should */ 606 /* return VBE_DISPI_MAX_BPP instead of current video mode BPP */ 607 if ( (s->vbe_regs[VBE_DISPI_INDEX_ENABLE] & VBE_DISPI_GETCAPS) 608 && s->vbe_index == VBE_DISPI_INDEX_BPP) 609 val = VBE_DISPI_MAX_BPP; 610 else 611 val = s->vbe_regs[s->vbe_index]; 612 } 613 #endif /* VBOX */ 614 else 579 } 580 } else { 615 581 val = 0; 582 } 616 583 #ifdef DEBUG_BOCHS_VBE 617 584 Log(("VBE: read index=0x%x val=0x%x\n", s->vbe_index, val)); … … 689 656 break; 690 657 case VBE_DISPI_INDEX_BANK: 658 if (s->vbe_regs[VBE_DISPI_INDEX_BPP] == 4) { 659 val &= (s->vbe_bank_mask >> 2); 660 } else { 661 val &= s->vbe_bank_mask; 662 } 691 663 val &= s->vbe_bank_mask; 692 664 s->vbe_regs[s->vbe_index] = val; … … 759 731 /* width */ 760 732 s->cr[0x01] = (s->vbe_regs[VBE_DISPI_INDEX_XRES] >> 3) - 1; 761 /* height */733 /* height (only meaningful if < 1024) */ 762 734 h = s->vbe_regs[VBE_DISPI_INDEX_YRES] - 1; 763 735 s->cr[0x12] = h; … … 1308 1280 static void vga_get_offsets(VGAState *s, 1309 1281 uint32_t *pline_offset, 1310 uint32_t *pstart_addr) 1311 { 1312 uint32_t start_addr, line_offset; 1282 uint32_t *pstart_addr, 1283 uint32_t *pline_compare) 1284 { 1285 uint32_t start_addr, line_offset, line_compare; 1313 1286 #ifdef CONFIG_BOCHS_VBE 1314 1287 if (s->vbe_regs[VBE_DISPI_INDEX_ENABLE] & VBE_DISPI_ENABLED) { 1315 1288 line_offset = s->vbe_line_offset; 1316 1289 start_addr = s->vbe_start_addr; 1290 line_compare = 65535; 1317 1291 } else 1318 1292 #endif … … 1320 1294 /* compute line_offset in bytes */ 1321 1295 line_offset = s->cr[0x13]; 1322 #ifdef CONFIG_S3VGA1323 {1324 uinr32_t v;1325 v = (s->cr[0x51] >> 4) & 3; /* S3 extension */1326 if (v == 0)1327 v = (s->cr[0x43] >> 2) & 1; /* S3 extension */1328 line_offset |= (v << 8);1329 }1330 #endif1331 1296 line_offset <<= 3; 1332 1297 1333 1298 /* starting address */ 1334 1299 start_addr = s->cr[0x0d] | (s->cr[0x0c] << 8); 1335 #ifdef CONFIG_S3VGA 1336 start_addr |= (s->cr[0x69] & 0x1f) << 16; /* S3 extension */ 1337 #endif 1300 1301 /* line compare */ 1302 line_compare = s->cr[0x18] | 1303 ((s->cr[0x07] & 0x10) << 4) | 1304 ((s->cr[0x09] & 0x40) << 3); 1338 1305 } 1339 1306 *pline_offset = line_offset; 1340 1307 *pstart_addr = start_addr; 1308 *pline_compare = line_compare; 1341 1309 } 1342 1310 … … 1349 1317 full_update = 0; 1350 1318 1351 s->get_offsets(s, &line_offset, &start_addr); 1352 /* line compare */ 1353 line_compare = s->cr[0x18] | 1354 ((s->cr[0x07] & 0x10) << 4) | 1355 ((s->cr[0x09] & 0x40) << 3); 1319 s->get_offsets(s, &line_offset, &start_addr, &line_compare); 1356 1320 1357 1321 if (line_offset != s->line_offset || … … 1720 1684 { 1721 1685 int width, height; 1722 #if defined(VBOX) && defined(CONFIG_BOCHS_VBE)1723 if (s->vbe_regs[VBE_DISPI_INDEX_ENABLE] & VBE_DISPI_ENABLED) 1724 {1725 *pwidth = s->vbe_regs[VBE_DISPI_INDEX_XRES];1726 *pheight = s->vbe_regs[VBE_DISPI_INDEX_YRES];1727 return; 1728 }1729 #endif 1730 width = (s->cr[0x01] + 1) * 8;1731 height = s->cr[0x12]|1732 ((s->cr[0x07] & 0x02) << 7) |1733 ((s->cr[0x07] & 0x40) << 3);1734 height = (height + 1);1686 #ifdef CONFIG_BOCHS_VBE 1687 if (s->vbe_regs[VBE_DISPI_INDEX_ENABLE] & VBE_DISPI_ENABLED) { 1688 width = s->vbe_regs[VBE_DISPI_INDEX_XRES]; 1689 height = s->vbe_regs[VBE_DISPI_INDEX_YRES]; 1690 } else 1691 #endif 1692 { 1693 width = (s->cr[0x01] + 1) * 8; 1694 height = s->cr[0x12] | 1695 ((s->cr[0x07] & 0x02) << 7) | 1696 ((s->cr[0x07] & 0x40) << 3); 1697 height = (height + 1); 1698 } 1735 1699 *pwidth = width; 1736 1700 *pheight = height; … … 1815 1779 uint32_t v, addr1, addr; 1816 1780 vga_draw_line_func *vga_draw_line; 1817 #if defined(VBOX) && defined(CONFIG_BOCHS_VBE)1818 int line_compare;1819 #endif1820 1781 bool offsets_changed; 1821 1782 … … 2001 1962 } 2002 1963 /* line compare acts on the displayed lines */ 2003 #if defined(VBOX) && defined(CONFIG_BOCHS_VBE) 2004 /* line_compare is determined from the VGA control registers. 2005 However, the formula does not allow for values larger than 2006 1023. So in the VBE case, we get it from the current 2007 resolution instead. */ 2008 if (s->vbe_regs[VBE_DISPI_INDEX_ENABLE] & VBE_DISPI_ENABLED) 2009 line_compare = s->vbe_regs[VBE_DISPI_INDEX_YRES] - 1; 2010 else 2011 line_compare = s->line_compare; 2012 if (y == line_compare) 2013 #else 2014 if (y == s->line_compare) 2015 #endif 1964 if ((uint32_t)y == s->line_compare) 2016 1965 addr1 = 0; 2017 1966 d += linesize; … … 2169 2118 { 2170 2119 memset(s, 0, sizeof(VGAState)); 2171 #ifdef CONFIG_S3VGA2172 /* chip ID for 8c968 */2173 s->cr[0x2d] = 0x88;2174 s->cr[0x2e] = 0xb0;2175 s->cr[0x2f] = 0x01; /* XXX: check revision code */2176 s->cr[0x30] = 0xe1;2177 #endif2178 2120 s->graphic_mode = -1; /* force full update */ 2179 2121 } … … 2626 2568 2627 2569 #endif /* !VBOX || !IN_GC || !IN_RING0 */ 2628 2629 2630 2631 2632 2633 2634 2635 2636 2637 2638 2570 2639 2571 … … 3876 3808 uint8_t *pu8Src; 3877 3809 3878 uint32_t u32OffsetSrc ;3810 uint32_t u32OffsetSrc, u32Dummy; 3879 3811 3880 3812 PVGASTATE s = IDISPLAYPORT_2_VGASTATE(pInterface); … … 3902 3834 { 3903 3835 x += w; /* Compute xRight which is also the new width. */ 3904 3905 w = (x < 0)? 0: x; 3906 3836 w = (x < 0) ? 0 : x; 3907 3837 x = 0; 3908 3838 } … … 3911 3841 { 3912 3842 y += h; /* Compute yBottom, which is also the new height. */ 3913 3914 h = (y < 0)? 0: y; 3915 3843 h = (y < 0) ? 0 : y; 3916 3844 y = 0; 3917 3845 } … … 3989 3917 3990 3918 cbPixelSrc = (s->get_bpp(s) + 7) / 8; 3991 s->get_offsets (s, &cbLineSrc, &u32OffsetSrc );3919 s->get_offsets (s, &cbLineSrc, &u32OffsetSrc, &u32Dummy); 3992 3920 3993 3921 /* Assume that rendering is performed only on visible part of VRAM. … … 4013 3941 LogFlow(("vgaPortUpdateDisplayRect: completed.\n")); 4014 3942 #endif /* DEBUG_sunlover */ 4015 4016 return;4017 3943 } 4018 3944 -
trunk/src/VBox/Devices/Graphics/DevVGA.h
r1 r473 56 56 57 57 #ifdef VBOX 58 #define VBE_DISPI_MAX_BPP 3259 #endif60 61 #ifdef VBOX62 58 #define VBE_DISPI_MAX_XRES 16384 63 59 #define VBE_DISPI_MAX_YRES 16384 64 60 #else 65 #define VBE_DISPI_MAX_XRES 1024 66 #define VBE_DISPI_MAX_YRES 768 67 #endif 61 #define VBE_DISPI_MAX_XRES 1600 62 #define VBE_DISPI_MAX_YRES 1200 63 #endif 64 #define VBE_DISPI_MAX_BPP 32 68 65 69 66 #define VBE_DISPI_INDEX_ID 0x0 … … 85 82 #define VBE_DISPI_DISABLED 0x00 86 83 #define VBE_DISPI_ENABLED 0x01 87 #ifdef VBOX88 84 #define VBE_DISPI_GETCAPS 0x02 89 85 #define VBE_DISPI_8BIT_DAC 0x20 90 #endif91 86 #define VBE_DISPI_LFB_ENABLED 0x40 92 87 #define VBE_DISPI_NOCLEARMEM 0x80 … … 141 136 void (*get_offsets)(struct VGAState *s, \ 142 137 uint32_t *pline_offset, \ 143 uint32_t *pstart_addr); \ 138 uint32_t *pstart_addr, \ 139 uint32_t *pline_compare); \ 144 140 void (*get_resolution)(struct VGAState *s, \ 145 141 int *pwidth, \ … … 175 171 struct VGAState; 176 172 typedef int FNGETBPP(struct VGAState *s); 177 typedef void FNGETOFFSETS(struct VGAState *s, uint32_t *pline_offset, uint32_t *pstart_addr );173 typedef void FNGETOFFSETS(struct VGAState *s, uint32_t *pline_offset, uint32_t *pstart_addr, uint32_t *pline_compare); 178 174 typedef void FNGETRESOLUTION(struct VGAState *s, int *pwidth, int *pheight); 179 175 typedef unsigned int FNRGBTOPIXEL(unsigned int r, unsigned int g, unsigned b);
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