Changeset 47378 in vbox for trunk/src/VBox

Timestamp:

Jul 24, 2013 4:32:46 PM (12 years ago)

Author:

vboxsync

Message:

VMM/HMVMXR0: Typos and make re-checking of CR4.VMXE on VMXR0Enter() only for strict builds.

File:

• trunk/src/VBox/VMM/VMMR0/HMVMXR0.cpp (modified) (8 diffs)

trunk/src/VBox/VMM/VMMR0/HMVMXR0.cpp

@@ -126 +126 @@
  *
  * We need to intercept all exceptions manually (except #PF). #NM is also
- * handled spearetely, see hmR0VmxLoadGuestControlRegs(). #PF need not be
+ * handled separately, see hmR0VmxLoadGuestControlRegs(). #PF need not be
  * intercepted even in real-mode if we have Nested Paging support.
  */
@@ -219 +219 @@
     bool            fUpdateTscOffsettingAndPreemptTimer;
     /** Whether the VM-exit was caused by a page-fault during delivery of a
-     *  contributary exception or a page-fault. */
+     *  contributory exception or a page-fault. */
     bool            fVectoringPF;
 } VMXTRANSIENT, *PVMXTRANSIENT;
@@ -1991 +1991 @@
 /**
  * Sets up the VM for execution under VT-x.
- * This function is only called once per-VM during initalization.
+ * This function is only called once per-VM during initialization.
  *
  * @returns VBox status code.
@@ -5432 +5432 @@
      * See Intel spec. 27.3.2 "Saving Segment Registers and Descriptor-Table Registers".
      *
-     * bird: This isn't quite as simple.  VT-x and VBox(!) requires the DPL for SS to be the the same as CPL.  In 64-bit mode it
+     * bird: This isn't quite as simple.  VT-x and VBox(!) requires the DPL for SS to be the same as CPL.  In 64-bit mode it
      *       is possible (int/trap/xxx injects does this when switching rings) to load SS with a NULL selector and RPL=CPL.
      *       The Attr.u = X86DESCATTR_UNUSABLE works fine as long as nobody uses ring-1 or ring-2.  VT-x updates the DPL
-     *       correctly in the attributes of SS even when the unusable bit is set, we need to preseve the DPL or we get invalid
+     *       correctly in the attributes of SS even when the unusable bit is set, we need to preserve the DPL or we get invalid
      *       guest state trouble.  Try bs2-cpu-hidden-regs-1.
      */
@@ -6620 +6620 @@
     LogFlowFunc(("pVM=%p pVCpu=%p\n", pVM, pVCpu));
 
+#ifdef VBOX_STRICT
     /* Make sure we're in VMX root mode. */
     RTCCUINTREG u32HostCR4 = ASMGetCR4();
@@ -6627 +6628 @@
         return VERR_VMX_X86_CR4_VMXE_CLEARED;
     }
+#endif
 
     /* Load the active VMCS as the current one. */
@@ -6633 +6635 @@
         return rc;
 
-    /** @todo this will change with preemption hooks where can can VMRESUME as long
+    /** @todo this will change with preemption hooks where can VMRESUME as long
      *        as we're no preempted. */
     pVCpu->hm.s.fResumeVM = false;
@@ -6849 +6851 @@
  * This may cause longjmps to ring-3 and may even result in rescheduling to the
  * recompiler. We must be cautious what we do here regarding committing
- * guest-state information into the the VMCS assuming we assuredly execute the
+ * guest-state information into the VMCS assuming we assuredly execute the
  * guest in VT-x. If we fall back to the recompiler after updating the VMCS and
  * clearing the common-state (TRPM/forceflags), we must undo those changes so