Changeset 47558 in vbox for trunk/src/VBox/VMM/VMMAll

Timestamp:

Aug 6, 2013 1:50:53 PM (11 years ago)

Author:

vboxsync

Message:

IEM: VERR and VERW.

Location:

trunk/src/VBox/VMM/VMMAll

Files:

• IEMAllCImpl.cpp.h (modified) (1 diff)
• IEMAllInstructions.cpp.h (modified) (3 diffs)

trunk/src/VBox/VMM/VMMAll/IEMAllCImpl.cpp.h

@@ -3327 +3327 @@
 
 /**
+ * Implements verr (fWrite = false) and verw (fWrite = true).
+ */
+IEM_CIMPL_DEF_2(iemCImpl_VerX, uint16_t, uSel, bool, fWrite)
+{
+    PCPUMCTX pCtx = pIemCpu->CTX_SUFF(pCtx);
+    Assert(!IEM_IS_REAL_OR_V86_MODE(pIemCpu));
+
+    /** @todo figure whether the accessed bit is set or not. */
+
+    bool fAccessible = true;
+    if (!(uSel & X86_SEL_MASK_OFF_RPL))
+        fAccessible = false; /** @todo test this on 64-bit. */
+    else
+    {
+        /* Fetch the descriptor. */
+        RTGCPTR GCPtrBase;
+        if (uSel & X86_SEL_LDT)
+        {
+            if (   !pCtx->ldtr.Attr.n.u1Present
+                || (uSel | X86_SEL_RPL_LDT) > pCtx->ldtr.u32Limit )
+                fAccessible = false;
+            GCPtrBase = pCtx->ldtr.u64Base;
+        }
+        else
+        {
+            if ((uSel | X86_SEL_RPL_LDT) > pCtx->gdtr.cbGdt)
+                fAccessible = false;
+            GCPtrBase = pCtx->gdtr.pGdt;
+        }
+        if (fAccessible)
+        {
+            IEMSELDESC Desc;
+            VBOXSTRICTRC rcStrict = iemMemFetchSysU64(pIemCpu, &Desc.Legacy.u, UINT8_MAX, GCPtrBase + (uSel & X86_SEL_MASK));
+            if (rcStrict != VINF_SUCCESS)
+                return rcStrict;
+
+            /* Check the descriptor, order doesn't matter much here. */
+            if (   !Desc.Legacy.Gen.u1DescType
+                || !Desc.Legacy.Gen.u1Present)
+                fAccessible = false;
+            else
+            {
+                if (  fWrite
+                    ? (Desc.Legacy.Gen.u4Type & (X86_SEL_TYPE_CODE | X86_SEL_TYPE_WRITE)) != X86_SEL_TYPE_WRITE
+                    : (Desc.Legacy.Gen.u4Type & (X86_SEL_TYPE_CODE | X86_SEL_TYPE_READ))  == X86_SEL_TYPE_CODE)
+                    fAccessible = false;
+
+                /** @todo testcase for the conforming behavior. */
+                if (   (Desc.Legacy.Gen.u4Type & (X86_SEL_TYPE_CODE | X86_SEL_TYPE_CONF))
+                    != (X86_SEL_TYPE_CODE | X86_SEL_TYPE_CONF))
+                {
+                    if ((unsigned)(uSel & X86_SEL_RPL) > Desc.Legacy.Gen.u2Dpl)
+                        fAccessible = false;
+                    else if (pIemCpu->uCpl > Desc.Legacy.Gen.u2Dpl)
+                        fAccessible = false;
+                }
+            }
+        }
+    }
+
+    /* commit */
+    pIemCpu->CTX_SUFF(pCtx)->eflags.Bits.u1ZF = fAccessible;
+
+    iemRegAddToRip(pIemCpu, cbInstr);
+    return VINF_SUCCESS;
+}
+
+
+/**
  * Implements lgdt.
  *

trunk/src/VBox/VMM/VMMAll/IEMAllInstructions.cpp.h

@@ -671 +671 @@
         IEM_MC_ARG(uint16_t, u16Sel, 0);
         IEM_MC_LOCAL(RTGCPTR, GCPtrEffSrc);
-        IEM_MC_RAISE_GP0_IF_CPL_NOT_ZERO();
         IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffSrc, bRm, 0);
         IEMOP_HLP_DECODED_NL_1(OP_LLDT, IEMOPFORM_M_MEM, OP_PARM_Ew, DISOPTYPE_DANGEROUS);
+        IEM_MC_RAISE_GP0_IF_CPL_NOT_ZERO(); /** @todo test order */
         IEM_MC_FETCH_MEM_U16(u16Sel, pIemCpu->iEffSeg, GCPtrEffSrc);
         IEM_MC_CALL_CIMPL_1(iemCImpl_lldt, u16Sel);
@@ -702 +702 @@
         IEM_MC_ARG(uint16_t, u16Sel, 0);
         IEM_MC_LOCAL(RTGCPTR, GCPtrEffSrc);
-        IEM_MC_RAISE_GP0_IF_CPL_NOT_ZERO();
         IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffSrc, bRm, 0);
         IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
+        IEM_MC_RAISE_GP0_IF_CPL_NOT_ZERO(); /** @todo test ordre */
         IEM_MC_FETCH_MEM_U16(u16Sel, pIemCpu->iEffSeg, GCPtrEffSrc);
         IEM_MC_CALL_CIMPL_1(iemCImpl_ltr, u16Sel);
@@ -713 +713 @@
 
 
+/** Opcode 0x0f 0x00 /3. */
+FNIEMOP_DEF_2(iemOpCommonGrp6VerX, uint8_t, bRm, uint8_t, fWrite)
+{
+    IEMOP_HLP_NO_REAL_OR_V86_MODE();
+
+    if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
+    {
+        IEMOP_HLP_DECODED_NL_1(fWrite ? OP_VERW : OP_VERR, IEMOPFORM_M_MEM, OP_PARM_Ew, DISOPTYPE_DANGEROUS | DISOPTYPE_PRIVILEGED_NOTRAP);
+        IEM_MC_BEGIN(2, 0);
+        IEM_MC_ARG(uint16_t,    u16Sel,            0);
+        IEM_MC_ARG_CONST(bool,  fWriteArg, fWrite, 1);
+        IEM_MC_FETCH_GREG_U16(u16Sel, (bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB);
+        IEM_MC_CALL_CIMPL_2(iemCImpl_VerX, u16Sel, fWriteArg);
+        IEM_MC_END();
+    }
+    else
+    {
+        IEM_MC_BEGIN(2, 1);
+        IEM_MC_ARG(uint16_t,    u16Sel,            0);
+        IEM_MC_ARG_CONST(bool,  fWriteArg, fWrite, 1);
+        IEM_MC_LOCAL(RTGCPTR, GCPtrEffSrc);
+        IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffSrc, bRm, 0);
+        IEMOP_HLP_DECODED_NL_1(fWrite ? OP_VERW : OP_VERR, IEMOPFORM_M_MEM, OP_PARM_Ew, DISOPTYPE_DANGEROUS | DISOPTYPE_PRIVILEGED_NOTRAP);
+        IEM_MC_FETCH_MEM_U16(u16Sel, pIemCpu->iEffSeg, GCPtrEffSrc);
+        IEM_MC_CALL_CIMPL_2(iemCImpl_VerX, u16Sel, fWriteArg);
+        IEM_MC_END();
+    }
+    return VINF_SUCCESS;
+}
+
+
 /** Opcode 0x0f 0x00 /4. */
-FNIEMOP_STUB_1(iemOp_Grp6_verr, uint8_t, bRm);
+FNIEMOP_DEF_1(iemOp_Grp6_verr, uint8_t, bRm)
+{
+    IEMOP_MNEMONIC("verr Ew");
+    return FNIEMOP_CALL_2(iemOpCommonGrp6VerX, bRm, false);
+}
 
 
 /** Opcode 0x0f 0x00 /5. */
-FNIEMOP_STUB_1(iemOp_Grp6_verw, uint8_t, bRm);
+FNIEMOP_DEF_1(iemOp_Grp6_verw, uint8_t, bRm)
+{
+    IEMOP_MNEMONIC("verr Ew");
+    return FNIEMOP_CALL_2(iemOpCommonGrp6VerX, bRm, true);
+}