Changeset 47619 in vbox for trunk/src/VBox/VMM

Timestamp:

Aug 8, 2013 7:06:45 PM (11 years ago)

Author:

vboxsync

Message:

EM: Started on HM single stepping for IEM verification purposes. Trying to fix the HM debugging in the proccess. VT-x only atm.

Location:

trunk/src/VBox/VMM

Files:

• VMMAll/HMAll.cpp (modified) (2 diffs)
• VMMR0/HMVMXR0.cpp (modified) (4 diffs)
• VMMR3/EM.cpp (modified) (15 diffs)
• VMMR3/EMHM.cpp (modified) (1 diff)
• include/HMInternal.h (modified) (1 diff)

trunk/src/VBox/VMM/VMMAll/HMAll.cpp

@@ -33 +33 @@
 #include <iprt/asm.h>
 #include <iprt/string.h>
+#include <iprt/thread.h>
 #include <iprt/x86.h>
 #include <iprt/asm-amd64-x86.h>
@@ -426 +427 @@
 }
 
+
+/**
+ * Sets or clears the single instruction flag.
+ *
+ * When set, HM will try its best to return to ring-3 after executing a single
+ * instruction.  This can be used for debugging.  See also
+ * EMR3HmSingleInstruction.
+ *
+ * @returns The old flag state.
+ * @param   pVCpu               Pointer to the cross context CPU structure of
+ *                              the calling EMT.
+ * @param   fEnable             The new flag state.
+ */
+VMM_INT_DECL(bool) HMSetSingleInstruction(PVMCPU pVCpu, bool fEnable)
+{
+    VMCPU_ASSERT_EMT(pVCpu);
+    bool fOld = pVCpu->hm.s.fSingleInstruction;
+    pVCpu->hm.s.fSingleInstruction = fEnable;
+    return fOld;
+}
+

trunk/src/VBox/VMM/VMMR0/HMVMXR0.cpp

@@ -3317 +3317 @@
     bool fInterceptDB     = false;
     bool fInterceptMovDRx = false;
-    if (DBGFIsStepping(pVCpu))
+    if (DBGFIsStepping(pVCpu) || pVCpu->hm.s.fSingleInstruction)
     {
         /* If the CPU supports the monitor trap flag, use it for single stepping in DBGF and avoid intercepting #DB. */
@@ -6282 +6282 @@
             {
                 /*
-                 * The pending-debug exceptions field is cleared on all VM-exits except VMX_EXIT_TPR_BELOW_THRESHOLD, VMX_EXIT_MTF
-                 * VMX_EXIT_APIC_WRITE, VMX_EXIT_VIRTUALIZED_EOI. See Intel spec. 27.3.4 "Saving Non-Register State".
+                 * The pending-debug exceptions field is cleared on all VM-exits except VMX_EXIT_TPR_BELOW_THRESHOLD,
+                 * VMX_EXIT_MTF VMX_EXIT_APIC_WRITE, VMX_EXIT_VIRTUALIZED_EOI. See Intel spec. 27.3.4 "Saving Non-Register State".
                  */
                 rc2 = VMXWriteVmcs32(VMX_VMCS_GUEST_PENDING_DEBUG_EXCEPTIONS, VMX_VMCS_GUEST_DEBUG_EXCEPTIONS_BS);
@@ -8665 +8665 @@
     AssertRCReturn(rc, rc);
     STAM_COUNTER_INC(&pVCpu->hm.s.StatExitMtf);
-    return VINF_EM_DBG_STOP;
+    return VINF_EM_DBG_STEPPED;
 }
 
@@ -8760 +8760 @@
     int rc = VERR_INTERNAL_ERROR_5;
     if (   !DBGFIsStepping(pVCpu)
+        && !pVCpu->hm.s.fSingleInstruction
         && !CPUMIsHyperDebugStateActive(pVCpu))
     {

trunk/src/VBox/VMM/VMMR3/EM.cpp

@@ -91 +91 @@
 static const char *emR3GetStateName(EMSTATE enmState);
 #endif
-static int emR3Debug(PVM pVM, PVMCPU pVCpu, int rc);
+static VBOXSTRICTRC emR3Debug(PVM pVM, PVMCPU pVCpu, VBOXSTRICTRC rc);
 static int emR3RemStep(PVM pVM, PVMCPU pVCpu);
 static int emR3RemExecute(PVM pVM, PVMCPU pVCpu, bool *pfFFDone);
@@ -775 +775 @@
         case EMSTATE_TERMINATING:       return "EMSTATE_TERMINATING";
         case EMSTATE_DEBUG_GUEST_RAW:   return "EMSTATE_DEBUG_GUEST_RAW";
+        case EMSTATE_DEBUG_GUEST_HM:    return "EMSTATE_DEBUG_GUEST_HM";
+        case EMSTATE_DEBUG_GUEST_IEM:   return "EMSTATE_DEBUG_GUEST_IEM";
         case EMSTATE_DEBUG_GUEST_REM:   return "EMSTATE_DEBUG_GUEST_REM";
         case EMSTATE_DEBUG_HYPER:       return "EMSTATE_DEBUG_HYPER";
@@ -792 +794 @@
  * @param   rc      Current EM VBox status code.
  */
-static int emR3Debug(PVM pVM, PVMCPU pVCpu, int rc)
+static VBOXSTRICTRC emR3Debug(PVM pVM, PVMCPU pVCpu, VBOXSTRICTRC rc)
 {
     for (;;)
     {
-        Log(("emR3Debug: rc=%Rrc\n", rc));
-        const int rcLast = rc;
+        Log(("emR3Debug: rc=%Rrc\n", VBOXSTRICTRC_VAL(rc)));
+        const VBOXSTRICTRC rcLast = rc;
 
         /*
          * Debug related RC.
          */
-        switch (rc)
+        switch (VBOXSTRICTRC_VAL(rc))
         {
             /*
@@ -808 +810 @@
              */
             case VINF_EM_DBG_STEP:
+                if (   pVCpu->em.s.enmState == EMSTATE_DEBUG_GUEST_RAW
+                    || pVCpu->em.s.enmState == EMSTATE_DEBUG_HYPER
+                    || pVCpu->em.s.fForceRAW /* paranoia */)
 #ifdef VBOX_WITH_RAW_MODE
-                if (    pVCpu->em.s.enmState == EMSTATE_DEBUG_GUEST_RAW
-                    ||  pVCpu->em.s.enmState == EMSTATE_DEBUG_HYPER
-                    ||  pVCpu->em.s.fForceRAW /* paranoia */)
                     rc = emR3RawStep(pVM, pVCpu);
+#else
+                    AssertLogRelMsgFailedStmt(("Bad EM state."), VERR_EM_INTERNAL_ERROR);
+#endif
+                else if (pVCpu->em.s.enmState == EMSTATE_DEBUG_GUEST_HM)
+                    rc = EMR3HmSingleInstruction(pVM, pVCpu);
+#ifdef VBOX_WITH_REM
+                else if (pVCpu->em.s.enmState == EMSTATE_DEBUG_GUEST_REM)
+                    rc = emR3RemStep(pVM, pVCpu);
+#endif
                 else
                 {
-                    Assert(pVCpu->em.s.enmState == EMSTATE_DEBUG_GUEST_REM);
-                    rc = emR3RemStep(pVM, pVCpu);
+                    rc = IEMExecOne(pVCpu); /** @todo add dedicated interface... */
+                    if (rc == VINF_SUCCESS || rc == VINF_EM_RESCHEDULE)
+                        rc = VINF_EM_DBG_STEPPED;
                 }
-#else
-                AssertLogRelMsgFailed(("%Rrc\n", rc));
-                rc = VERR_EM_INTERNAL_ERROR;
-#endif
                 break;
 
@@ -873 +881 @@
         do
         {
-            switch (rc)
+            switch (VBOXSTRICTRC_VAL(rc))
             {
                 /*
@@ -905 +913 @@
                             continue;
 #else
-                        AssertLogRelMsgFailedReturn(("Not implemented\n", rc), VERR_EM_INTERNAL_ERROR);
+                        AssertLogRelMsgFailedReturn(("Not implemented\n"), VERR_EM_INTERNAL_ERROR);
 #endif
                     }
@@ -917 +925 @@
                  */
                 case VERR_DBGF_NOT_ATTACHED:
-                    switch (rcLast)
+                    switch (VBOXSTRICTRC_VAL(rcLast))
                     {
                         case VINF_EM_DBG_HYPER_STEPPED:
@@ -961 +969 @@
                  */
                 default:
-                    AssertMsgFailed(("Unexpected rc %Rrc!\n", rc));
+                    AssertMsgFailed(("Unexpected rc %Rrc!\n", VBOXSTRICTRC_VAL(rc)));
                     break;
             }
@@ -1840 +1848 @@
                 /** @todo this really isn't nice, should properly handle this */
                 rc2 = TRPMR3InjectEvent(pVM, pVCpu, TRPM_HARDWARE_INT);
-                if (pVM->em.s.fIemExecutesAll && rc2 == VINF_EM_RESCHEDULE_REM)
+                if (pVM->em.s.fIemExecutesAll && (rc2 == VINF_EM_RESCHEDULE_REM || rc2 == VINF_EM_RESCHEDULE_HM || rc2 == VINF_EM_RESCHEDULE_RAW))
                     rc2 = VINF_EM_RESCHEDULE;
 #ifdef VBOX_STRICT
@@ -2249 +2257 @@
                  */
                 case VINF_EM_DBG_STEPPED:
-                    /* Commenting this assertion for now as it hinders with single-stepping in new AMD-V code
-                     * (using guest EFLAGS.TF) and returning VINF_EM_DBG_STEPPED in the #DB handler. */
-#if 0
-                    AssertMsgFailed(("VINF_EM_DBG_STEPPED cannot be here!"));
-#endif
                 case VINF_EM_DBG_STOP:
                 case VINF_EM_DBG_BREAKPOINT:
@@ -2262 +2265 @@
                         pVCpu->em.s.enmState = EMSTATE_DEBUG_GUEST_RAW;
                     }
-                    else
+                    else if (enmOldState == EMSTATE_HM)
+                    {
+                        Log2(("EMR3ExecuteVM: %Rrc: %d -> %d\n", rc, enmOldState, EMSTATE_DEBUG_GUEST_HM));
+                        pVCpu->em.s.enmState = EMSTATE_DEBUG_GUEST_HM;
+                    }
+                    else if (enmOldState == EMSTATE_REM)
                     {
                         Log2(("EMR3ExecuteVM: %Rrc: %d -> %d\n", rc, enmOldState, EMSTATE_DEBUG_GUEST_REM));
                         pVCpu->em.s.enmState = EMSTATE_DEBUG_GUEST_REM;
+                    }
+                    else
+                    {
+                        Log2(("EMR3ExecuteVM: %Rrc: %d -> %d\n", rc, enmOldState, EMSTATE_DEBUG_GUEST_IEM));
+                        pVCpu->em.s.enmState = EMSTATE_DEBUG_GUEST_IEM;
                     }
                     break;
@@ -2322 +2335 @@
                         || enmNewState == EMSTATE_DEBUG_GUEST_RAW
                         || enmNewState == EMSTATE_DEBUG_GUEST_HM
+                        || enmNewState == EMSTATE_DEBUG_GUEST_IEM
                         || enmNewState == EMSTATE_DEBUG_GUEST_REM) )
                 {
@@ -2384 +2398 @@
                  */
                 case EMSTATE_IEM:
-                    rc = VBOXSTRICTRC_TODO(IEMExecLots(pVCpu));
+#if 0 /* For testing purposes. */
+                    rc = VBOXSTRICTRC_TODO(EMR3HmSingleInstruction(pVM, pVCpu));
+                    if (rc == VINF_EM_DBG_STEPPED || rc == VINF_EM_RESCHEDULE_HM || rc == VINF_EM_RESCHEDULE_REM || rc == VINF_EM_RESCHEDULE_RAW)
+                        rc = VINF_SUCCESS;
+                    else if (rc == VERR_EM_CANNOT_EXEC_GUEST)
+#endif
+                        rc = VBOXSTRICTRC_TODO(IEMExecLots(pVCpu));
                     if (pVM->em.s.fIemExecutesAll)
                     {
@@ -2437 +2457 @@
                  * Debugging in the guest.
                  */
+                case EMSTATE_DEBUG_GUEST_RAW:
+                case EMSTATE_DEBUG_GUEST_HM:
+                case EMSTATE_DEBUG_GUEST_IEM:
                 case EMSTATE_DEBUG_GUEST_REM:
-                case EMSTATE_DEBUG_GUEST_RAW:
                     TMR3NotifySuspend(pVM, pVCpu);
-                    rc = emR3Debug(pVM, pVCpu, rc);
+                    rc = VBOXSTRICTRC_TODO(emR3Debug(pVM, pVCpu, rc));
                     TMR3NotifyResume(pVM, pVCpu);
                     Log2(("EMR3ExecuteVM: enmr3Debug -> %Rrc (state %d)\n", rc, pVCpu->em.s.enmState));
@@ -2453 +2475 @@
                     STAM_REL_PROFILE_ADV_STOP(&pVCpu->em.s.StatTotal, x);
 
-                    rc = emR3Debug(pVM, pVCpu, rc);
+                    rc = VBOXSTRICTRC_TODO(emR3Debug(pVM, pVCpu, rc));
                     Log2(("EMR3ExecuteVM: enmr3Debug -> %Rrc (state %d)\n", rc, pVCpu->em.s.enmState));
                     if (rc != VINF_SUCCESS)

trunk/src/VBox/VMM/VMMR3/EMHM.cpp

@@ -152 +152 @@
 
 #endif /* DEBUG */
+
+
+/**
+ * Executes instruction in HM mode if we can.
+ *
+ * This is somewhat comparable to REMR3EmulateInstruction.
+ *
+ * @returns VBox strict status code.
+ * @retval  VINF_EM_DBG_STEPPED on success.
+ * @retval  VERR_EM_CANNOT_EXEC_GUEST if we cannot execute guest instructions in
+ *          HM right now.
+ *
+ * @param   pVM                 Pointer to the cross context VM structure.
+ * @param   pVCpu               Pointer to the cross context CPU structure for
+ *                              the calling EMT.
+ * @thread  EMT.
+ */
+VMMR3_INT_DECL(VBOXSTRICTRC) EMR3HmSingleInstruction(PVM pVM, PVMCPU pVCpu)
+{
+    if (!HMR3CanExecuteGuest(pVM, pVCpu->em.s.pCtx))
+        return VINF_EM_RESCHEDULE;
+
+    /*
+     * Service necessary FFs before going into HM.
+     */
+    PCPUMCTX pCtx = pVCpu->em.s.pCtx;
+    if (    VM_FF_IS_PENDING(pVM, VM_FF_HIGH_PRIORITY_PRE_RAW_MASK)
+        ||  VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_HIGH_PRIORITY_PRE_RAW_MASK))
+    {
+        VBOXSTRICTRC rcStrict = emR3HmForcedActions(pVM, pVCpu, pCtx);
+        if (rcStrict != VINF_SUCCESS)
+        {
+            Log(("EMR3HmSingleInstruction: FFs before -> %Rrc\n", VBOXSTRICTRC_VAL(rcStrict)));
+            return rcStrict;
+        }
+    }
+
+    /*
+     * Go execute it.
+     */
+    bool fOld = HMSetSingleInstruction(pVCpu, true);
+    VBOXSTRICTRC rcStrict = VMMR3HmRunGC(pVM, pVCpu);
+    HMSetSingleInstruction(pVCpu, fOld);
+    LogFlow(("EMR3HmSingleInstruction: %Rrc\n", VBOXSTRICTRC_VAL(rcStrict)));
+
+    /*
+     * Handle high priority FFs and informational status codes.  We don't do
+     * normal FF processing the caller or the next call can deal with them.
+     */
+    VMCPU_FF_CLEAR(pVCpu, VMCPU_FF_RESUME_GUEST_MASK);
+    if (    VM_FF_IS_PENDING(pVM, VM_FF_HIGH_PRIORITY_POST_MASK)
+        ||  VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_HIGH_PRIORITY_POST_MASK))
+    {
+        rcStrict = emR3HighPriorityPostForcedActions(pVM, pVCpu, VBOXSTRICTRC_TODO(rcStrict));
+        LogFlow(("EMR3HmSingleInstruction: FFs after -> %Rrc\n", VBOXSTRICTRC_VAL(rcStrict)));
+    }
+
+    if (rcStrict != VINF_SUCCESS && (rcStrict < VINF_EM_FIRST || rcStrict > VINF_EM_LAST))
+    {
+        rcStrict = emR3HmHandleRC(pVM, pVCpu, pCtx, VBOXSTRICTRC_TODO(rcStrict));
+        Log(("EMR3HmSingleInstruction: emR3HmHandleRC -> %Rrc\n", VBOXSTRICTRC_VAL(rcStrict)));
+    }
+
+    return rcStrict;
+}
 
 

trunk/src/VBox/VMM/include/HMInternal.h

@@ -538 +538 @@
     /** Set when the TLB has been checked until we return from the world switch. */
     volatile bool               fCheckedTLBFlush;
-    uint8_t                     u8Alignment[4];
+    /** Whether we're executing a single instruction. */
+    bool                        fSingleInstruction;
+    uint8_t                     abAlignment[3];
 
     /** World switch exit counter. */