Changeset 47671 in vbox for trunk/src/VBox/VMM

Timestamp:

Aug 12, 2013 11:16:55 AM (12 years ago)

Author:

vboxsync

svn:sync-xref-src-repo-rev:

87874

Message:

VMM: More debugging related stuff.

Location:

trunk/src/VBox/VMM

Files:

• VMMAll/DBGFAll.cpp (modified) (1 diff)
• VMMAll/IEMAll.cpp (modified) (4 diffs)
• VMMR0/HMSVMR0.cpp (modified) (2 diffs)
• VMMR0/HMVMXR0.cpp (modified) (3 diffs)
• VMMR3/EM.cpp (modified) (8 diffs)
• VMMR3/EMHM.cpp (modified) (1 diff)
• VMMRC/TRPMRCHandlers.cpp (modified) (2 diffs)
• VMMRZ/DBGFRZ.cpp (modified) (2 diffs)

trunk/src/VBox/VMM/VMMAll/DBGFAll.cpp

@@ -115 +115 @@
 
 /**
+ * Checks if any of the hardware breakpoints are armed.
+ *
+ * @returns true if armed, false if not.
+ * @param   pVM         The cross context VM structure.
+ */
+VMM_INT_DECL(bool) DBGFBpIsHwArmed(PVM pVM)
+{
+    Assert(RT_ELEMENTS(pVM->dbgf.s.aHwBreakpoints) == 4);
+    return (pVM->dbgf.s.aHwBreakpoints[0].fEnabled && pVM->dbgf.s.aHwBreakpoints[0].enmType == DBGFBPTYPE_REG)
+        || (pVM->dbgf.s.aHwBreakpoints[1].fEnabled && pVM->dbgf.s.aHwBreakpoints[1].enmType == DBGFBPTYPE_REG)
+        || (pVM->dbgf.s.aHwBreakpoints[2].fEnabled && pVM->dbgf.s.aHwBreakpoints[2].enmType == DBGFBPTYPE_REG)
+        || (pVM->dbgf.s.aHwBreakpoints[3].fEnabled && pVM->dbgf.s.aHwBreakpoints[3].enmType == DBGFBPTYPE_REG);
+}
+
+
+/**
  * Returns the single stepping state for a virtual CPU.
  *

trunk/src/VBox/VMM/VMMAll/IEMAll.cpp

@@ -8926 +8926 @@
      */
     PVM pVM = IEMCPU_TO_VM(pIemCpu);
-    EMRemLock(pVM);
-    int rc = REMR3EmulateInstruction(pVM, IEMCPU_TO_VMCPU(pIemCpu));
-    AssertRC(rc);
-    EMRemUnlock(pVM);
+    VBOXSTRICTRC rc = VERR_EM_CANNOT_EXEC_GUEST;
+#if 1
+    if (   HMIsEnabled(pVM)
+        && pIemCpu->cIOReads == 0
+        && pIemCpu->cIOWrites == 0)
+        do
+            rc = EMR3HmSingleInstruction(pVM, IEMCPU_TO_VMCPU(pIemCpu), EM_ONE_INS_FLAGS_RIP_CHANGE);
+        while (rc == VINF_SUCCESS);
+#endif
+    if (   rc == VERR_EM_CANNOT_EXEC_GUEST
+        || rc == VINF_IOM_R3_IOPORT_READ
+        || rc == VINF_IOM_R3_IOPORT_WRITE
+        || rc == VINF_IOM_R3_MMIO_READ
+        || rc == VINF_IOM_R3_MMIO_READ_WRITE
+        || rc == VINF_IOM_R3_MMIO_WRITE
+        )
+    {
+        EMRemLock(pVM);
+        rc = REMR3EmulateInstruction(pVM, IEMCPU_TO_VMCPU(pIemCpu));
+        AssertRC(rc);
+        EMRemUnlock(pVM);
+    }
 
     /*
@@ -9550 +9568 @@
      * See if there is an interrupt pending in TRPM and inject it if we can.
      */
-#ifdef IEM_VERIFICATION_MODE_FULL
+#if !defined(IEM_VERIFICATION_MODE_FULL) || !defined(IN_RING3)
+# ifdef IEM_VERIFICATION_MODE_FULL
     pIemCpu->uInjectCpl = UINT8_MAX;
-#endif
+# endif
     if (   pCtx->eflags.Bits.u1IF
         && TRPMHasTrap(pVCpu)
@@ -9566 +9585 @@
             TRPMResetTrap(pVCpu);
     }
+#else
+    iemExecVerificationModeSetup(pIemCpu);
+#endif
 
     /*
@@ -9609 +9631 @@
     if (rcStrict == VINF_SUCCESS)
         rcStrict = iemExecOneInner(pVCpu, pIemCpu, true);
+
+#if defined(IEM_VERIFICATION_MODE_FULL) && defined(IN_RING3)
+    /*
+     * Assert some sanity.
+     */
+    iemExecVerificationModeCheck(pIemCpu);
+#endif
 
     /*

trunk/src/VBox/VMM/VMMR0/HMSVMR0.cpp

@@ -2498 +2498 @@
     Assert(!VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_HM_UPDATE_PAE_PDPES));
 
-    if (   VM_FF_IS_PENDING(pVM, VM_FF_HM_TO_R3_MASK | VM_FF_REQUEST | VM_FF_PGM_POOL_FLUSH_PENDING | VM_FF_PDM_DMA)
-        || VMCPU_FF_IS_PENDING(pVCpu,   VMCPU_FF_HM_TO_R3_MASK | VMCPU_FF_PGM_SYNC_CR3 | VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL
-                                      | VMCPU_FF_REQUEST))
+    if (   VM_FF_IS_PENDING(pVM, !pVCpu->hm.s.fSingleInstruction
+                            ? VM_FF_HP_R0_PRE_HM_MASK : VM_FF_HP_R0_PRE_HM_STEP_MASK)
+        || VMCPU_FF_IS_PENDING(pVCpu, !pVCpu->hm.s.fSingleInstruction
+                               ? VMCPU_FF_HP_R0_PRE_HM_MASK : VMCPU_FF_HP_R0_PRE_HM_STEP_MASK) )
     {
         /* Pending PGM C3 sync. */
@@ -4584 +4585 @@
     PSVMVMCB    pVmcb   = (PSVMVMCB)pVCpu->hm.s.svm.pvVmcb;
     PVM         pVM     = pVCpu->CTX_SUFF(pVM);
-    int rc = DBGFRZTrap01Handler(pVM, pVCpu, CPUMCTX2CORE(pCtx), pVmcb->guest.u64DR6);
+    int rc = DBGFRZTrap01Handler(pVM, pVCpu, CPUMCTX2CORE(pCtx), pVmcb->guest.u64DR6, pVCpu->hm.s.fSingleInstruction);
     if (rc == VINF_EM_RAW_GUEST_TRAP)
     {

trunk/src/VBox/VMM/VMMR0/HMVMXR0.cpp

@@ -5791 +5791 @@
     Assert(VMMRZCallRing3IsEnabled(pVCpu));
 
-    if (   VM_FF_IS_PENDING(pVM, VM_FF_HM_TO_R3_MASK | VM_FF_REQUEST | VM_FF_PGM_POOL_FLUSH_PENDING | VM_FF_PDM_DMA)
-        || VMCPU_FF_IS_PENDING(pVCpu,  VMCPU_FF_HM_TO_R3_MASK | VMCPU_FF_PGM_SYNC_CR3 | VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL
-                                     | VMCPU_FF_REQUEST | VMCPU_FF_HM_UPDATE_CR3 | VMCPU_FF_HM_UPDATE_PAE_PDPES))
+    if (   VM_FF_IS_PENDING(pVM, !pVCpu->hm.s.fSingleInstruction
+                            ? VM_FF_HP_R0_PRE_HM_MASK : VM_FF_HP_R0_PRE_HM_STEP_MASK)
+        || VMCPU_FF_IS_PENDING(pVCpu, !pVCpu->hm.s.fSingleInstruction
+                               ? VMCPU_FF_HP_R0_PRE_HM_MASK : VMCPU_FF_HP_R0_PRE_HM_STEP_MASK) )
     {
         /* We need the control registers now, make sure the guest-CPU context is updated. */
@@ -9628 +9629 @@
     AssertRCReturn(rc, rc);
 
+    /* If we sat the trap flag above, we have to clear it. */ /** @todo HM should remember what it does and possibly do this elsewhere! */
+    if (   (pVCpu->hm.s.fSingleInstruction || DBGFIsStepping(pVCpu))
+        && !(pVCpu->CTX_SUFF(pVM)->hm.s.vmx.msr.vmx_proc_ctls.n.allowed1 & VMX_VMCS_CTRL_PROC_EXEC_MONITOR_TRAP_FLAG))
+        pMixedCtx->eflags.Bits.u1TF = 0;
+
     /* Refer Intel spec. Table 27-1. "Exit Qualifications for debug exceptions" for the format. */
     uint64_t uDR6 = X86_DR6_INIT_VAL;
@@ -9633 +9639 @@
                      & (X86_DR6_B0 | X86_DR6_B1 | X86_DR6_B2 | X86_DR6_B3 | X86_DR6_BD | X86_DR6_BS));
 
-    rc = DBGFRZTrap01Handler(pVCpu->CTX_SUFF(pVM), pVCpu, CPUMCTX2CORE(pMixedCtx), uDR6);
+    rc = DBGFRZTrap01Handler(pVCpu->CTX_SUFF(pVM), pVCpu, CPUMCTX2CORE(pMixedCtx), uDR6, pVCpu->hm.s.fSingleInstruction);
     if (rc == VINF_EM_RAW_GUEST_TRAP)
     {

trunk/src/VBox/VMM/VMMR3/EM.cpp

@@ -57 +57 @@
 #include <VBox/vmm/hm.h>
 #include <VBox/vmm/patm.h>
-#ifdef IEM_VERIFICATION_MODE
-# include <VBox/vmm/iem.h>
-#endif
 #include "EMInternal.h"
 #include <VBox/vmm/vm.h>
@@ -819 +816 @@
 #endif
                 else if (pVCpu->em.s.enmState == EMSTATE_DEBUG_GUEST_HM)
-                    rc = EMR3HmSingleInstruction(pVM, pVCpu);
+                    rc = EMR3HmSingleInstruction(pVM, pVCpu, 0 /*fFlags*/);
 #ifdef VBOX_WITH_REM
                 else if (pVCpu->em.s.enmState == EMSTATE_DEBUG_GUEST_REM)
@@ -1261 +1258 @@
 EMSTATE emR3Reschedule(PVM pVM, PVMCPU pVCpu, PCPUMCTX pCtx)
 {
-#ifdef IEM_VERIFICATION_MODE
-    return EMSTATE_REM;
-#else
-
     /*
      * When forcing raw-mode execution, things are simple.
@@ -1472 +1465 @@
     /*Assert(PGMPhysIsA20Enabled(pVCpu));*/
     return EMSTATE_RAW;
-#endif /* !IEM_VERIFICATION_MODE */
-
 }
 
@@ -2360 +2351 @@
                  */
                 case EMSTATE_RAW:
-#ifndef IEM_VERIFICATION_MODE /* remove later */
-# ifdef VBOX_WITH_RAW_MODE
+#ifdef VBOX_WITH_RAW_MODE
                     rc = emR3RawExecute(pVM, pVCpu, &fFFDone);
-# else
+#else
                     AssertLogRelMsgFailed(("%Rrc\n", rc));
                     rc = VERR_EM_INTERNAL_ERROR;
-# endif
+#endif
                     break;
-#endif
 
                 /*
@@ -2374 +2363 @@
                  */
                 case EMSTATE_HM:
-#ifndef IEM_VERIFICATION_MODE /* remove later */
                     rc = emR3HmExecute(pVM, pVCpu, &fFFDone);
                     break;
-#endif
 
                 /*
@@ -2383 +2370 @@
                  */
                 case EMSTATE_REM:
-#ifdef IEM_VERIFICATION_MODE
-# if 1
-                    rc = VBOXSTRICTRC_TODO(IEMExecOne(pVCpu)); fFFDone = false;
-# else
-                    rc = VBOXSTRICTRC_TODO(REMR3EmulateInstruction(pVM, pVCpu)); fFFDone = false;
-                    if (rc == VINF_EM_RESCHEDULE)
-                        rc = VINF_SUCCESS;
-# endif
-#else
                     rc = emR3RemExecute(pVM, pVCpu, &fFFDone);
-#endif
                     Log2(("EMR3ExecuteVM: emR3RemExecute -> %Rrc\n", rc));
                     break;
@@ -2402 +2379 @@
                 case EMSTATE_IEM:
 #if 0 /* For testing purposes. */
-                    rc = VBOXSTRICTRC_TODO(EMR3HmSingleInstruction(pVM, pVCpu));
+                    rc = VBOXSTRICTRC_TODO(EMR3HmSingleInstruction(pVM, pVCpu, EM_ONE_INS_FLAGS_RIP_CHANGE));
                     if (rc == VINF_EM_DBG_STEPPED || rc == VINF_EM_RESCHEDULE_HM || rc == VINF_EM_RESCHEDULE_REM || rc == VINF_EM_RESCHEDULE_RAW)
                         rc = VINF_SUCCESS;

trunk/src/VBox/VMM/VMMR3/EMHM.cpp

@@ -167 +167 @@
  * @param   pVCpu               Pointer to the cross context CPU structure for
  *                              the calling EMT.
+ * @param   fFlags              Combinations of EM_ONE_INS_FLAGS_XXX.
  * @thread  EMT.
  */
-VMMR3_INT_DECL(VBOXSTRICTRC) EMR3HmSingleInstruction(PVM pVM, PVMCPU pVCpu)
+VMMR3_INT_DECL(VBOXSTRICTRC) EMR3HmSingleInstruction(PVM pVM, PVMCPU pVCpu, uint32_t fFlags)
 {
-    if (!HMR3CanExecuteGuest(pVM, pVCpu->em.s.pCtx))
+    PCPUMCTX pCtx = pVCpu->em.s.pCtx;
+    Assert(!(fFlags & ~EM_ONE_INS_FLAGS_MASK));
+
+    if (!HMR3CanExecuteGuest(pVM, pCtx))
         return VINF_EM_RESCHEDULE;
 
-    /*
-     * Service necessary FFs before going into HM.
-     */
-    PCPUMCTX pCtx = pVCpu->em.s.pCtx;
-    if (    VM_FF_IS_PENDING(pVM, VM_FF_HIGH_PRIORITY_PRE_RAW_MASK)
-        ||  VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_HIGH_PRIORITY_PRE_RAW_MASK))
-    {
-        VBOXSTRICTRC rcStrict = emR3HmForcedActions(pVM, pVCpu, pCtx);
-        if (rcStrict != VINF_SUCCESS)
-        {
-            Log(("EMR3HmSingleInstruction: FFs before -> %Rrc\n", VBOXSTRICTRC_VAL(rcStrict)));
+    uint64_t const uOldRip = pCtx->rip;
+    for (;;)
+    {
+        /*
+         * Service necessary FFs before going into HM.
+         */
+        if (   VM_FF_IS_PENDING(pVM, VM_FF_HIGH_PRIORITY_PRE_RAW_MASK)
+            || VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_HIGH_PRIORITY_PRE_RAW_MASK))
+        {
+            VBOXSTRICTRC rcStrict = emR3HmForcedActions(pVM, pVCpu, pCtx);
+            if (rcStrict != VINF_SUCCESS)
+            {
+                Log(("EMR3HmSingleInstruction: FFs before -> %Rrc\n", VBOXSTRICTRC_VAL(rcStrict)));
+                return rcStrict;
+            }
+        }
+
+        /*
+         * Go execute it.
+         */
+        bool fOld = HMSetSingleInstruction(pVCpu, true);
+        VBOXSTRICTRC rcStrict = VMMR3HmRunGC(pVM, pVCpu);
+        HMSetSingleInstruction(pVCpu, fOld);
+        LogFlow(("EMR3HmSingleInstruction: %Rrc\n", VBOXSTRICTRC_VAL(rcStrict)));
+
+        /*
+         * Handle high priority FFs and informational status codes.  We don't do
+         * normal FF processing the caller or the next call can deal with them.
+         */
+        VMCPU_FF_CLEAR(pVCpu, VMCPU_FF_RESUME_GUEST_MASK);
+        if (   VM_FF_IS_PENDING(pVM, VM_FF_HIGH_PRIORITY_POST_MASK)
+            || VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_HIGH_PRIORITY_POST_MASK))
+        {
+            rcStrict = emR3HighPriorityPostForcedActions(pVM, pVCpu, VBOXSTRICTRC_TODO(rcStrict));
+            LogFlow(("EMR3HmSingleInstruction: FFs after -> %Rrc\n", VBOXSTRICTRC_VAL(rcStrict)));
+        }
+
+        if (rcStrict != VINF_SUCCESS && (rcStrict < VINF_EM_FIRST || rcStrict > VINF_EM_LAST))
+        {
+            rcStrict = emR3HmHandleRC(pVM, pVCpu, pCtx, VBOXSTRICTRC_TODO(rcStrict));
+            Log(("EMR3HmSingleInstruction: emR3HmHandleRC -> %Rrc\n", VBOXSTRICTRC_VAL(rcStrict)));
+        }
+
+        /*
+         * Done?
+         */
+        if (   (rcStrict != VINF_SUCCESS && rcStrict != VINF_EM_DBG_STEPPED)
+            || !(fFlags & EM_ONE_INS_FLAGS_RIP_CHANGE)
+            || pCtx->rip != uOldRip)
+        {
+            if (rcStrict == VINF_SUCCESS && pCtx->rip != uOldRip)
+                rcStrict = VINF_EM_DBG_STEPPED;
+            Log(("EMR3HmSingleInstruction: returns %Rrc (rip %llx -> %llx)\n", VBOXSTRICTRC_VAL(rcStrict), uOldRip, pCtx->rip));
             return rcStrict;
         }
     }
-
-    /*
-     * Go execute it.
-     */
-    bool fOld = HMSetSingleInstruction(pVCpu, true);
-    VBOXSTRICTRC rcStrict = VMMR3HmRunGC(pVM, pVCpu);
-    HMSetSingleInstruction(pVCpu, fOld);
-    LogFlow(("EMR3HmSingleInstruction: %Rrc\n", VBOXSTRICTRC_VAL(rcStrict)));
-
-    /*
-     * Handle high priority FFs and informational status codes.  We don't do
-     * normal FF processing the caller or the next call can deal with them.
-     */
-    VMCPU_FF_CLEAR(pVCpu, VMCPU_FF_RESUME_GUEST_MASK);
-    if (    VM_FF_IS_PENDING(pVM, VM_FF_HIGH_PRIORITY_POST_MASK)
-        ||  VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_HIGH_PRIORITY_POST_MASK))
-    {
-        rcStrict = emR3HighPriorityPostForcedActions(pVM, pVCpu, VBOXSTRICTRC_TODO(rcStrict));
-        LogFlow(("EMR3HmSingleInstruction: FFs after -> %Rrc\n", VBOXSTRICTRC_VAL(rcStrict)));
-    }
-
-    if (rcStrict != VINF_SUCCESS && (rcStrict < VINF_EM_FIRST || rcStrict > VINF_EM_LAST))
-    {
-        rcStrict = emR3HmHandleRC(pVM, pVCpu, pCtx, VBOXSTRICTRC_TODO(rcStrict));
-        Log(("EMR3HmSingleInstruction: emR3HmHandleRC -> %Rrc\n", VBOXSTRICTRC_VAL(rcStrict)));
-    }
-
-    return rcStrict;
 }
 

trunk/src/VBox/VMM/VMMRC/TRPMRCHandlers.cpp

@@ -321 +321 @@
      */
     PGMRZDynMapStartAutoSet(pVCpu);
-    int rc = DBGFRZTrap01Handler(pVM, pVCpu, pRegFrame, uDr6);
+    int rc = DBGFRZTrap01Handler(pVM, pVCpu, pRegFrame, uDr6, false /*fAltStepping*/);
     if (rc == VINF_EM_RAW_GUEST_TRAP)
         CPUMSetGuestDR6(pVCpu, CPUMGetGuestDR6(pVCpu) | uDr6);
+    else if (rc == VINF_EM_DBG_STEPPED)
+        pRegFrame->eflags.Bits.u1TF = 0;
 
     rc = trpmGCExitTrap(pVM, pVCpu, rc, pRegFrame);
@@ -368 +370 @@
      * Now leave the rest to the DBGF.
      */
-    int rc = DBGFRZTrap01Handler(pVM, pVCpu, pRegFrame, uDr6);
+    int rc = DBGFRZTrap01Handler(pVM, pVCpu, pRegFrame, uDr6, false /*fAltStepping*/);
     AssertStmt(rc != VINF_EM_RAW_GUEST_TRAP, rc = VERR_TRPM_IPE_1);
+    if (rc == VINF_EM_DBG_STEPPED)
+        pRegFrame->eflags.Bits.u1TF = 0;
 
     Log6(("TRPMGCHyper01: %Rrc (%04x:%08x %RTreg)\n", rc, pRegFrame->cs.Sel, pRegFrame->eip, uDr6));

trunk/src/VBox/VMM/VMMRZ/DBGFRZ.cpp

@@ -38 +38 @@
  *          other codes are passed execution to host context.
  *
- * @param   pVM         Pointer to the VM.
- * @param   pVCpu       Pointer to the VMCPU.
- * @param   pRegFrame   Pointer to the register frame for the trap.
- * @param   uDr6        The DR6 hypervisor register value.
+ * @param   pVM             Pointer to the VM.
+ * @param   pVCpu           Pointer to the VMCPU.
+ * @param   pRegFrame       Pointer to the register frame for the trap.
+ * @param   uDr6            The DR6 hypervisor register value.
+ * @param   fAltStepping    Alternative stepping indicator.
  */
-VMMRZ_INT_DECL(int) DBGFRZTrap01Handler(PVM pVM, PVMCPU pVCpu, PCPUMCTXCORE pRegFrame, RTGCUINTREG uDr6)
+VMMRZ_INT_DECL(int) DBGFRZTrap01Handler(PVM pVM, PVMCPU pVCpu, PCPUMCTXCORE pRegFrame, RTGCUINTREG uDr6, bool fAltStepping)
 {
 #ifdef IN_RC
@@ -78 +79 @@
      */
     if (    (uDr6 & X86_DR6_BS)
-        &&  (fInHyper || pVCpu->dbgf.s.fSingleSteppingRaw))
+        &&  (fInHyper || pVCpu->dbgf.s.fSingleSteppingRaw || fAltStepping))
     {
         pVCpu->dbgf.s.fSingleSteppingRaw = false;