VirtualBox

Changeset 47771 in vbox for trunk/src/VBox/VMM/VMMR0


Ignore:
Timestamp:
Aug 15, 2013 2:35:16 PM (11 years ago)
Author:
vboxsync
Message:

VMM/HM: One extra char. to make typing without autocomplete easier.

Location:
trunk/src/VBox/VMM/VMMR0
Files:
5 edited

Legend:

Unmodified
Added
Removed
  • trunk/src/VBox/VMM/VMMR0/HMR0.cpp

    r47760 r47771  
    8282{
    8383    /** Per CPU globals. */
    84     HMGLOBLCPUINFO                  aCpuInfo[RTCPUSET_MAX_CPUS];
     84    HMGLOBALCPUINFO                  aCpuInfo[RTCPUSET_MAX_CPUS];
    8585
    8686    /** @name Ring-0 method table for AMD-V and VT-x specific operations.
    8787     * @{ */
    88     DECLR0CALLBACKMEMBER(int,  pfnEnterSession,(PVM pVM, PVMCPU pVCpu, PHMGLOBLCPUINFO pCpu));
     88    DECLR0CALLBACKMEMBER(int,  pfnEnterSession,(PVM pVM, PVMCPU pVCpu, PHMGLOBALCPUINFO pCpu));
    8989    DECLR0CALLBACKMEMBER(int,  pfnLeaveSession,(PVM pVM, PVMCPU pVCpu, PCPUMCTX pCtx));
    9090    DECLR0CALLBACKMEMBER(void, pfnThreadCtxCallback,(RTTHREADCTXEVENT enmEvent, PVMCPU pVCpu, bool fGlobalInit));
     
    9292    DECLR0CALLBACKMEMBER(int,  pfnLoadGuestState,(PVM pVM, PVMCPU pVCpu, PCPUMCTX pCtx));
    9393    DECLR0CALLBACKMEMBER(int,  pfnRunGuestCode,(PVM pVM, PVMCPU pVCpu, PCPUMCTX pCtx));
    94     DECLR0CALLBACKMEMBER(int,  pfnEnableCpu,(PHMGLOBLCPUINFO pCpu, PVM pVM, void *pvCpuPage, RTHCPHYS HCPhysCpuPage,
     94    DECLR0CALLBACKMEMBER(int,  pfnEnableCpu,(PHMGLOBALCPUINFO pCpu, PVM pVM, void *pvCpuPage, RTHCPHYS HCPhysCpuPage,
    9595                                             bool fEnabledByHost));
    96     DECLR0CALLBACKMEMBER(int,  pfnDisableCpu,(PHMGLOBLCPUINFO pCpu, void *pvCpuPage, RTHCPHYS HCPhysCpuPage));
     96    DECLR0CALLBACKMEMBER(int,  pfnDisableCpu,(PHMGLOBALCPUINFO pCpu, void *pvCpuPage, RTHCPHYS HCPhysCpuPage));
    9797    DECLR0CALLBACKMEMBER(int,  pfnInitVM,(PVM pVM));
    9898    DECLR0CALLBACKMEMBER(int,  pfnTermVM,(PVM pVM));
     
    242242 * @{ */
    243243
    244 static DECLCALLBACK(int) hmR0DummyEnter(PVM pVM, PVMCPU pVCpu, PHMGLOBLCPUINFO pCpu)
     244static DECLCALLBACK(int) hmR0DummyEnter(PVM pVM, PVMCPU pVCpu, PHMGLOBALCPUINFO pCpu)
    245245{
    246246    NOREF(pVM); NOREF(pVCpu); NOREF(pCpu);
     
    259259}
    260260
    261 static DECLCALLBACK(int) hmR0DummyEnableCpu(PHMGLOBLCPUINFO pCpu, PVM pVM, void *pvCpuPage, RTHCPHYS HCPhysCpuPage,
     261static DECLCALLBACK(int) hmR0DummyEnableCpu(PHMGLOBALCPUINFO pCpu, PVM pVM, void *pvCpuPage, RTHCPHYS HCPhysCpuPage,
    262262                                            bool fEnabledBySystem)
    263263{
     
    266266}
    267267
    268 static DECLCALLBACK(int) hmR0DummyDisableCpu(PHMGLOBLCPUINFO pCpu, void *pvCpuPage, RTHCPHYS HCPhysCpuPage)
     268static DECLCALLBACK(int) hmR0DummyDisableCpu(PHMGLOBALCPUINFO pCpu, void *pvCpuPage, RTHCPHYS HCPhysCpuPage)
    269269{
    270270    NOREF(pCpu);  NOREF(pvCpuPage); NOREF(HCPhysCpuPage);
     
    916916static int hmR0EnableCpu(PVM pVM, RTCPUID idCpu)
    917917{
    918     PHMGLOBLCPUINFO pCpu = &g_HvmR0.aCpuInfo[idCpu];
     918    PHMGLOBALCPUINFO pCpu = &g_HvmR0.aCpuInfo[idCpu];
    919919
    920920    Assert(idCpu == (RTCPUID)RTMpCpuIdToSetIndex(idCpu)); /// @todo fix idCpu == index assumption (rainy day)
     
    10701070static int hmR0DisableCpu(RTCPUID idCpu)
    10711071{
    1072     PHMGLOBLCPUINFO pCpu = &g_HvmR0.aCpuInfo[idCpu];
     1072    PHMGLOBALCPUINFO pCpu = &g_HvmR0.aCpuInfo[idCpu];
    10731073
    10741074    Assert(!g_HvmR0.vmx.fSupported || !g_HvmR0.vmx.fUsingSUPR0EnableVTx);
     
    13041304     * Call the hardware specific initialization method.
    13051305     */
    1306     RTCCUINTREG     fFlags = ASMIntDisableFlags();
    1307     PHMGLOBLCPUINFO pCpu   = HMR0GetCurrentCpu();
     1306    RTCCUINTREG      fFlags = ASMIntDisableFlags();
     1307    PHMGLOBALCPUINFO pCpu   = HMR0GetCurrentCpu();
    13081308    ASMSetFlags(fFlags);
    13091309
     
    13341334     * Call the hardware specific method.
    13351335     */
    1336     RTCCUINTREG     fFlags = ASMIntDisableFlags();
    1337     PHMGLOBLCPUINFO pCpu   = HMR0GetCurrentCpu();
     1336    RTCCUINTREG      fFlags = ASMIntDisableFlags();
     1337    PHMGLOBALCPUINFO pCpu   = HMR0GetCurrentCpu();
    13381338    ASMSetFlags(fFlags);
    13391339
     
    13641364     * enabled for AMD-V/VT-x and preemption to be prevented.
    13651365     */
    1366     RTCCUINTREG     fFlags = ASMIntDisableFlags();
    1367     RTCPUID         idCpu  = RTMpCpuId();
    1368     PHMGLOBLCPUINFO pCpu   = &g_HvmR0.aCpuInfo[idCpu];
     1366    RTCCUINTREG      fFlags = ASMIntDisableFlags();
     1367    RTCPUID          idCpu  = RTMpCpuId();
     1368    PHMGLOBALCPUINFO pCpu   = &g_HvmR0.aCpuInfo[idCpu];
    13691369
    13701370    /* On first entry we'll sync everything. */
     
    14051405
    14061406    RTCPUID          idCpu = RTMpCpuId();
    1407     PHMGLOBLCPUINFO  pCpu = &g_HvmR0.aCpuInfo[idCpu];
     1407    PHMGLOBALCPUINFO pCpu = &g_HvmR0.aCpuInfo[idCpu];
    14081408    AssertPtr(pCpu);
    14091409
     
    14461446#endif
    14471447
    1448     RTCPUID         idCpu = RTMpCpuId();
    1449     PHMGLOBLCPUINFO pCpu  = &g_HvmR0.aCpuInfo[idCpu];
    1450     PCPUMCTX        pCtx  = CPUMQueryGuestCtxPtr(pVCpu);
     1448    RTCPUID          idCpu = RTMpCpuId();
     1449    PHMGLOBALCPUINFO pCpu  = &g_HvmR0.aCpuInfo[idCpu];
     1450    PCPUMCTX         pCtx  = CPUMQueryGuestCtxPtr(pVCpu);
    14511451    Assert(pCpu);
    14521452    Assert(pCtx);
     
    15811581{
    15821582#ifdef VBOX_STRICT
    1583     PHMGLOBLCPUINFO pCpu = &g_HvmR0.aCpuInfo[RTMpCpuId()];
     1583    PHMGLOBALCPUINFO pCpu = &g_HvmR0.aCpuInfo[RTMpCpuId()];
    15841584    Assert(!VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_PGM_SYNC_CR3 | VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL));
    15851585    Assert(pCpu->fConfigured);
     
    16781678 * @returns The cpu structure pointer.
    16791679 */
    1680 VMMR0DECL(PHMGLOBLCPUINFO) HMR0GetCurrentCpu(void)
     1680VMMR0DECL(PHMGLOBALCPUINFO) HMR0GetCurrentCpu(void)
    16811681{
    16821682    RTCPUID idCpu = RTMpCpuId();
     
    16931693 * @param   idCpu       id of the VCPU.
    16941694 */
    1695 VMMR0DECL(PHMGLOBLCPUINFO) HMR0GetCurrentCpuEx(RTCPUID idCpu)
     1695VMMR0DECL(PHMGLOBALCPUINFO) HMR0GetCurrentCpuEx(RTCPUID idCpu)
    16961696{
    16971697    Assert(idCpu < RT_ELEMENTS(g_HvmR0.aCpuInfo));
     
    18011801
    18021802    /* Ok, disable VT-x. */
    1803     PHMGLOBLCPUINFO pCpu = HMR0GetCurrentCpu();
     1803    PHMGLOBALCPUINFO pCpu = HMR0GetCurrentCpu();
    18041804    AssertReturn(pCpu && pCpu->hMemObj != NIL_RTR0MEMOBJ, VERR_HM_IPE_2);
    18051805
     
    18331833        Assert(g_HvmR0.fGlobalInit);
    18341834
    1835         PHMGLOBLCPUINFO pCpu = HMR0GetCurrentCpu();
     1835        PHMGLOBALCPUINFO pCpu = HMR0GetCurrentCpu();
    18361836        AssertReturnVoid(pCpu && pCpu->hMemObj != NIL_RTR0MEMOBJ);
    18371837
  • trunk/src/VBox/VMM/VMMR0/HMSVMR0.cpp

    r47766 r47771  
    292292 * @param   HCPhysCpuPage   Physical address of the global CPU page.
    293293 */
    294 VMMR0DECL(int) SVMR0EnableCpu(PHMGLOBLCPUINFO pCpu, PVM pVM, void *pvCpuPage, RTHCPHYS HCPhysCpuPage, bool fEnabledByHost)
     294VMMR0DECL(int) SVMR0EnableCpu(PHMGLOBALCPUINFO pCpu, PVM pVM, void *pvCpuPage, RTHCPHYS HCPhysCpuPage, bool fEnabledByHost)
    295295{
    296296    AssertReturn(!fEnabledByHost, VERR_INVALID_PARAMETER);
     
    347347 * @param   HCPhysCpuPage   Physical address of the global CPU page.
    348348 */
    349 VMMR0DECL(int) SVMR0DisableCpu(PHMGLOBLCPUINFO pCpu, void *pvCpuPage, RTHCPHYS HCPhysCpuPage)
     349VMMR0DECL(int) SVMR0DisableCpu(PHMGLOBALCPUINFO pCpu, void *pvCpuPage, RTHCPHYS HCPhysCpuPage)
    350350{
    351351    AssertReturn(   HCPhysCpuPage
     
    793793    PVM pVM              = pVCpu->CTX_SUFF(pVM);
    794794    PSVMVMCB pVmcb       = (PSVMVMCB)pVCpu->hm.s.svm.pvVmcb;
    795     PHMGLOBLCPUINFO pCpu = HMR0GetCurrentCpu();
     795    PHMGLOBALCPUINFO pCpu = HMR0GetCurrentCpu();
    796796
    797797    /*
     
    15461546 * @param   pCpu        Pointer to the CPU info struct.
    15471547 */
    1548 VMMR0DECL(int) SVMR0Enter(PVM pVM, PVMCPU pVCpu, PHMGLOBLCPUINFO pCpu)
     1548VMMR0DECL(int) SVMR0Enter(PVM pVM, PVMCPU pVCpu, PHMGLOBALCPUINFO pCpu)
    15491549{
    15501550    AssertPtr(pVM);
  • trunk/src/VBox/VMM/VMMR0/HMSVMR0.h

    r47760 r47771  
    4040VMMR0DECL(int)  SVMR0GlobalInit(void);
    4141VMMR0DECL(void) SVMR0GlobalTerm(void);
    42 VMMR0DECL(int)  SVMR0Enter(PVM pVM, PVMCPU pVCpu, PHMGLOBLCPUINFO pCpu);
     42VMMR0DECL(int)  SVMR0Enter(PVM pVM, PVMCPU pVCpu, PHMGLOBALCPUINFO pCpu);
    4343VMMR0DECL(int)  SVMR0Leave(PVM pVM, PVMCPU pVCpu, PCPUMCTX pCtx);
    4444VMMR0DECL(void) SVMR0ThreadCtxCallback(RTTHREADCTXEVENT enmEvent, PVMCPU pVCpu, bool fGlobalInit);
    45 VMMR0DECL(int)  SVMR0EnableCpu(PHMGLOBLCPUINFO pCpu, PVM pVM, void *pvPageCpu, RTHCPHYS HCPhysCpuPage, bool fEnabledBySystem);
    46 VMMR0DECL(int)  SVMR0DisableCpu(PHMGLOBLCPUINFO pCpu, void *pvPageCpu, RTHCPHYS pPageCpuPhys);
     45VMMR0DECL(int)  SVMR0EnableCpu(PHMGLOBALCPUINFO pCpu, PVM pVM, void *pvPageCpu, RTHCPHYS HCPhysCpuPage, bool fEnabledBySystem);
     46VMMR0DECL(int)  SVMR0DisableCpu(PHMGLOBALCPUINFO pCpu, void *pvPageCpu, RTHCPHYS pPageCpuPhys);
    4747VMMR0DECL(int)  SVMR0InitVM(PVM pVM);
    4848VMMR0DECL(int)  SVMR0TermVM(PVM pVM);
  • trunk/src/VBox/VMM/VMMR0/HMVMXR0.cpp

    r47770 r47771  
    988988 *                          enable VT-x on the host.
    989989 */
    990 VMMR0DECL(int) VMXR0EnableCpu(PHMGLOBLCPUINFO pCpu, PVM pVM, void *pvCpuPage, RTHCPHYS HCPhysCpuPage, bool fEnabledByHost)
     990VMMR0DECL(int) VMXR0EnableCpu(PHMGLOBALCPUINFO pCpu, PVM pVM, void *pvCpuPage, RTHCPHYS HCPhysCpuPage, bool fEnabledByHost)
    991991{
    992992    AssertReturn(pCpu, VERR_INVALID_PARAMETER);
     
    10421042 *          similar was used to enable VT-x on the host.
    10431043 */
    1044 VMMR0DECL(int) VMXR0DisableCpu(PHMGLOBLCPUINFO pCpu, void *pvCpuPage, RTHCPHYS HCPhysCpuPage)
     1044VMMR0DECL(int) VMXR0DisableCpu(PHMGLOBALCPUINFO pCpu, void *pvCpuPage, RTHCPHYS HCPhysCpuPage)
    10451045{
    10461046    NOREF(pCpu);
     
    12601260    VMCPU_FF_CLEAR(pVCpu, VMCPU_FF_TLB_SHOOTDOWN);
    12611261
    1262     PHMGLOBLCPUINFO pCpu = HMR0GetCurrentCpu();
     1262    PHMGLOBALCPUINFO pCpu = HMR0GetCurrentCpu();
    12631263    AssertPtr(pCpu);
    12641264
     
    13021302               "fNestedPaging=%RTbool fVpid=%RTbool", pVM->hm.s.fNestedPaging, pVM->hm.s.vmx.fVpid));
    13031303
    1304     PHMGLOBLCPUINFO pCpu = HMR0GetCurrentCpu();
     1304    PHMGLOBALCPUINFO pCpu = HMR0GetCurrentCpu();
    13051305    AssertPtr(pCpu);
    13061306
     
    14111411    AssertMsg(!pVM->hm.s.vmx.fVpid, ("hmR0VmxFlushTaggedTlbEpt cannot be invoked with VPID enabled."));
    14121412
    1413     PHMGLOBLCPUINFO pCpu = HMR0GetCurrentCpu();
     1413    PHMGLOBALCPUINFO pCpu = HMR0GetCurrentCpu();
    14141414    AssertPtr(pCpu);
    14151415
     
    14761476    AssertMsg(!pVM->hm.s.fNestedPaging, ("hmR0VmxFlushTlbVpid cannot be invoked with NestedPaging enabled"));
    14771477
    1478     PHMGLOBLCPUINFO pCpu = HMR0GetCurrentCpu();
     1478    PHMGLOBALCPUINFO pCpu = HMR0GetCurrentCpu();
    14791479
    14801480    /*
     
    43194319{
    43204320    int             rc, rc2;
    4321     PHMGLOBLCPUINFO pCpu;
     4321    PHMGLOBALCPUINFO pCpu;
    43224322    RTHCPHYS        HCPhysCpuPage;
    43234323    RTCCUINTREG     uOldEflags;
     
    44014401{
    44024402    uint32_t        aParam[6];
    4403     PHMGLOBLCPUINFO pCpu          = NULL;
     4403    PHMGLOBALCPUINFO pCpu          = NULL;
    44044404    RTHCPHYS        HCPhysCpuPage = 0;
    44054405    int             rc            = VERR_INTERNAL_ERROR_5;
     
    67696769 * @param   pCpu        Pointer to the CPU info struct.
    67706770 */
    6771 VMMR0DECL(int) VMXR0Enter(PVM pVM, PVMCPU pVCpu, PHMGLOBLCPUINFO pCpu)
     6771VMMR0DECL(int) VMXR0Enter(PVM pVM, PVMCPU pVCpu, PHMGLOBALCPUINFO pCpu)
    67726772{
    67736773    AssertPtr(pVM);
  • trunk/src/VBox/VMM/VMMR0/HMVMXR0.h

    r47760 r47771  
    2929#ifdef IN_RING0
    3030
    31 VMMR0DECL(int)  VMXR0Enter(PVM pVM, PVMCPU pVCpu, PHMGLOBLCPUINFO pCpu);
     31VMMR0DECL(int)  VMXR0Enter(PVM pVM, PVMCPU pVCpu, PHMGLOBALCPUINFO pCpu);
    3232VMMR0DECL(int)  VMXR0Leave(PVM pVM, PVMCPU pVCpu, PCPUMCTX pCtx);
    3333VMMR0DECL(void) VMXR0ThreadCtxCallback(RTTHREADCTXEVENT enmEvent, PVMCPU pVCpu, bool fGlobalInit);
    34 VMMR0DECL(int)  VMXR0EnableCpu(PHMGLOBLCPUINFO pCpu, PVM pVM, void *pvPageCpu, RTHCPHYS pPageCpuPhys, bool fEnabledBySystem);
    35 VMMR0DECL(int)  VMXR0DisableCpu(PHMGLOBLCPUINFO pCpu, void *pvPageCpu, RTHCPHYS pPageCpuPhys);
     34VMMR0DECL(int)  VMXR0EnableCpu(PHMGLOBALCPUINFO pCpu, PVM pVM, void *pvPageCpu, RTHCPHYS pPageCpuPhys, bool fEnabledBySystem);
     35VMMR0DECL(int)  VMXR0DisableCpu(PHMGLOBALCPUINFO pCpu, void *pvPageCpu, RTHCPHYS pPageCpuPhys);
    3636VMMR0DECL(int)  VMXR0GlobalInit(void);
    3737VMMR0DECL(void) VMXR0GlobalTerm(void);
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