Changeset 47771 in vbox for trunk/src/VBox/VMM/VMMR0
- Timestamp:
- Aug 15, 2013 2:35:16 PM (11 years ago)
- Location:
- trunk/src/VBox/VMM/VMMR0
- Files:
-
- 5 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/VMM/VMMR0/HMR0.cpp
r47760 r47771 82 82 { 83 83 /** Per CPU globals. */ 84 HMGLOB LCPUINFO aCpuInfo[RTCPUSET_MAX_CPUS];84 HMGLOBALCPUINFO aCpuInfo[RTCPUSET_MAX_CPUS]; 85 85 86 86 /** @name Ring-0 method table for AMD-V and VT-x specific operations. 87 87 * @{ */ 88 DECLR0CALLBACKMEMBER(int, pfnEnterSession,(PVM pVM, PVMCPU pVCpu, PHMGLOB LCPUINFO pCpu));88 DECLR0CALLBACKMEMBER(int, pfnEnterSession,(PVM pVM, PVMCPU pVCpu, PHMGLOBALCPUINFO pCpu)); 89 89 DECLR0CALLBACKMEMBER(int, pfnLeaveSession,(PVM pVM, PVMCPU pVCpu, PCPUMCTX pCtx)); 90 90 DECLR0CALLBACKMEMBER(void, pfnThreadCtxCallback,(RTTHREADCTXEVENT enmEvent, PVMCPU pVCpu, bool fGlobalInit)); … … 92 92 DECLR0CALLBACKMEMBER(int, pfnLoadGuestState,(PVM pVM, PVMCPU pVCpu, PCPUMCTX pCtx)); 93 93 DECLR0CALLBACKMEMBER(int, pfnRunGuestCode,(PVM pVM, PVMCPU pVCpu, PCPUMCTX pCtx)); 94 DECLR0CALLBACKMEMBER(int, pfnEnableCpu,(PHMGLOB LCPUINFO pCpu, PVM pVM, void *pvCpuPage, RTHCPHYS HCPhysCpuPage,94 DECLR0CALLBACKMEMBER(int, pfnEnableCpu,(PHMGLOBALCPUINFO pCpu, PVM pVM, void *pvCpuPage, RTHCPHYS HCPhysCpuPage, 95 95 bool fEnabledByHost)); 96 DECLR0CALLBACKMEMBER(int, pfnDisableCpu,(PHMGLOB LCPUINFO pCpu, void *pvCpuPage, RTHCPHYS HCPhysCpuPage));96 DECLR0CALLBACKMEMBER(int, pfnDisableCpu,(PHMGLOBALCPUINFO pCpu, void *pvCpuPage, RTHCPHYS HCPhysCpuPage)); 97 97 DECLR0CALLBACKMEMBER(int, pfnInitVM,(PVM pVM)); 98 98 DECLR0CALLBACKMEMBER(int, pfnTermVM,(PVM pVM)); … … 242 242 * @{ */ 243 243 244 static DECLCALLBACK(int) hmR0DummyEnter(PVM pVM, PVMCPU pVCpu, PHMGLOB LCPUINFO pCpu)244 static DECLCALLBACK(int) hmR0DummyEnter(PVM pVM, PVMCPU pVCpu, PHMGLOBALCPUINFO pCpu) 245 245 { 246 246 NOREF(pVM); NOREF(pVCpu); NOREF(pCpu); … … 259 259 } 260 260 261 static DECLCALLBACK(int) hmR0DummyEnableCpu(PHMGLOB LCPUINFO pCpu, PVM pVM, void *pvCpuPage, RTHCPHYS HCPhysCpuPage,261 static DECLCALLBACK(int) hmR0DummyEnableCpu(PHMGLOBALCPUINFO pCpu, PVM pVM, void *pvCpuPage, RTHCPHYS HCPhysCpuPage, 262 262 bool fEnabledBySystem) 263 263 { … … 266 266 } 267 267 268 static DECLCALLBACK(int) hmR0DummyDisableCpu(PHMGLOB LCPUINFO pCpu, void *pvCpuPage, RTHCPHYS HCPhysCpuPage)268 static DECLCALLBACK(int) hmR0DummyDisableCpu(PHMGLOBALCPUINFO pCpu, void *pvCpuPage, RTHCPHYS HCPhysCpuPage) 269 269 { 270 270 NOREF(pCpu); NOREF(pvCpuPage); NOREF(HCPhysCpuPage); … … 916 916 static int hmR0EnableCpu(PVM pVM, RTCPUID idCpu) 917 917 { 918 PHMGLOB LCPUINFO pCpu = &g_HvmR0.aCpuInfo[idCpu];918 PHMGLOBALCPUINFO pCpu = &g_HvmR0.aCpuInfo[idCpu]; 919 919 920 920 Assert(idCpu == (RTCPUID)RTMpCpuIdToSetIndex(idCpu)); /// @todo fix idCpu == index assumption (rainy day) … … 1070 1070 static int hmR0DisableCpu(RTCPUID idCpu) 1071 1071 { 1072 PHMGLOB LCPUINFO pCpu = &g_HvmR0.aCpuInfo[idCpu];1072 PHMGLOBALCPUINFO pCpu = &g_HvmR0.aCpuInfo[idCpu]; 1073 1073 1074 1074 Assert(!g_HvmR0.vmx.fSupported || !g_HvmR0.vmx.fUsingSUPR0EnableVTx); … … 1304 1304 * Call the hardware specific initialization method. 1305 1305 */ 1306 RTCCUINTREG fFlags = ASMIntDisableFlags();1307 PHMGLOB LCPUINFO pCpu = HMR0GetCurrentCpu();1306 RTCCUINTREG fFlags = ASMIntDisableFlags(); 1307 PHMGLOBALCPUINFO pCpu = HMR0GetCurrentCpu(); 1308 1308 ASMSetFlags(fFlags); 1309 1309 … … 1334 1334 * Call the hardware specific method. 1335 1335 */ 1336 RTCCUINTREG fFlags = ASMIntDisableFlags();1337 PHMGLOB LCPUINFO pCpu = HMR0GetCurrentCpu();1336 RTCCUINTREG fFlags = ASMIntDisableFlags(); 1337 PHMGLOBALCPUINFO pCpu = HMR0GetCurrentCpu(); 1338 1338 ASMSetFlags(fFlags); 1339 1339 … … 1364 1364 * enabled for AMD-V/VT-x and preemption to be prevented. 1365 1365 */ 1366 RTCCUINTREG fFlags = ASMIntDisableFlags();1367 RTCPUID idCpu = RTMpCpuId();1368 PHMGLOB LCPUINFO pCpu = &g_HvmR0.aCpuInfo[idCpu];1366 RTCCUINTREG fFlags = ASMIntDisableFlags(); 1367 RTCPUID idCpu = RTMpCpuId(); 1368 PHMGLOBALCPUINFO pCpu = &g_HvmR0.aCpuInfo[idCpu]; 1369 1369 1370 1370 /* On first entry we'll sync everything. */ … … 1405 1405 1406 1406 RTCPUID idCpu = RTMpCpuId(); 1407 PHMGLOB LCPUINFOpCpu = &g_HvmR0.aCpuInfo[idCpu];1407 PHMGLOBALCPUINFO pCpu = &g_HvmR0.aCpuInfo[idCpu]; 1408 1408 AssertPtr(pCpu); 1409 1409 … … 1446 1446 #endif 1447 1447 1448 RTCPUID idCpu = RTMpCpuId();1449 PHMGLOB LCPUINFO pCpu = &g_HvmR0.aCpuInfo[idCpu];1450 PCPUMCTX pCtx = CPUMQueryGuestCtxPtr(pVCpu);1448 RTCPUID idCpu = RTMpCpuId(); 1449 PHMGLOBALCPUINFO pCpu = &g_HvmR0.aCpuInfo[idCpu]; 1450 PCPUMCTX pCtx = CPUMQueryGuestCtxPtr(pVCpu); 1451 1451 Assert(pCpu); 1452 1452 Assert(pCtx); … … 1581 1581 { 1582 1582 #ifdef VBOX_STRICT 1583 PHMGLOB LCPUINFO pCpu = &g_HvmR0.aCpuInfo[RTMpCpuId()];1583 PHMGLOBALCPUINFO pCpu = &g_HvmR0.aCpuInfo[RTMpCpuId()]; 1584 1584 Assert(!VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_PGM_SYNC_CR3 | VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL)); 1585 1585 Assert(pCpu->fConfigured); … … 1678 1678 * @returns The cpu structure pointer. 1679 1679 */ 1680 VMMR0DECL(PHMGLOB LCPUINFO) HMR0GetCurrentCpu(void)1680 VMMR0DECL(PHMGLOBALCPUINFO) HMR0GetCurrentCpu(void) 1681 1681 { 1682 1682 RTCPUID idCpu = RTMpCpuId(); … … 1693 1693 * @param idCpu id of the VCPU. 1694 1694 */ 1695 VMMR0DECL(PHMGLOB LCPUINFO) HMR0GetCurrentCpuEx(RTCPUID idCpu)1695 VMMR0DECL(PHMGLOBALCPUINFO) HMR0GetCurrentCpuEx(RTCPUID idCpu) 1696 1696 { 1697 1697 Assert(idCpu < RT_ELEMENTS(g_HvmR0.aCpuInfo)); … … 1801 1801 1802 1802 /* Ok, disable VT-x. */ 1803 PHMGLOB LCPUINFO pCpu = HMR0GetCurrentCpu();1803 PHMGLOBALCPUINFO pCpu = HMR0GetCurrentCpu(); 1804 1804 AssertReturn(pCpu && pCpu->hMemObj != NIL_RTR0MEMOBJ, VERR_HM_IPE_2); 1805 1805 … … 1833 1833 Assert(g_HvmR0.fGlobalInit); 1834 1834 1835 PHMGLOB LCPUINFO pCpu = HMR0GetCurrentCpu();1835 PHMGLOBALCPUINFO pCpu = HMR0GetCurrentCpu(); 1836 1836 AssertReturnVoid(pCpu && pCpu->hMemObj != NIL_RTR0MEMOBJ); 1837 1837 -
trunk/src/VBox/VMM/VMMR0/HMSVMR0.cpp
r47766 r47771 292 292 * @param HCPhysCpuPage Physical address of the global CPU page. 293 293 */ 294 VMMR0DECL(int) SVMR0EnableCpu(PHMGLOB LCPUINFO pCpu, PVM pVM, void *pvCpuPage, RTHCPHYS HCPhysCpuPage, bool fEnabledByHost)294 VMMR0DECL(int) SVMR0EnableCpu(PHMGLOBALCPUINFO pCpu, PVM pVM, void *pvCpuPage, RTHCPHYS HCPhysCpuPage, bool fEnabledByHost) 295 295 { 296 296 AssertReturn(!fEnabledByHost, VERR_INVALID_PARAMETER); … … 347 347 * @param HCPhysCpuPage Physical address of the global CPU page. 348 348 */ 349 VMMR0DECL(int) SVMR0DisableCpu(PHMGLOB LCPUINFO pCpu, void *pvCpuPage, RTHCPHYS HCPhysCpuPage)349 VMMR0DECL(int) SVMR0DisableCpu(PHMGLOBALCPUINFO pCpu, void *pvCpuPage, RTHCPHYS HCPhysCpuPage) 350 350 { 351 351 AssertReturn( HCPhysCpuPage … … 793 793 PVM pVM = pVCpu->CTX_SUFF(pVM); 794 794 PSVMVMCB pVmcb = (PSVMVMCB)pVCpu->hm.s.svm.pvVmcb; 795 PHMGLOB LCPUINFO pCpu = HMR0GetCurrentCpu();795 PHMGLOBALCPUINFO pCpu = HMR0GetCurrentCpu(); 796 796 797 797 /* … … 1546 1546 * @param pCpu Pointer to the CPU info struct. 1547 1547 */ 1548 VMMR0DECL(int) SVMR0Enter(PVM pVM, PVMCPU pVCpu, PHMGLOB LCPUINFO pCpu)1548 VMMR0DECL(int) SVMR0Enter(PVM pVM, PVMCPU pVCpu, PHMGLOBALCPUINFO pCpu) 1549 1549 { 1550 1550 AssertPtr(pVM); -
trunk/src/VBox/VMM/VMMR0/HMSVMR0.h
r47760 r47771 40 40 VMMR0DECL(int) SVMR0GlobalInit(void); 41 41 VMMR0DECL(void) SVMR0GlobalTerm(void); 42 VMMR0DECL(int) SVMR0Enter(PVM pVM, PVMCPU pVCpu, PHMGLOB LCPUINFO pCpu);42 VMMR0DECL(int) SVMR0Enter(PVM pVM, PVMCPU pVCpu, PHMGLOBALCPUINFO pCpu); 43 43 VMMR0DECL(int) SVMR0Leave(PVM pVM, PVMCPU pVCpu, PCPUMCTX pCtx); 44 44 VMMR0DECL(void) SVMR0ThreadCtxCallback(RTTHREADCTXEVENT enmEvent, PVMCPU pVCpu, bool fGlobalInit); 45 VMMR0DECL(int) SVMR0EnableCpu(PHMGLOB LCPUINFO pCpu, PVM pVM, void *pvPageCpu, RTHCPHYS HCPhysCpuPage, bool fEnabledBySystem);46 VMMR0DECL(int) SVMR0DisableCpu(PHMGLOB LCPUINFO pCpu, void *pvPageCpu, RTHCPHYS pPageCpuPhys);45 VMMR0DECL(int) SVMR0EnableCpu(PHMGLOBALCPUINFO pCpu, PVM pVM, void *pvPageCpu, RTHCPHYS HCPhysCpuPage, bool fEnabledBySystem); 46 VMMR0DECL(int) SVMR0DisableCpu(PHMGLOBALCPUINFO pCpu, void *pvPageCpu, RTHCPHYS pPageCpuPhys); 47 47 VMMR0DECL(int) SVMR0InitVM(PVM pVM); 48 48 VMMR0DECL(int) SVMR0TermVM(PVM pVM); -
trunk/src/VBox/VMM/VMMR0/HMVMXR0.cpp
r47770 r47771 988 988 * enable VT-x on the host. 989 989 */ 990 VMMR0DECL(int) VMXR0EnableCpu(PHMGLOB LCPUINFO pCpu, PVM pVM, void *pvCpuPage, RTHCPHYS HCPhysCpuPage, bool fEnabledByHost)990 VMMR0DECL(int) VMXR0EnableCpu(PHMGLOBALCPUINFO pCpu, PVM pVM, void *pvCpuPage, RTHCPHYS HCPhysCpuPage, bool fEnabledByHost) 991 991 { 992 992 AssertReturn(pCpu, VERR_INVALID_PARAMETER); … … 1042 1042 * similar was used to enable VT-x on the host. 1043 1043 */ 1044 VMMR0DECL(int) VMXR0DisableCpu(PHMGLOB LCPUINFO pCpu, void *pvCpuPage, RTHCPHYS HCPhysCpuPage)1044 VMMR0DECL(int) VMXR0DisableCpu(PHMGLOBALCPUINFO pCpu, void *pvCpuPage, RTHCPHYS HCPhysCpuPage) 1045 1045 { 1046 1046 NOREF(pCpu); … … 1260 1260 VMCPU_FF_CLEAR(pVCpu, VMCPU_FF_TLB_SHOOTDOWN); 1261 1261 1262 PHMGLOB LCPUINFO pCpu = HMR0GetCurrentCpu();1262 PHMGLOBALCPUINFO pCpu = HMR0GetCurrentCpu(); 1263 1263 AssertPtr(pCpu); 1264 1264 … … 1302 1302 "fNestedPaging=%RTbool fVpid=%RTbool", pVM->hm.s.fNestedPaging, pVM->hm.s.vmx.fVpid)); 1303 1303 1304 PHMGLOB LCPUINFO pCpu = HMR0GetCurrentCpu();1304 PHMGLOBALCPUINFO pCpu = HMR0GetCurrentCpu(); 1305 1305 AssertPtr(pCpu); 1306 1306 … … 1411 1411 AssertMsg(!pVM->hm.s.vmx.fVpid, ("hmR0VmxFlushTaggedTlbEpt cannot be invoked with VPID enabled.")); 1412 1412 1413 PHMGLOB LCPUINFO pCpu = HMR0GetCurrentCpu();1413 PHMGLOBALCPUINFO pCpu = HMR0GetCurrentCpu(); 1414 1414 AssertPtr(pCpu); 1415 1415 … … 1476 1476 AssertMsg(!pVM->hm.s.fNestedPaging, ("hmR0VmxFlushTlbVpid cannot be invoked with NestedPaging enabled")); 1477 1477 1478 PHMGLOB LCPUINFO pCpu = HMR0GetCurrentCpu();1478 PHMGLOBALCPUINFO pCpu = HMR0GetCurrentCpu(); 1479 1479 1480 1480 /* … … 4319 4319 { 4320 4320 int rc, rc2; 4321 PHMGLOB LCPUINFO pCpu;4321 PHMGLOBALCPUINFO pCpu; 4322 4322 RTHCPHYS HCPhysCpuPage; 4323 4323 RTCCUINTREG uOldEflags; … … 4401 4401 { 4402 4402 uint32_t aParam[6]; 4403 PHMGLOB LCPUINFO pCpu = NULL;4403 PHMGLOBALCPUINFO pCpu = NULL; 4404 4404 RTHCPHYS HCPhysCpuPage = 0; 4405 4405 int rc = VERR_INTERNAL_ERROR_5; … … 6769 6769 * @param pCpu Pointer to the CPU info struct. 6770 6770 */ 6771 VMMR0DECL(int) VMXR0Enter(PVM pVM, PVMCPU pVCpu, PHMGLOB LCPUINFO pCpu)6771 VMMR0DECL(int) VMXR0Enter(PVM pVM, PVMCPU pVCpu, PHMGLOBALCPUINFO pCpu) 6772 6772 { 6773 6773 AssertPtr(pVM); -
trunk/src/VBox/VMM/VMMR0/HMVMXR0.h
r47760 r47771 29 29 #ifdef IN_RING0 30 30 31 VMMR0DECL(int) VMXR0Enter(PVM pVM, PVMCPU pVCpu, PHMGLOB LCPUINFO pCpu);31 VMMR0DECL(int) VMXR0Enter(PVM pVM, PVMCPU pVCpu, PHMGLOBALCPUINFO pCpu); 32 32 VMMR0DECL(int) VMXR0Leave(PVM pVM, PVMCPU pVCpu, PCPUMCTX pCtx); 33 33 VMMR0DECL(void) VMXR0ThreadCtxCallback(RTTHREADCTXEVENT enmEvent, PVMCPU pVCpu, bool fGlobalInit); 34 VMMR0DECL(int) VMXR0EnableCpu(PHMGLOB LCPUINFO pCpu, PVM pVM, void *pvPageCpu, RTHCPHYS pPageCpuPhys, bool fEnabledBySystem);35 VMMR0DECL(int) VMXR0DisableCpu(PHMGLOB LCPUINFO pCpu, void *pvPageCpu, RTHCPHYS pPageCpuPhys);34 VMMR0DECL(int) VMXR0EnableCpu(PHMGLOBALCPUINFO pCpu, PVM pVM, void *pvPageCpu, RTHCPHYS pPageCpuPhys, bool fEnabledBySystem); 35 VMMR0DECL(int) VMXR0DisableCpu(PHMGLOBALCPUINFO pCpu, void *pvPageCpu, RTHCPHYS pPageCpuPhys); 36 36 VMMR0DECL(int) VMXR0GlobalInit(void); 37 37 VMMR0DECL(void) VMXR0GlobalTerm(void);
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