Changeset 47820 in vbox for trunk/src/VBox/VMM

Timestamp:

Aug 16, 2013 7:47:36 PM (12 years ago)

Author:

vboxsync

svn:sync-xref-src-repo-rev:

88081

Message:

EMRaw.cpp: Disabled code for using IEM for singled instruction emulation like in EMHM.cpp.

File:

• trunk/src/VBox/VMM/VMMR3/EMRaw.cpp (modified) (10 diffs)

trunk/src/VBox/VMM/VMMR3/EMRaw.cpp

@@ -274 +274 @@
     int      rc;
 
-    /*
-     *
-     * The simple solution is to use the recompiler.
-     * The better solution is to disassemble the current instruction and
-     * try handle as many as possible without using REM.
-     *
-     */
-
 #ifdef LOG_ENABLED
     /*
@@ -303 +295 @@
         Log(("emR3RawExecuteInstruction: In patch block. eip=%RRv\n", (RTRCPTR)pCtx->eip));
 
-        RTGCPTR pNewEip;
-        rc = PATMR3HandleTrap(pVM, pCtx, pCtx->eip, &pNewEip);
+        RTGCPTR uNewEip;
+        rc = PATMR3HandleTrap(pVM, pCtx, pCtx->eip, &uNewEip);
         switch (rc)
         {
@@ -313 +305 @@
             case VINF_SUCCESS:
                 Log(("emR3RawExecuteInstruction: Executing instruction starting at new address %RGv IF=%d VMIF=%x\n",
-                     pNewEip, pCtx->eflags.Bits.u1IF, pVCpu->em.s.pPatmGCState->uVMFlags));
-                pCtx->eip = pNewEip;
+                     uNewEip, pCtx->eflags.Bits.u1IF, pVCpu->em.s.pPatmGCState->uVMFlags));
+                pCtx->eip = uNewEip;
                 Assert(pCtx->eip);
 
@@ -337 +329 @@
             case VINF_PATCH_EMULATE_INSTR:
                 Log(("emR3RawExecuteInstruction: Emulate patched instruction at %RGv IF=%d VMIF=%x\n",
-                     pNewEip, pCtx->eflags.Bits.u1IF, pVCpu->em.s.pPatmGCState->uVMFlags));
-                pCtx->eip = pNewEip;
+                     uNewEip, pCtx->eflags.Bits.u1IF, pVCpu->em.s.pPatmGCState->uVMFlags));
+                pCtx->eip = uNewEip;
                 return emR3RawExecuteInstruction(pVM, pVCpu, "PATCHIR");
 
@@ -346 +338 @@
             case VERR_PATCH_DISABLED:
                 Log(("emR3RawExecuteInstruction: Disabled patch -> new eip %RGv IF=%d VMIF=%x\n",
-                     pNewEip, pCtx->eflags.Bits.u1IF, pVCpu->em.s.pPatmGCState->uVMFlags));
-                pCtx->eip = pNewEip;
+                     uNewEip, pCtx->eflags.Bits.u1IF, pVCpu->em.s.pPatmGCState->uVMFlags));
+                pCtx->eip = uNewEip;
                 if (pCtx->eflags.Bits.u1IF)
                 {
@@ -368 +360 @@
     }
 
-    STAM_PROFILE_START(&pVCpu->em.s.StatREMEmu, a);
+
+    /*
+     * Use IEM and fallback on REM if the functionality is missing.
+     * Once IEM gets mature enough, nothing should ever fall back.
+     */
+#if 0/*defined(VBOX_WITH_FIRST_IEM_STEP)*/ || !defined(VBOX_WITH_REM)
     Log(("EMINS: %04x:%RGv RSP=%RGv\n", pCtx->cs.Sel, (RTGCPTR)pCtx->rip, (RTGCPTR)pCtx->rsp));
+    STAM_PROFILE_START(&pVCpu->em.s.StatIEMEmu, a);
+    rc = VBOXSTRICTRC_TODO(IEMExecOne(pVCpu));
+    STAM_PROFILE_STOP(&pVCpu->em.s.StatIEMEmu, a);
+    if (rc == VINF_SUCCESS)
+        rc = VINF_EM_RESCHEDULE;
+    else if (   rc == VERR_IEM_ASPECT_NOT_IMPLEMENTED
+             || rc == VERR_IEM_INSTR_NOT_IMPLEMENTED)
+#endif
+    {
 #ifdef VBOX_WITH_REM
-    EMRemLock(pVM);
-    /* Flush the recompiler TLB if the VCPU has changed. */
-    if (pVM->em.s.idLastRemCpu != pVCpu->idCpu)
-        CPUMSetChangedFlags(pVCpu, CPUM_CHANGED_ALL);
-    pVM->em.s.idLastRemCpu = pVCpu->idCpu;
-
-    rc = REMR3EmulateInstruction(pVM, pVCpu);
-    EMRemUnlock(pVM);
-#else
-    rc = VBOXSTRICTRC_TODO(IEMExecOne(pVCpu));
-#endif
-    STAM_PROFILE_STOP(&pVCpu->em.s.StatREMEmu, a);
-
+        STAM_PROFILE_START(&pVCpu->em.s.StatREMEmu, b);
+# if 1 //ndef VBOX_WITH_FIRST_IEM_STEP
+        Log(("EMINS[rem]: %04x:%RGv RSP=%RGv\n", pCtx->cs.Sel, (RTGCPTR)pCtx->rip, (RTGCPTR)pCtx->rsp));
+//# elif defined(DEBUG_bird)
+//        AssertFailed();
+# endif
+        EMRemLock(pVM);
+        /* Flush the recompiler TLB if the VCPU has changed. */
+        if (pVM->em.s.idLastRemCpu != pVCpu->idCpu)
+            CPUMSetChangedFlags(pVCpu, CPUM_CHANGED_ALL);
+        pVM->em.s.idLastRemCpu = pVCpu->idCpu;
+
+        rc = REMR3EmulateInstruction(pVM, pVCpu);
+        EMRemUnlock(pVM);
+        STAM_PROFILE_STOP(&pVCpu->em.s.StatREMEmu, b);
+#else  /* !VBOX_WITH_REM */
+        NOREF(pVM);
+#endif /* !VBOX_WITH_REM */
+    }
     return rc;
 }
@@ -833 +845 @@
              pCtx->eip, u8TrapNo, uErrorCode, uCR2, (uint32_t)pCtx->cr0));
 
-        RTGCPTR pNewEip;
-        rc = PATMR3HandleTrap(pVM, pCtx, pCtx->eip, &pNewEip);
+        RTGCPTR uNewEip;
+        rc = PATMR3HandleTrap(pVM, pCtx, pCtx->eip, &uNewEip);
         switch (rc)
         {
@@ -843 +855 @@
             {
                 /** @todo execute a whole block */
-                Log(("emR3RawPatchTrap: Executing faulting instruction at new address %RGv\n", pNewEip));
+                Log(("emR3RawPatchTrap: Executing faulting instruction at new address %RGv\n", uNewEip));
                 if (!(pVCpu->em.s.pPatmGCState->uVMFlags & X86_EFL_IF))
                     Log(("emR3RawPatchTrap: Virtual IF flag disabled!!\n"));
 
-                pCtx->eip = pNewEip;
+                pCtx->eip = uNewEip;
                 AssertRelease(pCtx->eip);
 
@@ -878 +890 @@
             case VINF_PATCH_EMULATE_INSTR:
                 Log(("emR3RawPatchTrap: Emulate patched instruction at %RGv IF=%d VMIF=%x\n",
-                     pNewEip, pCtx->eflags.Bits.u1IF, pVCpu->em.s.pPatmGCState->uVMFlags));
-                pCtx->eip = pNewEip;
+                     uNewEip, pCtx->eflags.Bits.u1IF, pVCpu->em.s.pPatmGCState->uVMFlags));
+                pCtx->eip = uNewEip;
                 AssertRelease(pCtx->eip);
                 return emR3RawExecuteInstruction(pVM, pVCpu, "PATCHEMUL: ");
@@ -889 +901 @@
                 if (!(pVCpu->em.s.pPatmGCState->uVMFlags & X86_EFL_IF))
                     Log(("emR3RawPatchTrap: Virtual IF flag disabled!!\n"));
-                pCtx->eip = pNewEip;
+                pCtx->eip = uNewEip;
                 AssertRelease(pCtx->eip);