Changeset 4787 in vbox for trunk/src/VBox
- Timestamp:
- Sep 14, 2007 9:08:56 AM (17 years ago)
- Location:
- trunk/src/VBox
- Files:
-
- 35 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/Devices/Bus/DevPCI.cpp
r4193 r4787 141 141 uint32_t uConfigReg; 142 142 /** Array of PCI devices. */ 143 HCPTRTYPE(PPCIDEVICE) devices[256];143 R3PTRTYPE(PPCIDEVICE) devices[256]; 144 144 145 145 /** HC pointer to the device instance. */ 146 PPDMDEVINSHCpDevInsHC;146 R3R0PTRTYPE(PPDMDEVINS) pDevInsHC; 147 147 /** Pointer to the PCI R3 helpers. */ 148 PCPDMPCIHLPR3 pPciHlpR3;148 PCPDMPCIHLPR3 pPciHlpR3; 149 149 150 150 /** GC pointer to the device instance. */ … … 1400 1400 } 1401 1401 1402 1403 1402 /** 1404 1403 * @copydoc FNPDMDEVRELOCATE -
trunk/src/VBox/Devices/Bus/PCIInternal.h
r4071 r4787 31 31 uint8_t padding[HC_ARCH_BITS == 32 ? 3 : 7]; 32 32 /** Callback called when the region is mapped. */ 33 HCPTRTYPE(PFNPCIIOREGIONMAP) map_func;33 R3PTRTYPE(PFNPCIIOREGIONMAP) map_func; 34 34 } PCIIOREGION, PCIIORegion; 35 35 /** Pointer to PCI I/O region. */ -
trunk/src/VBox/Devices/Graphics/DevVGA.h
r4071 r4787 181 181 some type changes, and some padding have been added. */ 182 182 #define VGA_STATE_COMMON \ 183 HCPTRTYPE(uint8_t *) vram_ptrHC;\183 R3R0PTRTYPE(uint8_t *) vram_ptrHC; \ 184 184 uint32_t vram_size; \ 185 185 uint32_t latch; \ … … 260 260 uint32_t au32DirtyBitmap[VGA_VRAM_MAX / PAGE_SIZE / 32]; 261 261 /** Pointer to the device instance - HC Ptr. */ 262 PPDMDEVINSHCpDevInsHC;262 R3R0PTRTYPE(PPDMDEVINS) pDevInsHC; 263 263 /* * Pointer to the device instance - GC Ptr. */ 264 264 /*GCPTRTYPE(PPDMDEVINS) pDevInsGC;*/ … … 273 273 R3PTRTYPE(PPDMIDISPLAYCONNECTOR) pDrv; 274 274 /** Refresh timer handle - HC. */ 275 PTMTIMER HCRefreshTimer;275 PTMTIMERR3 RefreshTimer; 276 276 /** Current refresh timer interval. */ 277 277 uint32_t cMilliesRefreshInterval; -
trunk/src/VBox/Devices/Input/DevPS2.cpp
r4071 r4787 224 224 PPDMDEVINSGC pDevInsGC; 225 225 /** Pointer to the device instance. */ 226 PPDMDEVINSHCpDevInsHC;226 R3R0PTRTYPE(PPDMDEVINS) pDevInsHC; 227 227 /** 228 228 * Keyboard port - LUN#0. … … 236 236 237 237 /** The base interface of the attached keyboard driver. */ 238 HCPTRTYPE(PPDMIBASE) pDrvBase;238 R3PTRTYPE(PPDMIBASE) pDrvBase; 239 239 /** The keyboard interface of the attached keyboard driver. */ 240 HCPTRTYPE(PPDMIKEYBOARDCONNECTOR) pDrv;240 R3PTRTYPE(PPDMIKEYBOARDCONNECTOR) pDrv; 241 241 } Keyboard; 242 242 … … 252 252 253 253 /** The base interface of the attached mouse driver. */ 254 HCPTRTYPE(PPDMIBASE) pDrvBase;254 R3PTRTYPE(PPDMIBASE) pDrvBase; 255 255 /** The mouse interface of the attached mouse driver. */ 256 HCPTRTYPE(PPDMIMOUSECONNECTOR) pDrv;256 R3PTRTYPE(PPDMIMOUSECONNECTOR) pDrv; 257 257 } Mouse; 258 258 #endif -
trunk/src/VBox/Devices/Network/DevPCNet.cpp
r4624 r4787 127 127 #ifndef PCNET_NO_POLLING 128 128 /** Poll timer (address for host context) */ 129 PTMTIMERHCpTimerPollHC;129 R3R0PTRTYPE(PTMTIMER) pTimerPollHC; 130 130 /** Poll timer (address for guest context) */ 131 PTMTIMERGCpTimerPollGC;131 GCPTRTYPE(PTMTIMER) pTimerPollGC; 132 132 #endif 133 133 /** Register Address Pointer */ … … 167 167 /** Transmit signaller */ 168 168 GCPTRTYPE(PPDMQUEUE) pXmitQueueGC; 169 HCPTRTYPE(PPDMQUEUE)pXmitQueueHC;169 R3R0PTRTYPE(PPDMQUEUE) pXmitQueueHC; 170 170 171 171 /** Receive signaller */ 172 HCPTRTYPE(PPDMQUEUE)pCanRxQueueHC;172 R3R0PTRTYPE(PPDMQUEUE) pCanRxQueueHC; 173 173 GCPTRTYPE(PPDMQUEUE) pCanRxQueueGC; 174 174 /** Pointer to the device instance. */ 175 175 GCPTRTYPE(PPDMDEVINS) pDevInsGC; 176 176 /** Pointer to the device instance. */ 177 HCPTRTYPE(PPDMDEVINS)pDevInsHC;177 R3R0PTRTYPE(PPDMDEVINS) pDevInsHC; 178 178 /** Restore timer. 179 179 * This is used to disconnect and reconnect the link after a restore. */ 180 PTMTIMER HCpTimerRestore;180 PTMTIMERR3 pTimerRestore; 181 181 /** Pointer to the connector of the attached network driver. */ 182 HCPTRTYPE(PPDMINETWORKCONNECTOR) pDrv;182 R3PTRTYPE(PPDMINETWORKCONNECTOR) pDrv; 183 183 /** Pointer to the attached network driver. */ 184 HCPTRTYPE(PPDMIBASE) pDrvBase;184 R3PTRTYPE(PPDMIBASE) pDrvBase; 185 185 /** The base interface. */ 186 186 PDMIBASE IBase; … … 213 213 PDMILEDPORTS ILeds; 214 214 /** Partner of ILeds. */ 215 HCPTRTYPE(PPDMILEDCONNECTORS) pLedsConnector;215 R3PTRTYPE(PPDMILEDCONNECTORS) pLedsConnector; 216 216 217 217 /** Async send thread */ -
trunk/src/VBox/Devices/PC/DevACPI.cpp
r4382 r4787 157 157 uint16_t Alignment0; 158 158 int64_t pm_timer_initial; 159 PTMTIMERHCtsHC;160 PTMTIMERGCtsGC;159 R3R0PTRTYPE(PTMTIMER) tsHC; 160 GCPTRTYPE(PTMTIMER) tsGC; 161 161 162 162 uint32_t gpe0_en; -
trunk/src/VBox/Devices/PC/DevAPIC.cpp
r4071 r4787 187 187 #else /* VBOX */ 188 188 /** HC pointer to the device instance. */ 189 PPDMDEVINSHCpDevInsHC;189 R3R0PTRTYPE(PPDMDEVINS) pDevInsHC; 190 190 /** Pointer to the APIC HC helpers. */ 191 PCPDMAPICHLPR3 pApicHlpR3;191 PCPDMAPICHLPR3 pApicHlpR3; 192 192 /** The APIC timer - HC Ptr. */ 193 PTMTIMERHCpTimerHC;193 R3R0PTRTYPE(PTMTIMER) pTimerHC; 194 194 /** Pointer to the APIC R0 helpers. */ 195 PCPDMAPICHLPR0 pApicHlpR0;195 PCPDMAPICHLPR0 pApicHlpR0; 196 196 197 197 /** GC pointer to the device instance. */ … … 224 224 #ifdef VBOX 225 225 /** HC pointer to the device instance. */ 226 PPDMDEVINSHCpDevInsHC;226 R3R0PTRTYPE(PPDMDEVINS) pDevInsHC; 227 227 /** Pointer to the IOAPIC R3 helpers. */ 228 PCPDMIOAPICHLPR3 pIoApicHlpR3;228 PCPDMIOAPICHLPR3 pIoApicHlpR3; 229 229 230 230 /** GC pointer to the device instance. */ 231 PPDMDEVINSGC pDevInsGC;231 PPDMDEVINSGC pDevInsGC; 232 232 /** Pointer to the IOAPIC GC helpers. */ 233 PCPDMIOAPICHLPGC pIoApicHlpGC;233 PCPDMIOAPICHLPGC pIoApicHlpGC; 234 234 235 235 /** Pointer to the IOAPIC R0 helpers. */ 236 PCPDMIOAPICHLPR0 pIoApicHlpR0;236 PCPDMIOAPICHLPR0 pIoApicHlpR0; 237 237 # if HC_ARCH_BITS == 32 238 uint32_t Alignment0;238 uint32_t Alignment0; 239 239 # endif 240 240 # ifdef VBOX_WITH_STATISTICS … … 1435 1435 IOAPICState *s = (IOAPICState*)opaque; 1436 1436 #ifdef VBOX 1437 PPDMDEVINS HCpDevIns = s->pDevInsHC;1437 PPDMDEVINSR3 pDevIns = s->pDevInsHC; 1438 1438 PCPDMIOAPICHLPR3 pIoApicHlp = s->pIoApicHlpR3; 1439 1439 #endif -
trunk/src/VBox/Devices/PC/DevPIC.cpp
r4071 r4787 113 113 uint8_t elcr_mask; 114 114 /** Pointer to the device instance, HCPtr. */ 115 HCPTRTYPE(PPDMDEVINS) pDevInsHC;115 R3R0PTRTYPE(PPDMDEVINS) pDevInsHC; 116 116 /** Pointer to the device instance, GCPtr. */ 117 GCPTRTYPE(PPDMDEVINS) pDevInsGC;117 GCPTRTYPE(PPDMDEVINS) pDevInsGC; 118 118 #if HC_ARCH_BITS == 64 && GC_ARCH_BITS != 64 119 RTGCPTR Alignment0;119 RTGCPTR Alignment0; 120 120 #endif 121 121 } PicState; … … 137 137 GCPTRTYPE(PPDMDEVINS) pDevInsGC; 138 138 /** Pointer to the device instance - GC Ptr. */ 139 HCPTRTYPE(PPDMDEVINS)pDevInsHC;139 R3R0PTRTYPE(PPDMDEVINS) pDevInsHC; 140 140 #if HC_ARCH_BITS == 32 141 141 uint32_t Alignmnet0; … … 438 438 static void pic_reset(PicState *s) 439 439 { 440 HCPTRTYPE(PPDMDEVINS) pDevInsHC = s->pDevInsHC;440 R3R0PTRTYPE(PPDMDEVINS) pDevInsHC = s->pDevInsHC; 441 441 GCPTRTYPE(PPDMDEVINS) pDevInsGC = s->pDevInsGC; 442 442 int tmp, tmp2; -
trunk/src/VBox/Devices/PC/DevPit-i8254.cpp
r4431 r4787 79 79 { 80 80 /** Pointer to the instance data - HCPtr. */ 81 HCPTRTYPE(struct PITState *)pPitHC;81 R3R0PTRTYPE(struct PITState *) pPitHC; 82 82 /** The timer - HCPtr. */ 83 PTMTIMERHCpTimerHC;83 R3R0PTRTYPE(PTMTIMER) pTimerHC; 84 84 /** Pointer to the instance data - GCPtr. */ 85 GCPTRTYPE(struct PITState *) pPitGC;85 GCPTRTYPE(struct PITState *) pPitGC; 86 86 /** The timer - HCPtr. */ 87 PTMTIMERGC pTimerGC;87 PTMTIMERGC pTimerGC; 88 88 /** The virtual time stamp at the last reload. (only used in mode 2 for now) */ 89 uint64_t u64ReloadTS;89 uint64_t u64ReloadTS; 90 90 /** The actual time of the next tick. 91 91 * As apposed to the next_transition_time which contains the correct time of the next tick. */ 92 uint64_t u64NextTS;92 uint64_t u64NextTS; 93 93 94 94 /** (count_load_time is only set by TMTimerGet() which returns uint64_t) */ … … 129 129 #endif 130 130 /** Pointer to the device instance. */ 131 HCPTRTYPE(PPDMDEVINS) pDevIns;131 R3PTRTYPE(PPDMDEVINS) pDevIns; 132 132 #if HC_ARCH_BITS == 32 133 133 uint32_t Alignment0; -
trunk/src/VBox/Devices/PC/DevRTC.cpp
r4071 r4787 115 115 int32_t irq; 116 116 /* periodic timer */ 117 PTMTIMERGCpPeriodicTimerGC;118 PTMTIMERHCpPeriodicTimerHC;117 GCPTRTYPE(PTMTIMER) pPeriodicTimerGC; 118 R3R0PTRTYPE(PTMTIMER) pPeriodicTimerHC; 119 119 int64_t next_periodic_time; 120 120 /* second update */ 121 121 int64_t next_second_time; 122 PTMTIMERHCpSecondTimerHC;123 PTMTIMERGCpSecondTimerGC;124 PTMTIMERGCpSecondTimer2GC;125 PTMTIMERHCpSecondTimer2HC;122 R3R0PTRTYPE(PTMTIMER) pSecondTimerHC; 123 GCPTRTYPE(PTMTIMER) pSecondTimerGC; 124 GCPTRTYPE(PTMTIMER) pSecondTimer2GC; 125 R3R0PTRTYPE(PTMTIMER) pSecondTimer2HC; 126 126 /** Pointer to the device instance - HC Ptr. */ 127 PPDMDEVINSHCpDevInsHC;127 R3R0PTRTYPE(PPDMDEVINS) pDevInsHC; 128 128 /** Pointer to the device instance - GC Ptr. */ 129 129 PPDMDEVINSGC pDevInsGC; … … 133 133 PDMRTCREG RtcReg; 134 134 /** The RTC device helpers. */ 135 HCPTRTYPE(PCPDMRTCHLP) pRtcHlpHC;135 R3PTRTYPE(PCPDMRTCHLP) pRtcHlpHC; 136 136 /** Number of release log entries. Used to prevent flooding. */ 137 137 uint32_t cRelLogEntries; -
trunk/src/VBox/Devices/Parallel/DevParallel.cpp
r4088 r4787 61 61 62 62 /** Pointer to the device instance. */ 63 HCPTRTYPE(PPDMDEVINS)pDevInsHC;63 R3R0PTRTYPE(PPDMDEVINS) pDevInsHC; 64 64 /** Pointer to the device instance. */ 65 65 GCPTRTYPE(PPDMDEVINS) pDevInsGC; … … 68 68 #endif 69 69 /** The base interface. */ 70 HCPTRTYPE(PDMIBASE) IBase;70 R3PTRTYPE(PDMIBASE) IBase; 71 71 /** The host device port interface. */ 72 HCPTRTYPE(PDMIHOSTDEVICEPORT) IHostDevicePort;72 R3PTRTYPE(PDMIHOSTDEVICEPORT) IHostDevicePort; 73 73 /** Pointer to the attached base driver. */ 74 HCPTRTYPE(PPDMIBASE) pDrvBase;74 R3PTRTYPE(PPDMIBASE) pDrvBase; 75 75 /** Pointer to the attached host device. */ 76 HCPTRTYPE(PPDMIHOSTDEVICECONNECTOR) pDrvHostDeviceConnector;76 R3PTRTYPE(PPDMIHOSTDEVICECONNECTOR) pDrvHostDeviceConnector; 77 77 78 78 uint8_t reg_data; -
trunk/src/VBox/Devices/Serial/DevSerial.cpp
r4182 r4787 117 117 118 118 /** Pointer to the device instance. */ 119 HCPTRTYPE(PPDMDEVINS) pDevInsHC;119 R3PTRTYPE(PPDMDEVINS) pDevInsHC; 120 120 /** Pointer to the device instance. */ 121 121 GCPTRTYPE(PPDMDEVINS) pDevInsGC; … … 124 124 #endif 125 125 /** The base interface. */ 126 HCPTRTYPE(PDMIBASE) IBase;126 R3PTRTYPE(PDMIBASE) IBase; 127 127 /** The character port interface. */ 128 HCPTRTYPE(PDMICHARPORT) ICharPort;128 R3PTRTYPE(PDMICHARPORT) ICharPort; 129 129 /** Pointer to the attached base driver. */ 130 HCPTRTYPE(PPDMIBASE) pDrvBase;130 R3PTRTYPE(PPDMIBASE) pDrvBase; 131 131 /** Pointer to the attached character driver. */ 132 HCPTRTYPE(PPDMICHAR) pDrvChar;132 R3PTRTYPE(PPDMICHAR) pDrvChar; 133 133 134 134 uint16_t divider; -
trunk/src/VBox/Devices/Storage/DevATA.cpp
r4778 r4787 167 167 uint32_t cbIOBuffer; 168 168 /** Pointer to the I/O buffer. */ 169 HCPTRTYPE(uint8_t *) pbIOBufferHC;169 R3R0PTRTYPE(uint8_t *) pbIOBufferHC; 170 170 /** Pointer to the I/O buffer. */ 171 171 GCPTRTYPE(uint8_t *) pbIOBufferGC; … … 229 229 #endif 230 230 /** Pointer to device instance. */ 231 HCPTRTYPE(PPDMDEVINS)pDevInsHC;231 R3R0PTRTYPE(PPDMDEVINS) pDevInsHC; 232 232 /** Pointer to controller instance. */ 233 HCPTRTYPE(struct ATACONTROLLER *) pControllerHC;233 R3R0PTRTYPE(struct ATACONTROLLER *) pControllerHC; 234 234 /** Pointer to device instance. */ 235 GCPTRTYPE(PPDMDEVINS) pDevInsGC;235 GCPTRTYPE(PPDMDEVINS) pDevInsGC; 236 236 /** Pointer to controller instance. */ 237 GCPTRTYPE(struct ATACONTROLLER *) pControllerGC;237 GCPTRTYPE(struct ATACONTROLLER *) pControllerGC; 238 238 } ATADevState; 239 239 … … 326 326 327 327 /** Pointer to device instance. */ 328 HCPTRTYPE(PPDMDEVINS)pDevInsHC;328 R3R0PTRTYPE(PPDMDEVINS) pDevInsHC; 329 329 /** Pointer to device instance. */ 330 330 GCPTRTYPE(PPDMDEVINS) pDevInsGC; -
trunk/src/VBox/Devices/Storage/fdc.c
r4071 r4787 144 144 #else /* VBOX */ 145 145 /** Pointer to the attached driver's base interface. */ 146 HCPTRTYPE(PPDMIBASE) pDrvBase;146 R3PTRTYPE(PPDMIBASE) pDrvBase; 147 147 /** Pointer to the attached driver's block interface. */ 148 HCPTRTYPE(PPDMIBLOCK) pDrvBlock;148 R3PTRTYPE(PPDMIBLOCK) pDrvBlock; 149 149 /** Pointer to the attached driver's block bios interface. */ 150 HCPTRTYPE(PPDMIBLOCKBIOS) pDrvBlockBios;150 R3PTRTYPE(PPDMIBLOCKBIOS) pDrvBlockBios; 151 151 /** Pointer to the attached driver's mount interface. 152 152 * This is NULL if the driver isn't a removable unit. */ 153 HCPTRTYPE(PPDMIMOUNT) pDrvMount;153 R3PTRTYPE(PPDMIMOUNT) pDrvMount; 154 154 /** The base interface. */ 155 155 PDMIBASE IBase; -
trunk/src/VBox/Devices/VMMDev/VMMDevState.h
r4611 r4787 175 175 PDMILEDPORTS ILeds; 176 176 /** Partner of ILeds. */ 177 HCPTRTYPE(PPDMILEDCONNECTORS) pLedsConnector;177 R3PTRTYPE(PPDMILEDCONNECTORS) pLedsConnector; 178 178 } SharedFolders; 179 179 -
trunk/src/VBox/VMM/CPUMInternal.h
r4071 r4787 260 260 GCPTRTYPE(struct CPUM *) pCPUMGC; 261 261 /** Pointer to CPU structure in HC. */ 262 HCPTRTYPE(struct CPUM *) pCPUMHC;262 R3R0PTRTYPE(struct CPUM *) pCPUMHC; 263 263 264 264 /** Force 32byte alignment of the next member. */ … … 285 285 286 286 /** Pointer to the current hypervisor core context - HCPtr. */ 287 HCPTRTYPE(PCPUMCTXCORE) pHyperCoreHC;287 R3R0PTRTYPE(PCPUMCTXCORE) pHyperCoreHC; 288 288 /** Pointer to the current hypervisor core context - GCPtr. */ 289 289 GCPTRTYPE(PCPUMCTXCORE) pHyperCoreGC; -
trunk/src/VBox/VMM/DBGFInternal.h
r4071 r4787 216 216 217 217 /** List of registered info handlers. */ 218 HCPTRTYPE(PDBGFINFO) pInfoFirst;218 R3PTRTYPE(PDBGFINFO) pInfoFirst; 219 219 /** Critical section protecting the above list. */ 220 220 RTCRITSECT InfoCritSect; … … 222 222 /** Range tree containing the loaded symbols of the a VM. 223 223 * This tree will never have blind spots. */ 224 HCPTRTYPE(AVLRGCPTRTREE) SymbolTree;224 R3PTRTYPE(AVLRGCPTRTREE) SymbolTree; 225 225 /** Symbol name space. */ 226 HCPTRTYPE(PRTSTRSPACE) pSymbolSpace;226 R3PTRTYPE(PRTSTRSPACE) pSymbolSpace; 227 227 /** Indicates whether DBGFSym.cpp is initialized or not. 228 228 * This part is initialized in a lazy manner for performance reasons. */ -
trunk/src/VBox/VMM/IOM.cpp
r4071 r4787 506 506 */ 507 507 IOMR3DECL(int) IOMR3IOPortRegisterR3(PVM pVM, PPDMDEVINS pDevIns, RTIOPORT PortStart, RTUINT cPorts, RTHCPTR pvUser, 508 HCPTRTYPE(PFNIOMIOPORTOUT) pfnOutCallback, HCPTRTYPE(PFNIOMIOPORTIN) pfnInCallback,509 HCPTRTYPE(PFNIOMIOPORTOUTSTRING) pfnOutStrCallback, HCPTRTYPE(PFNIOMIOPORTINSTRING) pfnInStrCallback, const char *pszDesc)508 R3PTRTYPE(PFNIOMIOPORTOUT) pfnOutCallback, R3PTRTYPE(PFNIOMIOPORTIN) pfnInCallback, 509 R3PTRTYPE(PFNIOMIOPORTOUTSTRING) pfnOutStrCallback, R3PTRTYPE(PFNIOMIOPORTINSTRING) pfnInStrCallback, const char *pszDesc) 510 510 { 511 511 LogFlow(("IOMR3IOPortRegisterR3: pDevIns=%p PortStart=%#x cPorts=%#x pvUser=%VHv pfnOutCallback=%#x pfnInCallback=%#x pfnOutStrCallback=%#x pfnInStrCallback=%#x pszDesc=%s\n", … … 1148 1148 */ 1149 1149 IOMR3DECL(int) IOMR3MMIORegisterR3(PVM pVM, PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTHCPTR pvUser, 1150 HCPTRTYPE(PFNIOMMMIOWRITE) pfnWriteCallback, HCPTRTYPE(PFNIOMMMIOREAD) pfnReadCallback,1151 HCPTRTYPE(PFNIOMMMIOFILL) pfnFillCallback, const char *pszDesc)1150 R3PTRTYPE(PFNIOMMMIOWRITE) pfnWriteCallback, R3PTRTYPE(PFNIOMMMIOREAD) pfnReadCallback, 1151 R3PTRTYPE(PFNIOMMMIOFILL) pfnFillCallback, const char *pszDesc) 1152 1152 { 1153 1153 LogFlow(("IOMR3MMIORegisterR3: pDevIns=%p GCPhysStart=%#x cbRange=%#x pvUser=%VHv pfnWriteCallback=%#x pfnReadCallback=%#x pfnFillCallback=%#x pszDesc=%s\n", -
trunk/src/VBox/VMM/IOMInternal.h
r4071 r4787 112 112 GCPTRTYPE(PFNIOMMMIOFILL) pfnFillCallback; 113 113 /** Description / Name. For easing debugging. */ 114 HCPTRTYPE(const char *) pszDesc;114 R3PTRTYPE(const char *) pszDesc; 115 115 } IOMMMIORANGEGC; 116 116 /** Pointer to a MMIO range descriptor, GC version. */ … … 247 247 GCPTRTYPE(PFNIOMIOPORTINSTRING) pfnInStrCallback; 248 248 /** Description / Name. For easing debugging. */ 249 HCPTRTYPE(const char *) pszDesc;249 R3PTRTYPE(const char *) pszDesc; 250 250 } IOMIOPORTRANGEGC; 251 251 /** Pointer to I/O port range descriptor, GC version. */ … … 349 349 GCPTRTYPE(PIOMTREES) pTreesGC; 350 350 /** Pointer to the trees - HC ptr. */ 351 HCPTRTYPE(PIOMTREES)pTreesHC;351 R3R0PTRTYPE(PIOMTREES) pTreesHC; 352 352 353 353 … … 355 355 * (Saves quite some time in rep outs/ins instruction emulation.) 356 356 * @{ */ 357 HCPTRTYPE(PIOMIOPORTRANGER3) pRangeLastReadR3;358 HCPTRTYPE(PIOMIOPORTRANGER3) pRangeLastWriteR3;359 HCPTRTYPE(PIOMIOPORTSTATS) pStatsLastReadR3;360 HCPTRTYPE(PIOMIOPORTSTATS) pStatsLastWriteR3;361 362 HCPTRTYPE(PIOMIOPORTRANGER0)pRangeLastReadR0;363 HCPTRTYPE(PIOMIOPORTRANGER0)pRangeLastWriteR0;364 HCPTRTYPE(PIOMIOPORTSTATS)pStatsLastReadR0;365 HCPTRTYPE(PIOMIOPORTSTATS)pStatsLastWriteR0;357 R3PTRTYPE(PIOMIOPORTRANGER3) pRangeLastReadR3; 358 R3PTRTYPE(PIOMIOPORTRANGER3) pRangeLastWriteR3; 359 R3PTRTYPE(PIOMIOPORTSTATS) pStatsLastReadR3; 360 R3PTRTYPE(PIOMIOPORTSTATS) pStatsLastWriteR3; 361 362 R3R0PTRTYPE(PIOMIOPORTRANGER0) pRangeLastReadR0; 363 R3R0PTRTYPE(PIOMIOPORTRANGER0) pRangeLastWriteR0; 364 R3R0PTRTYPE(PIOMIOPORTSTATS) pStatsLastReadR0; 365 R3R0PTRTYPE(PIOMIOPORTSTATS) pStatsLastWriteR0; 366 366 367 367 GCPTRTYPE(PIOMIOPORTRANGEGC) pRangeLastReadGC; -
trunk/src/VBox/VMM/MMInternal.h
r4767 r4787 225 225 uint32_t cbHeap; 226 226 /** The HC Ring-3 address of the VM. */ 227 HCPTRTYPE(PVM) pVMHC;227 R3PTRTYPE(PVM) pVMHC; 228 228 /** The HC Ring-3 address of the heap. */ 229 HCPTRTYPE(uint8_t *)pbHeapHC;229 R3R0PTRTYPE(uint8_t *) pbHeapHC; 230 230 /** The GC address of the heap. */ 231 231 GCPTRTYPE(uint8_t *) pbHeapGC; … … 595 595 } u; 596 596 /** Description. */ 597 HCPTRTYPE(const char *) pszDesc;597 R3PTRTYPE(const char *) pszDesc; 598 598 } MMLOOKUPHYPER; 599 599 /** Pointer to a hypervisor memory lookup record. */ -
trunk/src/VBox/VMM/PATM/VMMGC/PATMGC.cpp
r4071 r4787 124 124 STAM_COUNTER_INC(&pVM->patm.s.StatPatchWriteInterpretedFailed); 125 125 } 126 HCPTRTYPE(PPATCHINFO) *paPatch = (HCPTRTYPE(PPATCHINFO) *)MMHyperHC2GC(pVM, pPatchPage->aPatch);126 R3PTRTYPE(PPATCHINFO) *paPatch = (R3PTRTYPE(PPATCHINFO) *)MMHyperHC2GC(pVM, pPatchPage->aPatch); 127 127 128 128 /* Increase the invalid write counter for each patch that's registered for that page. */ -
trunk/src/VBox/VMM/PDMDevice.cpp
r4569 r4787 100 100 PFNSSMDEVSAVEPREP pfnSavePrep, PFNSSMDEVSAVEEXEC pfnSaveExec, PFNSSMDEVSAVEDONE pfnSaveDone, 101 101 PFNSSMDEVLOADPREP pfnLoadPrep, PFNSSMDEVLOADEXEC pfnLoadExec, PFNSSMDEVLOADDONE pfnLoadDone); 102 static DECLCALLBACK(int) pdmR3DevHlp_TMTimerCreate(PPDMDEVINS pDevIns, TMCLOCK enmClock, PFNTMTIMERDEV pfnCallback, const char *pszDesc, PPTMTIMER HCppTimer);103 static DECLCALLBACK(PTMTIMER HC) pdmR3DevHlp_TMTimerCreateExternal(PPDMDEVINS pDevIns, TMCLOCK enmClock, PFNTMTIMEREXT pfnCallback, void *pvUser, const char *pszDesc);102 static DECLCALLBACK(int) pdmR3DevHlp_TMTimerCreate(PPDMDEVINS pDevIns, TMCLOCK enmClock, PFNTMTIMERDEV pfnCallback, const char *pszDesc, PPTMTIMERR3 ppTimer); 103 static DECLCALLBACK(PTMTIMERR3) pdmR3DevHlp_TMTimerCreateExternal(PPDMDEVINS pDevIns, TMCLOCK enmClock, PFNTMTIMEREXT pfnCallback, void *pvUser, const char *pszDesc); 104 104 static DECLCALLBACK(int) pdmR3DevHlp_PCIRegister(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev); 105 105 static DECLCALLBACK(int) pdmR3DevHlp_PCIIORegionRegister(PPDMDEVINS pDevIns, int iRegion, uint32_t cbRegion, PCIADDRESSSPACE enmType, PFNPCIIOREGIONMAP pfnCallback); … … 1516 1516 1517 1517 /** @copydoc PDMDEVHLP::pfnTMTimerCreate */ 1518 static DECLCALLBACK(int) pdmR3DevHlp_TMTimerCreate(PPDMDEVINS pDevIns, TMCLOCK enmClock, PFNTMTIMERDEV pfnCallback, const char *pszDesc, PPTMTIMER HCppTimer)1518 static DECLCALLBACK(int) pdmR3DevHlp_TMTimerCreate(PPDMDEVINS pDevIns, TMCLOCK enmClock, PFNTMTIMERDEV pfnCallback, const char *pszDesc, PPTMTIMERR3 ppTimer) 1519 1519 { 1520 1520 PDMDEV_ASSERT_DEVINS(pDevIns); … … 1531 1531 1532 1532 /** @copydoc PDMDEVHLP::pfnTMTimerCreateExternal */ 1533 static DECLCALLBACK(PTMTIMER HC) pdmR3DevHlp_TMTimerCreateExternal(PPDMDEVINS pDevIns, TMCLOCK enmClock, PFNTMTIMEREXT pfnCallback, void *pvUser, const char *pszDesc)1533 static DECLCALLBACK(PTMTIMERR3) pdmR3DevHlp_TMTimerCreateExternal(PPDMDEVINS pDevIns, TMCLOCK enmClock, PFNTMTIMEREXT pfnCallback, void *pvUser, const char *pszDesc) 1534 1534 { 1535 1535 PDMDEV_ASSERT_DEVINS(pDevIns); -
trunk/src/VBox/VMM/PDMDriver.cpp
r4071 r4787 81 81 static DECLCALLBACK(uint64_t) pdmR3DrvHlp_TMGetVirtualFreq(PPDMDRVINS pDrvIns); 82 82 static DECLCALLBACK(uint64_t) pdmR3DrvHlp_TMGetVirtualTime(PPDMDRVINS pDrvIns); 83 static DECLCALLBACK(int) pdmR3DrvHlp_TMTimerCreate(PPDMDRVINS pDrvIns, TMCLOCK enmClock, PFNTMTIMERDRV pfnCallback, const char *pszDesc, PPTMTIMER HCppTimer);83 static DECLCALLBACK(int) pdmR3DrvHlp_TMTimerCreate(PPDMDRVINS pDrvIns, TMCLOCK enmClock, PFNTMTIMERDRV pfnCallback, const char *pszDesc, PPTMTIMERR3 ppTimer); 84 84 static DECLCALLBACK(int) pdmR3DrvHlp_SSMRegister(PPDMDRVINS pDrvIns, const char *pszName, uint32_t u32Instance, uint32_t u32Version, size_t cbGuess, 85 85 PFNSSMDRVSAVEPREP pfnSavePrep, PFNSSMDRVSAVEEXEC pfnSaveExec, PFNSSMDRVSAVEDONE pfnSaveDone, … … 895 895 896 896 /** @copydoc PDMDRVHLP::pfnTMTimerCreate */ 897 static DECLCALLBACK(int) pdmR3DrvHlp_TMTimerCreate(PPDMDRVINS pDrvIns, TMCLOCK enmClock, PFNTMTIMERDRV pfnCallback, const char *pszDesc, PPTMTIMER HCppTimer)897 static DECLCALLBACK(int) pdmR3DrvHlp_TMTimerCreate(PPDMDRVINS pDrvIns, TMCLOCK enmClock, PFNTMTIMERDRV pfnCallback, const char *pszDesc, PPTMTIMERR3 ppTimer) 898 898 { 899 899 PDMDRV_ASSERT_DRVINS(pDrvIns); -
trunk/src/VBox/VMM/PDMInternal.h
r4776 r4787 85 85 86 86 /** Pointer to device structure - HC Ptr. */ 87 HCPTRTYPE(PPDMDEV) pDevHC;87 R3PTRTYPE(PPDMDEV) pDevHC; 88 88 89 89 /** Pointer to the VM this instance was created for - HC Ptr. */ 90 HCPTRTYPE(PVM)pVMHC;90 R3R0PTRTYPE(PVM) pVMHC; 91 91 /** Pointer to the list of logical units associated with the device. (FIFO) */ 92 92 R3PTRTYPE(PPDMLUN) pLunsHC; … … 293 293 { 294 294 /** Pointer to the next device (HC Ptr). */ 295 HCPTRTYPE(PPDMDEV) pNext;295 R3PTRTYPE(PPDMDEV) pNext; 296 296 /** Device name length. (search optimization) */ 297 297 RTUINT cchName; 298 298 /** Registration structure. */ 299 HCPTRTYPE(const struct PDMDEVREG *) pDevReg;299 R3PTRTYPE(const struct PDMDEVREG *) pDevReg; 300 300 /** Number of instances. */ 301 301 RTUINT cInstances; 302 302 /** Pointer to chain of instances (HC Ptr). */ 303 HCPTRTYPE(PPDMDEVINS) pInstances;303 R3PTRTYPE(PPDMDEVINS) pInstances; 304 304 } PDMDEV; 305 305 … … 343 343 { 344 344 /** Pointer to the PIC device instance - HC. */ 345 HCPTRTYPE(PPDMDEVINS) pDevInsR3;345 R3PTRTYPE(PPDMDEVINS) pDevInsR3; 346 346 /** @copydoc PDMPICREG::pfnSetIrqHC */ 347 347 DECLR3CALLBACKMEMBER(void, pfnSetIrqR3,(PPDMDEVINS pDevIns, int iIrq, int iLevel)); … … 374 374 { 375 375 /** Pointer to the APIC device instance - HC Ptr. */ 376 PPDMDEVINS HCpDevInsR3;376 PPDMDEVINSR3 pDevInsR3; 377 377 /** @copydoc PDMAPICREG::pfnGetInterruptHC */ 378 378 DECLR3CALLBACKMEMBER(int, pfnGetInterruptR3,(PPDMDEVINS pDevIns)); … … 432 432 { 433 433 /** Pointer to the APIC device instance - HC Ptr. */ 434 PPDMDEVINS HCpDevInsR3;434 PPDMDEVINSR3 pDevInsR3; 435 435 /** @copydoc PDMIOAPICREG::pfnSetIrqHC */ 436 436 DECLR3CALLBACKMEMBER(void, pfnSetIrqR3,(PPDMDEVINS pDevIns, int iIrq, int iLevel)); … … 458 458 459 459 /** Pointer to PCI Bus device instance. */ 460 PPDMDEVINS HCpDevInsR3;460 PPDMDEVINSR3 pDevInsR3; 461 461 /** @copydoc PDMPCIBUSREG::pfnSetIrqHC */ 462 462 DECLR3CALLBACKMEMBER(void, pfnSetIrqR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, int iIrq, int iLevel)); … … 590 590 { 591 591 /** Pointer to the next queue in the list. */ 592 HCPTRTYPE(PPDMQUEUE) pNext;592 R3PTRTYPE(PPDMQUEUE) pNext; 593 593 /** Type specific data. */ 594 594 union … … 600 600 R3PTRTYPE(PFNPDMQUEUEDEV) pfnCallback; 601 601 /** Pointer to the device instance owning the queue. */ 602 HCPTRTYPE(PPDMDEVINS) pDevIns;602 R3PTRTYPE(PPDMDEVINS) pDevIns; 603 603 } Dev; 604 604 /** PDMQUEUETYPE_DRV */ … … 608 608 R3PTRTYPE(PFNPDMQUEUEDRV) pfnCallback; 609 609 /** Pointer to the driver instance owning the queue. */ 610 HCPTRTYPE(PPDMDRVINS) pDrvIns;610 R3PTRTYPE(PPDMDRVINS) pDrvIns; 611 611 } Drv; 612 612 /** PDMQUEUETYPE_INTERNAL */ … … 622 622 R3PTRTYPE(PFNPDMQUEUEEXT) pfnCallback; 623 623 /** Pointer to user argument. */ 624 HCPTRTYPE(void *) pvUser;624 R3PTRTYPE(void *) pvUser; 625 625 } Ext; 626 626 } u; … … 632 632 uint32_t cMilliesInterval; 633 633 /** Interval timer. Only used if cMilliesInterval is non-zero. */ 634 PTMTIMER HCpTimer;634 PTMTIMERR3 pTimer; 635 635 /** Pointer to the VM. */ 636 HCPTRTYPE(PVM)pVMHC;636 R3R0PTRTYPE(PVM) pVMHC; 637 637 /** LIFO of pending items - HC. */ 638 HCPTRTYPE(PPDMQUEUEITEMCORE) volatilepPendingHC;638 R3R0PTRTYPE(PPDMQUEUEITEMCORE) volatile pPendingHC; 639 639 /** Pointer to the GC VM and indicator for GC enabled queue. 640 640 * If this is NULL, the queue cannot be used in GC. … … 655 655 { 656 656 /** Pointer to the free item - HC Ptr. */ 657 HCPTRTYPE(PPDMQUEUEITEMCORE) volatile pItemHC;657 R3R0PTRTYPE(PPDMQUEUEITEMCORE) volatile pItemHC; 658 658 /** Pointer to the free item - GC Ptr. */ 659 GCPTRTYPE(PPDMQUEUEITEMCORE) volatile pItemGC;659 GCPTRTYPE(PPDMQUEUEITEMCORE) volatile pItemGC; 660 660 #if HC_ARCH_BITS == 64 && GC_ARCH_BITS == 32 661 661 uint32_t Alignment0; … … 690 690 PDMQUEUEITEMCORE Core; 691 691 /** Pointer to the device instance (HC Ptr). */ 692 HCPTRTYPE(PPDMDEVINS)pDevInsHC;692 R3R0PTRTYPE(PPDMDEVINS) pDevInsHC; 693 693 /** This operation to perform. */ 694 694 PDMDEVHLPTASKOP enmOp; … … 789 789 790 790 /** Queue in which devhlp tasks are queued for R3 execution - HC Ptr. */ 791 HCPTRTYPE(PPDMQUEUE)pDevHlpQueueHC;791 R3R0PTRTYPE(PPDMQUEUE) pDevHlpQueueHC; 792 792 /** Queue in which devhlp tasks are queued for R3 execution - GC Ptr. */ 793 793 GCPTRTYPE(PPDMQUEUE) pDevHlpQueueGC; … … 805 805 /** Pointer to the queue which should be manually flushed - HCPtr. 806 806 * Only touched by EMT. */ 807 HCPTRTYPE(struct PDMQUEUE *)pQueueFlushHC;807 R3R0PTRTYPE(struct PDMQUEUE *) pQueueFlushHC; 808 808 /** Pointer to the queue which should be manually flushed - GCPtr. */ 809 809 GCPTRTYPE(struct PDMQUEUE *) pQueueFlushGC; … … 826 826 R3PTRTYPE(PFNPDMDRVPOLLER) apfnPollers[16]; 827 827 R3PTRTYPE(PPDMDRVINS) aDrvInsPollers[16]; 828 PTMTIMER HCpTimerPollers;828 PTMTIMERR3 pTimerPollers; 829 829 /** @} */ 830 830 -
trunk/src/VBox/VMM/PGMHandler.cpp
r4620 r4787 261 261 PFNPGMHCVIRTINVALIDATE pfnInvalidateHC, 262 262 PFNPGMHCVIRTHANDLER pfnHandlerHC, RTGCPTR pfnHandlerGC, 263 HCPTRTYPE(const char *) pszDesc)263 R3PTRTYPE(const char *) pszDesc) 264 264 { 265 265 Log(("PGMR3HandlerVirtualRegister: enmType=%d GCPtr=%RGv GCPtrLast=%RGv pfnHandlerGC=%RGv pszDesc=%s\n", enmType, GCPtr, GCPtrLast, pfnHandlerGC, pszDesc)); -
trunk/src/VBox/VMM/PGMInternal.h
r4738 r4787 456 456 R3PTRTYPE(PFNPGMHCVIRTHANDLER) pfnHandlerHC; 457 457 /** Description / Name. For easing debugging. */ 458 HCPTRTYPE(const char *) pszDesc;458 R3PTRTYPE(const char *) pszDesc; 459 459 #ifdef VBOX_WITH_STATISTICS 460 460 /** Profiling of this handler. */ … … 658 658 { 659 659 /** Pointer to the next RAM range - for HC. */ 660 HCPTRTYPE(struct PGMRAMRANGE *)pNextHC;660 R3R0PTRTYPE(struct PGMRAMRANGE *) pNextHC; 661 661 /** Pointer to the next RAM range - for GC. */ 662 662 GCPTRTYPE(struct PGMRAMRANGE *) pNextGC; … … 673 673 GCPTRTYPE(PRTHCPTR) pavHCChunkGC; 674 674 /** HC virtual lookup ranges for chunks. Currently only used with MM_RAM_FLAGS_DYNAMIC_ALLOC ranges. */ 675 HCPTRTYPE(PRTHCPTR)pavHCChunkHC;675 R3R0PTRTYPE(PRTHCPTR) pavHCChunkHC; 676 676 677 677 /** Start of the HC mapping of the range. 678 678 * For pure MMIO and dynamically allocated ranges this is NULL, while for all ranges this is a valid pointer. */ 679 HCPTRTYPE(void *) pvHC;679 R3PTRTYPE(void *) pvHC; 680 680 681 681 /** Array of physical guest page tracking structures. */ … … 755 755 #endif 756 756 /** The chunk map. */ 757 HCPTRTYPE(PPGMCHUNKR3MAP) volatile pChunk;757 R3R0PTRTYPE(PPGMCHUNKR3MAP) volatile pChunk; 758 758 } PGMCHUNKR3MAPTLBE; 759 759 /** Pointer to the an allocation chunk ring-3 mapping TLB entry. */ … … 801 801 { 802 802 /** Address of the page. */ 803 RTGCPHYS volatile GCPhys;803 RTGCPHYS volatile GCPhys; 804 804 #if HC_ARCH_BITS == 64 805 uint32_t u32Padding; /**< alignment padding. */805 uint32_t u32Padding; /**< alignment padding. */ 806 806 #endif 807 807 /** The guest page. */ 808 HCPTRTYPE(PPGMPAGE) volatilepPage;808 R3R0PTRTYPE(PPGMPAGE) volatile pPage; 809 809 /** Pointer to the page mapping tracking structure, PGMCHUNKR3MAP. */ 810 HCPTRTYPE(PPGMCHUNKR3MAP) volatilepMap;810 R3R0PTRTYPE(PPGMCHUNKR3MAP) volatile pMap; 811 811 /** The address */ 812 HCPTRTYPE(void *) volatilepv;812 R3R0PTRTYPE(void *) volatile pv; 813 813 } PGMPAGER3MAPTLBE; 814 814 /** Pointer to an entry in the HC physical TLB. */ … … 1007 1007 AVLOHCPHYSNODECORE Core; 1008 1008 /** Pointer to the HC mapping of the page. */ 1009 HCPTRTYPE(void *)pvPageHC;1009 R3R0PTRTYPE(void *) pvPageHC; 1010 1010 /** The guest physical address. */ 1011 1011 RTGCPHYS GCPhys; … … 1087 1087 { 1088 1088 /** The VM handle - HC Ptr. */ 1089 HCPTRTYPE(PVM)pVMHC;1089 R3R0PTRTYPE(PVM) pVMHC; 1090 1090 /** The VM handle - GC Ptr. */ 1091 1091 GCPTRTYPE(PVM) pVMGC; … … 1108 1108 GCPTRTYPE(PPGMPOOLUSER) paUsersGC; 1109 1109 /** Pointer to the array of user nodes - HC pointer. */ 1110 HCPTRTYPE(PPGMPOOLUSER) paUsersHC;1110 R3R0PTRTYPE(PPGMPOOLUSER) paUsersHC; 1111 1111 #endif /* PGMPOOL_WITH_USER_TRACKING */ 1112 1112 #ifdef PGMPOOL_WITH_GCPHYS_TRACKING … … 1118 1118 GCPTRTYPE(PPGMPOOLPHYSEXT) paPhysExtsGC; 1119 1119 /** Pointer to the array of physical xref extent nodes - HC pointer. */ 1120 HCPTRTYPE(PPGMPOOLPHYSEXT) paPhysExtsHC;1120 R3R0PTRTYPE(PPGMPOOLPHYSEXT) paPhysExtsHC; 1121 1121 #endif /* PGMPOOL_WITH_GCPHYS_TRACKING */ 1122 1122 #ifdef PGMPOOL_WITH_CACHE … … 1527 1527 * @{ */ 1528 1528 /** The guest's page directory, HC pointer. */ 1529 HCPTRTYPE(PVBOXPD)pGuestPDHC;1529 R3R0PTRTYPE(PVBOXPD) pGuestPDHC; 1530 1530 /** The guest's page directory, static GC mapping. */ 1531 1531 GCPTRTYPE(PVBOXPD) pGuestPDGC; … … 1537 1537 GCPTRTYPE(PX86PDPTR) pGstPaePDPTRGC; 1538 1538 /** The guest's page directory pointer table, HC pointer. */ 1539 HCPTRTYPE(PX86PDPTR)pGstPaePDPTRHC;1539 R3R0PTRTYPE(PX86PDPTR) pGstPaePDPTRHC; 1540 1540 /** The guest's page directories, HC pointers. 1541 1541 * These are individual pointers and doesn't have to be adjecent. 1542 1542 * These doesn't have to be update to date - use pgmGstGetPaePD() to access them. */ 1543 HCPTRTYPE(PX86PDPAE)apGstPaePDsHC[4];1543 R3R0PTRTYPE(PX86PDPAE) apGstPaePDsHC[4]; 1544 1544 /** The guest's page directories, static GC mapping. 1545 1545 * Unlike the HC array the first entry can be accessed as a 2048 entry PD. … … 1556 1556 * @{ */ 1557 1557 /** The 32-Bit PD - HC Ptr. */ 1558 HCPTRTYPE(PX86PD)pHC32BitPD;1558 R3R0PTRTYPE(PX86PD) pHC32BitPD; 1559 1559 /** The 32-Bit PD - GC Ptr. */ 1560 1560 GCPTRTYPE(PX86PD) pGC32BitPD; … … 1571 1571 * Even though these are 4 pointers, what they point at is a single table. 1572 1572 * Thus, it's possible to walk the 2048 entries starting where apHCPaePDs[0] points. */ 1573 HCPTRTYPE(PX86PDPAE)apHCPaePDs[4];1573 R3R0PTRTYPE(PX86PDPAE) apHCPaePDs[4]; 1574 1574 /** The four PDs for the low 4GB - GC Ptr. 1575 1575 * Same kind of mapping as apHCPaePDs. */ … … 1579 1579 RTHCPHYS aHCPhysPaePDs[4]; 1580 1580 /** The PAE PDPTR - HC Ptr. */ 1581 HCPTRTYPE(PX86PDPTR)pHCPaePDPTR;1581 R3R0PTRTYPE(PX86PDPTR) pHCPaePDPTR; 1582 1582 /** The Physical Address (HC) of the PAE PDPTR. */ 1583 1583 RTHCPHYS HCPhysPaePDPTR; … … 1592 1592 GCPTRTYPE(PX86PML4) pGCPaePML4; 1593 1593 /** The Page Map Level 4 table - GC Ptr. */ 1594 HCPTRTYPE(PX86PML4)pHCPaePML4;1594 R3R0PTRTYPE(PX86PML4) pHCPaePML4; 1595 1595 /** The Physical Address (HC) of the Page Map Level 4 table. */ 1596 1596 RTHCPHYS HCPhysPaePML4; … … 1700 1700 * The memory locks and other conversions are managed by MM at the moment. 1701 1701 */ 1702 HCPTRTYPE(PPGMRAMRANGE)pRamRangesHC;1702 R3R0PTRTYPE(PPGMRAMRANGE) pRamRangesHC; 1703 1703 /** Pointer to the list of RAM ranges (Phys GC -> Phys HC conversion) - for GC. 1704 1704 * This is sorted by physical address and contains no overlaps. … … 1710 1710 1711 1711 /** PGM offset based trees - HC Ptr. */ 1712 HCPTRTYPE(PPGMTREES)pTreesHC;1712 R3R0PTRTYPE(PPGMTREES) pTreesHC; 1713 1713 /** PGM offset based trees - GC Ptr. */ 1714 1714 GCPTRTYPE(PPGMTREES) pTreesGC; … … 1743 1743 * @{ */ 1744 1744 /** Pointer to the intermediate page directory - Normal. */ 1745 HCPTRTYPE(PX86PD) pInterPD;1745 R3PTRTYPE(PX86PD) pInterPD; 1746 1746 /** Pointer to the intermedate page tables - Normal. 1747 1747 * There are two page tables, one for the identity mapping and one for 1748 1748 * the host context mapping (of the core code). */ 1749 HCPTRTYPE(PX86PT) apInterPTs[2];1749 R3PTRTYPE(PX86PT) apInterPTs[2]; 1750 1750 /** Pointer to the intermedate page tables - PAE. */ 1751 HCPTRTYPE(PX86PTPAE) apInterPaePTs[2];1751 R3PTRTYPE(PX86PTPAE) apInterPaePTs[2]; 1752 1752 /** Pointer to the intermedate page directory - PAE. */ 1753 HCPTRTYPE(PX86PDPAE) apInterPaePDs[4];1753 R3PTRTYPE(PX86PDPAE) apInterPaePDs[4]; 1754 1754 /** Pointer to the intermedate page directory - PAE. */ 1755 HCPTRTYPE(PX86PDPTR) pInterPaePDPTR;1755 R3PTRTYPE(PX86PDPTR) pInterPaePDPTR; 1756 1756 /** Pointer to the intermedate page-map level 4 - AMD64. */ 1757 HCPTRTYPE(PX86PML4) pInterPaePML4;1757 R3PTRTYPE(PX86PML4) pInterPaePML4; 1758 1758 /** Pointer to the intermedate page directory - AMD64. */ 1759 HCPTRTYPE(PX86PDPTR) pInterPaePDPTR64;1759 R3PTRTYPE(PX86PDPTR) pInterPaePDPTR64; 1760 1760 /** The Physical Address (HC) of the intermediate Page Directory - Normal. */ 1761 1761 RTHCPHYS HCPhysInterPD; … … 1799 1799 1800 1800 /** Shadow Page Pool - HC Ptr. */ 1801 HCPTRTYPE(PPGMPOOL)pPoolHC;1801 R3R0PTRTYPE(PPGMPOOL) pPoolHC; 1802 1802 /** Shadow Page Pool - GC Ptr. */ 1803 1803 GCPTRTYPE(PPGMPOOL) pPoolGC; … … 1821 1821 { 1822 1822 /** The chunk tree, ordered by chunk id. */ 1823 HCPTRTYPE(PAVLU32NODECORE) pTree;1823 R3R0PTRTYPE(PAVLU32NODECORE) pTree; 1824 1824 /** The chunk mapping TLB. */ 1825 1825 PGMCHUNKR3MAPTLB Tlb; … … 1830 1830 uint32_t cMax; 1831 1831 /** The chunk age tree, ordered by ageing sequence number. */ 1832 HCPTRTYPE(PAVLLU32NODECORE) pAgeTree;1832 R3PTRTYPE(PAVLLU32NODECORE) pAgeTree; 1833 1833 /** The current time. */ 1834 1834 uint32_t iNow; … … 1896 1896 #ifdef VBOX_WITH_STATISTICS 1897 1897 /** GC: Which statistic this \#PF should be attributed to. */ 1898 GCPTRTYPE(PSTAMPROFILE) pStatTrap0eAttributionGC;1899 RTGCPTR padding0;1898 GCPTRTYPE(PSTAMPROFILE) pStatTrap0eAttributionGC; 1899 RTGCPTR padding0; 1900 1900 /** HC: Which statistic this \#PF should be attributed to. */ 1901 HCPTRTYPE(PSTAMPROFILE) pStatTrap0eAttributionHC;1901 R3R0PTRTYPE(PSTAMPROFILE) pStatTrap0eAttributionHC; 1902 1902 RTHCPTR padding1; 1903 1903 STAMPROFILE StatGCTrap0e; /**< GC: PGMGCTrap0eHandler() profiling. */ -
trunk/src/VBox/VMM/REMInternal.h
r4616 r4787 149 149 150 150 /** Cached guest cpu context pointer. */ 151 HCPTRTYPE(PCPUMCTX) pCtx;151 R3PTRTYPE(PCPUMCTX) pCtx; 152 152 153 153 /** In REM mode. … … 192 192 193 193 /** Pointer to an array of hc virt to gc phys records. */ 194 HCPTRTYPE(PREMCHUNKINFO) paHCVirtToGCPhys;194 R3PTRTYPE(PREMCHUNKINFO) paHCVirtToGCPhys; 195 195 /** Pointer to a GC Phys to HC Virt lookup table. */ 196 HCPTRTYPE(PRTHCUINTPTR) paGCPhysToHCVirt;196 R3PTRTYPE(PRTHCUINTPTR) paGCPhysToHCVirt; 197 197 198 198 /** Array of external RAM and ROM registrations (excluding guest RAM). */ -
trunk/src/VBox/VMM/TM.cpp
r4071 r4787 912 912 * Allocate the timer. 913 913 */ 914 PTMTIMER HCpTimer = NULL;914 PTMTIMERR3 pTimer = NULL; 915 915 if (pVM->tm.s.pFree && VM_IS_EMT(pVM)) 916 916 { … … 969 969 * @param ppTimer Where to store the timer on success. 970 970 */ 971 TMR3DECL(int) TMR3TimerCreateDevice(PVM pVM, PPDMDEVINS pDevIns, TMCLOCK enmClock, PFNTMTIMERDEV pfnCallback, const char *pszDesc, PPTMTIMER HCppTimer)971 TMR3DECL(int) TMR3TimerCreateDevice(PVM pVM, PPDMDEVINS pDevIns, TMCLOCK enmClock, PFNTMTIMERDEV pfnCallback, const char *pszDesc, PPTMTIMERR3 ppTimer) 972 972 { 973 973 /* … … 999 999 * @param ppTimer Where to store the timer on success. 1000 1000 */ 1001 TMR3DECL(int) TMR3TimerCreateDriver(PVM pVM, PPDMDRVINS pDrvIns, TMCLOCK enmClock, PFNTMTIMERDRV pfnCallback, const char *pszDesc, PPTMTIMER HCppTimer)1001 TMR3DECL(int) TMR3TimerCreateDriver(PVM pVM, PPDMDRVINS pDrvIns, TMCLOCK enmClock, PFNTMTIMERDRV pfnCallback, const char *pszDesc, PPTMTIMERR3 ppTimer) 1002 1002 { 1003 1003 /* … … 1029 1029 * @param ppTimer Where to store the timer on success. 1030 1030 */ 1031 TMR3DECL(int) TMR3TimerCreateInternal(PVM pVM, TMCLOCK enmClock, PFNTMTIMERINT pfnCallback, void *pvUser, const char *pszDesc, PPTMTIMER HCppTimer)1031 TMR3DECL(int) TMR3TimerCreateInternal(PVM pVM, TMCLOCK enmClock, PFNTMTIMERINT pfnCallback, void *pvUser, const char *pszDesc, PPTMTIMERR3 ppTimer) 1032 1032 { 1033 1033 /* … … 1060 1060 * until the timer is fully destroyed (i.e. a bit after TMTimerDestroy()). 1061 1061 */ 1062 TMR3DECL(PTMTIMER HC) TMR3TimerCreateExternal(PVM pVM, TMCLOCK enmClock, PFNTMTIMEREXT pfnCallback, void *pvUser, const char *pszDesc)1062 TMR3DECL(PTMTIMERR3) TMR3TimerCreateExternal(PVM pVM, TMCLOCK enmClock, PFNTMTIMEREXT pfnCallback, void *pvUser, const char *pszDesc) 1063 1063 { 1064 1064 /* 1065 1065 * Allocate and init stuff. 1066 1066 */ 1067 PTMTIMER HCpTimer;1067 PTMTIMERR3 pTimer; 1068 1068 int rc = tmr3TimerCreate(pVM, enmClock, pszDesc, &pTimer); 1069 1069 if (VBOX_SUCCESS(rc)) … … 1641 1641 * @param pSSM Save State Manager handle. 1642 1642 */ 1643 TMR3DECL(int) TMR3TimerSave(PTMTIMER HCpTimer, PSSMHANDLE pSSM)1643 TMR3DECL(int) TMR3TimerSave(PTMTIMERR3 pTimer, PSSMHANDLE pSSM) 1644 1644 { 1645 1645 LogFlow(("TMR3TimerSave: pTimer=%p:{enmState=%s, .pszDesc={%s}} pSSM=%p\n", pTimer, tmTimerState(pTimer->enmState), pTimer->pszDesc, pSSM)); … … 1683 1683 * @param pSSM Save State Manager handle. 1684 1684 */ 1685 TMR3DECL(int) TMR3TimerLoad(PTMTIMER HCpTimer, PSSMHANDLE pSSM)1685 TMR3DECL(int) TMR3TimerLoad(PTMTIMERR3 pTimer, PSSMHANDLE pSSM) 1686 1686 { 1687 1687 Assert(pTimer); Assert(pSSM); VM_ASSERT_EMT(pTimer->pVMR3); … … 1775 1775 "Expire", 1776 1776 "State"); 1777 for (PTMTIMER HCpTimer = pVM->tm.s.pCreated; pTimer; pTimer = pTimer->pBigNext)1777 for (PTMTIMERR3 pTimer = pVM->tm.s.pCreated; pTimer; pTimer = pTimer->pBigNext) 1778 1778 { 1779 1779 pHlp->pfnPrintf(pHlp, … … 1815 1815 for (unsigned iQueue = 0; iQueue < TMCLOCK_MAX; iQueue++) 1816 1816 { 1817 for (PTMTIMER HCpTimer = TMTIMER_GET_HEAD(&pVM->tm.s.paTimerQueuesR3[iQueue]);1817 for (PTMTIMERR3 pTimer = TMTIMER_GET_HEAD(&pVM->tm.s.paTimerQueuesR3[iQueue]); 1818 1818 pTimer; 1819 1819 pTimer = TMTIMER_GET_NEXT(pTimer)) -
trunk/src/VBox/VMM/TMInternal.h
r4776 r4787 400 400 * raise VM_FF_TIMER to pull EMTs attention to them. 401 401 */ 402 HCPTRTYPE(PRTTIMER) pTimer;402 R3PTRTYPE(PRTTIMER) pTimer; 403 403 /** Interval in milliseconds of the pTimer timer. */ 404 404 uint32_t u32TimerMillies; -
trunk/src/VBox/VMM/VMInternal.h
r4296 r4787 223 223 224 224 /** List of registered reset callbacks. */ 225 HCPTRTYPE(PVMATRESET) pAtReset;225 R3PTRTYPE(PVMATRESET) pAtReset; 226 226 /** List of registered reset callbacks. */ 227 HCPTRTYPE(PVMATRESET *) ppAtResetNext;227 R3PTRTYPE(PVMATRESET *) ppAtResetNext; 228 228 229 229 /** List of registered state change callbacks. */ 230 HCPTRTYPE(PVMATSTATE) pAtState;230 R3PTRTYPE(PVMATSTATE) pAtState; 231 231 /** List of registered state change callbacks. */ 232 HCPTRTYPE(PVMATSTATE *) ppAtStateNext;232 R3PTRTYPE(PVMATSTATE *) ppAtStateNext; 233 233 234 234 /** List of registered error callbacks. */ 235 HCPTRTYPE(PVMATERROR) pAtError;235 R3PTRTYPE(PVMATERROR) pAtError; 236 236 /** List of registered error callbacks. */ 237 HCPTRTYPE(PVMATERROR *) ppAtErrorNext;237 R3PTRTYPE(PVMATERROR *) ppAtErrorNext; 238 238 239 239 /** List of registered error callbacks. */ 240 HCPTRTYPE(PVMATRUNTIMEERROR) pAtRuntimeError;240 R3PTRTYPE(PVMATRUNTIMEERROR) pAtRuntimeError; 241 241 /** List of registered error callbacks. */ 242 HCPTRTYPE(PVMATRUNTIMEERROR *) ppAtRuntimeErrorNext;242 R3PTRTYPE(PVMATRUNTIMEERROR *) ppAtRuntimeErrorNext; 243 243 244 244 /** Head of the request queue. Atomic. */ 245 volatile HCPTRTYPE(PVMREQ) pReqs;245 volatile R3PTRTYPE(PVMREQ) pReqs; 246 246 /** The last index used during alloc/free. */ 247 247 volatile uint32_t iReqFree; 248 248 /** Array of pointers to lists of free request packets. Atomic. */ 249 volatile HCPTRTYPE(PVMREQ) apReqFree[9];249 volatile R3PTRTYPE(PVMREQ) apReqFree[9]; 250 250 /** Number of free request packets. */ 251 251 volatile uint32_t cReqFree; … … 254 254 volatile uint32_t fWait; 255 255 /** Wait event semaphore. */ 256 HCPTRTYPE(RTSEMEVENT) EventSemWait;256 R3PTRTYPE(RTSEMEVENT) EventSemWait; 257 257 258 258 /** VM Error Message. */ … … 263 263 264 264 /** Pointer to the DBGC instance data. */ 265 HCPTRTYPE(void *) pvDBGC;265 R3PTRTYPE(void *) pvDBGC; 266 266 267 267 /** If set the EMT does the final VM cleanup when it exits. -
trunk/src/VBox/VMM/VMMAll/IOMAll.cpp
r4071 r4787 233 233 } 234 234 235 #ifndef IN_RING0 235 236 /** 236 237 * Registers a Port IO GC handler. … … 452 453 return rc; 453 454 } 454 455 #endif 455 456 456 457 /** -
trunk/src/VBox/VMM/VMMAll/PGMAllGst.h
r4620 r4787 356 356 PGM_INVL_PG(pVM->pgm.s.GCPtrCR3Mapping); 357 357 #if PGM_GST_TYPE == PGM_TYPE_32BIT 358 pVM->pgm.s.pGuestPDHC = ( HCPTRTYPE(PX86PD))HCPtrGuestCR3;358 pVM->pgm.s.pGuestPDHC = (R3R0PTRTYPE(PX86PD))HCPtrGuestCR3; 359 359 pVM->pgm.s.pGuestPDGC = (GCPTRTYPE(PX86PD))pVM->pgm.s.GCPtrCR3Mapping; 360 360 361 361 #elif PGM_GST_TYPE == PGM_TYPE_PAE 362 362 const unsigned off = GCPhysCR3 & X86_CR3_PAE_PAGE_MASK; 363 pVM->pgm.s.pGstPaePDPTRHC = ( HCPTRTYPE(PX86PDPTR))((RTHCUINTPTR)HCPtrGuestCR3 | off);363 pVM->pgm.s.pGstPaePDPTRHC = (R3R0PTRTYPE(PX86PDPTR))((RTHCUINTPTR)HCPtrGuestCR3 | off); 364 364 pVM->pgm.s.pGstPaePDPTRGC = (GCPTRTYPE(PX86PDPTR))((RTGCUINTPTR)pVM->pgm.s.GCPtrCR3Mapping | off); 365 365 … … 380 380 rc = PGMMap(pVM, GCPtr, HCPhys & X86_PTE_PAE_PG_MASK, PAGE_SIZE, 0); 381 381 AssertRCReturn(rc, rc); 382 pVM->pgm.s.apGstPaePDsHC[i] = ( HCPTRTYPE(PX86PDPAE))HCPtr;382 pVM->pgm.s.apGstPaePDsHC[i] = (R3R0PTRTYPE(PX86PDPAE))HCPtr; 383 383 pVM->pgm.s.apGstPaePDsGC[i] = (GCPTRTYPE(PX86PDPAE))GCPtr; 384 384 pVM->pgm.s.aGCPhysGstPaePDs[i] = GCPhys; -
trunk/src/VBox/VMM/VMMAll/TMAll.cpp
r4071 r4787 1277 1277 * Do the big list and check that active timers all are in the active lists. 1278 1278 */ 1279 PTMTIMER HCpPrev = NULL;1280 for (PTMTIMER HCpCur = pVM->tm.s.pCreated; pCur; pPrev = pCur, pCur = pCur->pBigNext)1279 PTMTIMERR3 pPrev = NULL; 1280 for (PTMTIMERR3 pCur = pVM->tm.s.pCreated; pCur; pPrev = pCur, pCur = pCur->pBigNext) 1281 1281 { 1282 1282 Assert(pCur->pBigPrev == pPrev); … … 1292 1292 case TMTIMERSTATE_PENDING_RESCHEDULE_SET_EXPIRE: 1293 1293 { 1294 PTMTIMER HCpCurAct = TMTIMER_GET_HEAD(&pVM->tm.s.CTXALLSUFF(paTimerQueues)[pCur->enmClock]);1294 PTMTIMERR3 pCurAct = TMTIMER_GET_HEAD(&pVM->tm.s.CTXALLSUFF(paTimerQueues)[pCur->enmClock]); 1295 1295 Assert(pCur->offPrev || pCur == pCurAct); 1296 1296 while (pCurAct && pCurAct != pCur) … … 1308 1308 Assert(!pCur->offNext); 1309 1309 Assert(!pCur->offPrev); 1310 for (PTMTIMER HCpCurAct = TMTIMER_GET_HEAD(&pVM->tm.s.CTXALLSUFF(paTimerQueues)[pCur->enmClock]);1310 for (PTMTIMERR3 pCurAct = TMTIMER_GET_HEAD(&pVM->tm.s.CTXALLSUFF(paTimerQueues)[pCur->enmClock]); 1311 1311 pCurAct; 1312 1312 pCurAct = TMTIMER_GET_NEXT(pCurAct)) -
trunk/src/VBox/VMM/VMMInternal.h
r4071 r4787 191 191 * Stack is allocated from the hypervisor heap and is page aligned 192 192 * and always writable in GC. */ 193 HCPTRTYPE(uint8_t *) pbHCStack;193 R3PTRTYPE(uint8_t *) pbHCStack; 194 194 /** Pointer to the bottom of the stack - needed for doing relocations. */ 195 195 GCPTRTYPE(uint8_t *) pbGCStack; … … 204 204 /** Pointer to the GC logger instance - HC Ptr. 205 205 * This is NULL if logging is disabled. */ 206 HCPTRTYPE(PRTLOGGERGC) pLoggerHC;206 R3PTRTYPE(PRTLOGGERGC) pLoggerHC; 207 207 208 208 /** Pointer to the R0 logger instance. 209 209 * This is NULL if logging is disabled. */ 210 HCPTRTYPE(PVMMR0LOGGER)pR0Logger;210 R3R0PTRTYPE(PVMMR0LOGGER) pR0Logger; 211 211 212 212 #ifdef VBOX_WITH_GC_AND_R0_RELEASE_LOG … … 217 217 RTUINT cbRelLoggerGC; 218 218 /** Pointer to the GC release logger instance - HC Ptr. */ 219 HCPTRTYPE(PRTLOGGERGC) pRelLoggerHC;219 R3PTRTYPE(PRTLOGGERGC) pRelLoggerHC; 220 220 #endif /* VBOX_WITH_GC_AND_R0_RELEASE_LOG */ 221 221 … … 224 224 225 225 /** The EMT yield timer. */ 226 PTMTIMER HCpYieldTimer;226 PTMTIMERR3 pYieldTimer; 227 227 /** The period to the next timeout when suspended or stopped. 228 228 * This is 0 when running. */ -
trunk/src/VBox/VMM/VMMR0/VMMR0.cpp
r4755 r4787 728 728 PVM pVM = pR0Logger->pVM; 729 729 if ( !VALID_PTR(pVM) 730 || pVM->pVM HC!= pVM)730 || pVM->pVMR0 != pVM) 731 731 { 732 732 LogCom(("vmmR0LoggerFlush: pVM=%p! pLogger=%p\n", pVM, pLogger));
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