Changeset 48701 in vbox for trunk/src/VBox/VMM
- Timestamp:
- Sep 26, 2013 10:20:10 AM (11 years ago)
- File:
-
- 1 edited
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trunk/src/VBox/VMM/VMMR3/CPUM.cpp
r48646 r48701 857 857 rc = CFGMR3QueryBoolDef(pCpumCfg, "CMPXCHG16B", &fCmpXchg16b, false); AssertRCReturn(rc, rc); 858 858 859 /** @cfgm{/CPUM/MONITOR, boolean, true} 860 * Expose MONITOR/MWAIT instructions to the guest. 861 */ 859 862 bool fMonitor; 860 863 rc = CFGMR3QueryBoolDef(pCpumCfg, "MONITOR", &fMonitor, true); AssertRCReturn(rc, rc); … … 1193 1196 { 1194 1197 pCPUM->aGuestCpuIdStd[5].ecx = X86_CPUID_MWAIT_ECX_EXT | X86_CPUID_MWAIT_ECX_BREAKIRQIF0; 1195 /* @todo: for now we just expose host's MWAIT C-states, although conceptually1198 /** @todo: for now we just expose host's MWAIT C-states, although conceptually 1196 1199 it shall be part of our power management virtualization model */ 1197 1200 #if 0 … … 1294 1297 bool fNt4LeafLimit; 1295 1298 rc = CFGMR3QueryBoolDef(pCpumCfg, "NT4LeafLimit", &fNt4LeafLimit, false); AssertRCReturn(rc, rc); 1296 if (fNt4LeafLimit )1297 pCPUM->aGuestCpuIdStd[0].eax = 3; /** @todo r=bird: shouldn't we check if pCPUM->aGuestCpuIdStd[0].eax > 3 before setting it 3 here? */1299 if (fNt4LeafLimit && pCPUM->aGuestCpuIdStd[0].eax > 3) 1300 pCPUM->aGuestCpuIdStd[0].eax = 3; 1298 1301 1299 1302 /* … … 1353 1356 pCPUM->aGuestCpuIdHyper[1].ebx = pCPUM->aGuestCpuIdHyper[1].ecx 1354 1357 = pCPUM->aGuestCpuIdHyper[1].edx = 0; /* Reserved */ 1358 1359 /* 1360 * Mini CPU selection support for making Mac OS X happy. 1361 */ 1362 if (pCPUM->enmGuestCpuVendor == CPUMCPUVENDOR_INTEL) 1363 { 1364 /** @cfgm{/CPUM/MaxIntelFamilyModelStep, uint32_t, UINT32_MAX} 1365 * Restrict the reported CPU family+model+stepping of intel CPUs. This is 1366 * probably going to be a temporary hack, so don't depend on this. 1367 * The 1st byte of the value is the stepping, the 2nd byte value is the model 1368 * number and the 3rd byte value is the family, and the 4th value must be zero. 1369 */ 1370 uint32_t uMaxIntelFamilyModelStep; 1371 rc = CFGMR3QueryU32Def(pCpumCfg, "MaxIntelFamilyModelStep", &uMaxIntelFamilyModelStep, UINT32_MAX); 1372 AssertRCReturn(rc, rc); 1373 uint32_t uCurIntelFamilyModelStep = RT_MAKE_U32_FROM_U8(ASMGetCpuStepping(pCPUM->aGuestCpuIdStd[1].eax), 1374 ASMGetCpuModelIntel(pCPUM->aGuestCpuIdStd[1].eax), 1375 ASMGetCpuFamily(pCPUM->aGuestCpuIdStd[1].eax), 1376 0); 1377 if (uMaxIntelFamilyModelStep < uCurIntelFamilyModelStep) 1378 { 1379 uint32_t uNew = pCPUM->aGuestCpuIdStd[1].eax & UINT32_C(0xf0003000); 1380 uNew |= RT_BYTE1(uMaxIntelFamilyModelStep) & 0xf; /* stepping */ 1381 uNew |= (RT_BYTE2(uMaxIntelFamilyModelStep) & 0xf) << 4; /* 4 low model bits */ 1382 uNew |= (RT_BYTE2(uMaxIntelFamilyModelStep) >> 4) << 16; /* 4 high model bits */ 1383 uNew |= (RT_BYTE3(uMaxIntelFamilyModelStep) & 0xf) << 8; /* 4 low family bits */ 1384 if (RT_BYTE3(uMaxIntelFamilyModelStep) > 0xf) /* 8 high family bits, using intel's suggested calculation. */ 1385 uNew |= ( (RT_BYTE3(uMaxIntelFamilyModelStep) - (RT_BYTE3(uMaxIntelFamilyModelStep) & 0xf)) & 0xff ) << 20; 1386 LogRel(("CPU: CPUID(0).EAX %#x -> %#x (uMaxIntelFamilyModelStep=%#x, uCurIntelFamilyModelStep=%#x\n", 1387 pCPUM->aGuestCpuIdStd[1].eax, uNew, uMaxIntelFamilyModelStep, uCurIntelFamilyModelStep)); 1388 pCPUM->aGuestCpuIdStd[1].eax = uNew; 1389 } 1390 } 1355 1391 1356 1392 /*
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