VirtualBox

Changeset 49000 in vbox for trunk/src/VBox/VMM


Ignore:
Timestamp:
Oct 9, 2013 12:22:39 PM (12 years ago)
Author:
vboxsync
svn:sync-xref-src-repo-rev:
89723
Message:

VMM: IntrInfo to IntInfo renaming.

Location:
trunk/src/VBox/VMM
Files:
5 edited

Legend:

Unmodified
Added
Removed

  • trunk/src/VBox/VMM/VMMR0/HMSVMR0.cpp

    r48723 r49000  
    22292229    Assert(pEvent->n.u1Valid);
    22302230
    2231     pVCpu->hm.s.Event.u64IntrInfo       = pEvent->u;
     2231    pVCpu->hm.s.Event.u64IntInfo        = pEvent->u;
    22322232    pVCpu->hm.s.Event.fPending          = true;
    22332233    pVCpu->hm.s.Event.GCPtrFaultAddress = GCPtrFaultAddress;
    … …  
    23432343
    23442344    SVMEVENT Event;
    2345     Event.u = pVCpu->hm.s.Event.u64IntrInfo;
     2345    Event.u = pVCpu->hm.s.Event.u64IntInfo;
    23462346
    23472347    uint8_t uVector     = Event.n.u8Vector;
    … …  
    25372537    {
    25382538        SVMEVENT Event;
    2539         Event.u = pVCpu->hm.s.Event.u64IntrInfo;
     2539        Event.u = pVCpu->hm.s.Event.u64IntInfo;
    25402540        Assert(Event.n.u1Valid);
    25412541#ifdef VBOX_STRICT
    … …  
    37653765                {
    37663766                    enmReflect = SVMREFLECTXCPT_DF;
    3767                     Log4(("IDT: Pending vectoring #DF %#RX64 uIdtVector=%#x uExitVector=%#x\n", pVCpu->hm.s.Event.u64IntrInfo,
     3767                    Log4(("IDT: Pending vectoring #DF %#RX64 uIdtVector=%#x uExitVector=%#x\n", pVCpu->hm.s.Event.u64IntInfo,
    37683768                          uIdtVector, uExitVector));
    37693769                }
    … …  
    37713771                {
    37723772                    enmReflect = SVMREFLECTXCPT_TF;
    3773                     Log4(("IDT: Pending vectoring triple-fault %#RX64 uIdtVector=%#x uExitVector=%#x\n", pVCpu->hm.s.Event.u64IntrInfo,
    3774                           uIdtVector, uExitVector));
     3773                    Log4(("IDT: Pending vectoring triple-fault %#RX64 uIdtVector=%#x uExitVector=%#x\n",
     3774                          pVCpu->hm.s.Event.u64IntInfo, uIdtVector, uExitVector));
    37753775                }
    37763776                else
    … …  
    46544654    {
    46554655        /*
    4656          * AMD-V does not provide us with the original exception but we have it in u64IntrInfo since we
     4656         * AMD-V does not provide us with the original exception but we have it in u64IntInfo since we
    46574657         * injected the event during VM-entry. Software interrupts and exceptions will be regenerated
    46584658         * when the recompiler restarts the instruction.
    46594659         */
    46604660        SVMEVENT Event;
    4661         Event.u = pVCpu->hm.s.Event.u64IntrInfo;
     4661        Event.u = pVCpu->hm.s.Event.u64IntInfo;
    46624662        if (   Event.n.u3Type == SVM_EVENT_EXCEPTION
    46634663            || Event.n.u3Type == SVM_EVENT_SOFTWARE_INT)

  • trunk/src/VBox/VMM/VMMR0/HMVMXR0.cpp

    r48998 r49000  
    221221    uint16_t        u16Alignment0;
    222222    /** The VM-exit interruption error code. */
    223     uint32_t        uExitIntrErrorCode;
     223    uint32_t        uExitIntErrorCode;
    224224    /** The VM-exit exit qualification. */
    225225    uint64_t        uExitQualification;
    226226
    227227    /** The VM-exit interruption-information field. */
    228     uint32_t        uExitIntrInfo;
     228    uint32_t        uExitIntInfo;
    229229    /** The VM-exit instruction-length field. */
    230230    uint32_t        cbInstr;
    … …  
    252252
    253253    /** The VM-entry interruption-information field. */
    254     uint32_t        uEntryIntrInfo;
     254    uint32_t        uEntryIntInfo;
    255255    /** The VM-entry exception error code field. */
    256256    uint32_t        uEntryXcptErrorCode;
    … …  
    279279} VMXTRANSIENT;
    280280AssertCompileMemberAlignment(VMXTRANSIENT, uExitReason,             sizeof(uint64_t));
    281 AssertCompileMemberAlignment(VMXTRANSIENT, uExitIntrInfo,           sizeof(uint64_t));
    282 AssertCompileMemberAlignment(VMXTRANSIENT, uEntryIntrInfo,          sizeof(uint64_t));
     281AssertCompileMemberAlignment(VMXTRANSIENT, uExitIntInfo,            sizeof(uint64_t));
     282AssertCompileMemberAlignment(VMXTRANSIENT, uEntryIntInfo,           sizeof(uint64_t));
    283283AssertCompileMemberAlignment(VMXTRANSIENT, fWasGuestFPUStateActive, sizeof(uint64_t));
    284284AssertCompileMemberSize(VMXTRANSIENT, ExitInstrInfo, sizeof(uint32_t));
    … …  
    334334static void               hmR0VmxFlushVpid(PVM pVM, PVMCPU pVCpu, VMX_FLUSH_VPID enmFlush, RTGCPTR GCPtr);
    335335static void               hmR0VmxClearEventVmcs(PVMCPU pVCpu, PCPUMCTX pMixedCtx);
    336 static int                hmR0VmxInjectEventVmcs(PVMCPU pVCpu, PCPUMCTX pMixedCtx, uint64_t u64IntrInfo, uint32_t cbInstr,
    337                                                  uint32_t u32ErrCode, RTGCUINTREG GCPtrFaultAddress, uint32_t *puIntrState);
     336static int                hmR0VmxInjectEventVmcs(PVMCPU pVCpu, PCPUMCTX pMixedCtx, uint64_t u64IntInfo, uint32_t cbInstr,
     337                                                 uint32_t u32ErrCode, RTGCUINTREG GCPtrFaultAddress, uint32_t *puIntState);
    338338#if HC_ARCH_BITS == 32 && !defined(VBOX_WITH_HYBRID_32BIT_KERNEL)
    339339static int                hmR0VmxInitVmcsReadCache(PVM pVM, PVMCPU pVCpu);
    … …  
    547547 * @remarks No-long-jump zone!!!
    548548 */
    549 DECLINLINE(int) hmR0VmxReadEntryIntrInfoVmcs(PVMXTRANSIENT pVmxTransient)
    550 {
    551     int rc = VMXReadVmcs32(VMX_VMCS32_CTRL_ENTRY_INTERRUPTION_INFO, &pVmxTransient->uEntryIntrInfo);
     549DECLINLINE(int) hmR0VmxReadEntryIntInfoVmcs(PVMXTRANSIENT pVmxTransient)
     550{
     551    int rc = VMXReadVmcs32(VMX_VMCS32_CTRL_ENTRY_INTERRUPTION_INFO, &pVmxTransient->uEntryIntInfo);
    552552    AssertRCReturn(rc, rc);
    553553    return VINF_SUCCESS;
    … …  
    598598 * @param   pVmxTransient   Pointer to the VMX transient structure.
    599599 */
    600 DECLINLINE(int) hmR0VmxReadExitIntrInfoVmcs(PVMCPU pVCpu, PVMXTRANSIENT pVmxTransient)
     600DECLINLINE(int) hmR0VmxReadExitIntInfoVmcs(PVMCPU pVCpu, PVMXTRANSIENT pVmxTransient)
    601601{
    602602    if (!(pVmxTransient->fVmcsFieldsRead & HMVMX_UPDATED_TRANSIENT_EXIT_INTERRUPTION_INFO))
    603603    {
    604         int rc = VMXReadVmcs32(VMX_VMCS32_RO_EXIT_INTERRUPTION_INFO, &pVmxTransient->uExitIntrInfo);
     604        int rc = VMXReadVmcs32(VMX_VMCS32_RO_EXIT_INTERRUPTION_INFO, &pVmxTransient->uExitIntInfo);
    605605        AssertRCReturn(rc, rc);
    606606        pVmxTransient->fVmcsFieldsRead |= HMVMX_UPDATED_TRANSIENT_EXIT_INTERRUPTION_INFO;
    … …  
    618618 * @param   pVmxTransient   Pointer to the VMX transient structure.
    619619 */
    620 DECLINLINE(int) hmR0VmxReadExitIntrErrorCodeVmcs(PVMCPU pVCpu, PVMXTRANSIENT pVmxTransient)
     620DECLINLINE(int) hmR0VmxReadExitIntErrorCodeVmcs(PVMCPU pVCpu, PVMXTRANSIENT pVmxTransient)
    621621{
    622622    if (!(pVmxTransient->fVmcsFieldsRead & HMVMX_UPDATED_TRANSIENT_EXIT_INTERRUPTION_ERROR_CODE))
    623623    {
    624         int rc = VMXReadVmcs32(VMX_VMCS32_RO_EXIT_INTERRUPTION_ERROR_CODE, &pVmxTransient->uExitIntrErrorCode);
     624        int rc = VMXReadVmcs32(VMX_VMCS32_RO_EXIT_INTERRUPTION_ERROR_CODE, &pVmxTransient->uExitIntErrorCode);
    625625        AssertRCReturn(rc, rc);
    626626        pVmxTransient->fVmcsFieldsRead |= HMVMX_UPDATED_TRANSIENT_EXIT_INTERRUPTION_ERROR_CODE;
    … …  
    49874987 *
    49884988 * @param   pVCpu               Pointer to the VMCPU.
    4989  * @param   u32IntrInfo         The VM-entry interruption-information field.
     4989 * @param   u32IntInfo          The VM-entry interruption-information field.
    49904990 * @param   cbInstr             The VM-entry instruction length in bytes (for software
    49914991 *                              interrupts, exceptions and privileged software
    … …  
    49994999 *          always incremented.
    50005000 */
    5001 DECLINLINE(void) hmR0VmxSetPendingEvent(PVMCPU pVCpu, uint32_t u32IntrInfo, uint32_t cbInstr, uint32_t u32ErrCode,
     5001DECLINLINE(void) hmR0VmxSetPendingEvent(PVMCPU pVCpu, uint32_t u32IntInfo, uint32_t cbInstr, uint32_t u32ErrCode,
    50025002                                        RTGCUINTPTR GCPtrFaultAddress)
    50035003{
    50045004    Assert(!pVCpu->hm.s.Event.fPending);
    50055005    pVCpu->hm.s.Event.fPending          = true;
    5006     pVCpu->hm.s.Event.u64IntrInfo       = u32IntrInfo;
     5006    pVCpu->hm.s.Event.u64IntInfo        = u32IntInfo;
    50075007    pVCpu->hm.s.Event.u32ErrCode        = u32ErrCode;
    50085008    pVCpu->hm.s.Event.cbInstr           = cbInstr;
    … …  
    50235023DECLINLINE(void) hmR0VmxSetPendingXcptDF(PVMCPU pVCpu, PCPUMCTX pMixedCtx)
    50245024{
    5025     uint32_t u32IntrInfo = X86_XCPT_DF | VMX_EXIT_INTERRUPTION_INFO_VALID;
    5026     u32IntrInfo         |= (VMX_EXIT_INTERRUPTION_INFO_TYPE_HW_XCPT << VMX_EXIT_INTERRUPTION_INFO_TYPE_SHIFT);
    5027     u32IntrInfo         |= VMX_EXIT_INTERRUPTION_INFO_ERROR_CODE_VALID;
    5028     hmR0VmxSetPendingEvent(pVCpu, u32IntrInfo,  0 /* cbInstr */, 0 /* u32ErrCode */, 0 /* GCPtrFaultAddress */);
     5025    uint32_t u32IntInfo = X86_XCPT_DF | VMX_EXIT_INTERRUPTION_INFO_VALID;
     5026    u32IntInfo          |= (VMX_EXIT_INTERRUPTION_INFO_TYPE_HW_XCPT << VMX_EXIT_INTERRUPTION_INFO_TYPE_SHIFT);
     5027    u32IntInfo          |= VMX_EXIT_INTERRUPTION_INFO_ERROR_CODE_VALID;
     5028    hmR0VmxSetPendingEvent(pVCpu, u32IntInfo,  0 /* cbInstr */, 0 /* u32ErrCode */, 0 /* GCPtrFaultAddress */);
    50295029}
    50305030
    … …  
    50545054    if (VMX_IDT_VECTORING_INFO_VALID(pVmxTransient->uIdtVectoringInfo))
    50555055    {
    5056         rc = hmR0VmxReadExitIntrInfoVmcs(pVCpu, pVmxTransient);
     5056        rc = hmR0VmxReadExitIntInfoVmcs(pVCpu, pVmxTransient);
    50575057        AssertRCReturn(rc, rc);
    50585058
    50595059        uint32_t uIntType    = VMX_IDT_VECTORING_INFO_TYPE(pVmxTransient->uIdtVectoringInfo);
    5060         uint32_t uExitVector = VMX_EXIT_INTERRUPTION_INFO_VECTOR(pVmxTransient->uExitIntrInfo);
     5060        uint32_t uExitVector = VMX_EXIT_INTERRUPTION_INFO_VECTOR(pVmxTransient->uExitIntInfo);
    50615061        uint32_t uIdtVector  = VMX_IDT_VECTORING_INFO_VECTOR(pVmxTransient->uIdtVectoringInfo);
    50625062
    … …  
    50715071        /* See Intel spec. 30.7.1.1 "Reflecting Exceptions to Guest Software". */
    50725072        VMXREFLECTXCPT enmReflect = VMXREFLECTXCPT_NONE;
    5073         if (VMX_EXIT_INTERRUPTION_INFO_IS_VALID(pVmxTransient->uExitIntrInfo))
     5073        if (VMX_EXIT_INTERRUPTION_INFO_IS_VALID(pVmxTransient->uExitIntInfo))
    50745074        {
    50755075            if (uIntType == VMX_IDT_VECTORING_INFO_TYPE_HW_XCPT)
    … …  
    51425142
    51435143                /* If uExitVector is #PF, CR2 value will be updated from the VMCS if it's a guest #PF. See hmR0VmxExitXcptPF(). */
    5144                 hmR0VmxSetPendingEvent(pVCpu, VMX_ENTRY_INTR_INFO_FROM_EXIT_IDT_INFO(pVmxTransient->uIdtVectoringInfo),
     5144                hmR0VmxSetPendingEvent(pVCpu, VMX_ENTRY_INT_INFO_FROM_EXIT_IDT_INFO(pVmxTransient->uIdtVectoringInfo),
    51455145                                       0 /* cbInstr */,  u32ErrCode, pMixedCtx->cr2);
    51465146                rc = VINF_SUCCESS;
    51475147                Log4(("IDT: vcpu[%RU32] Pending vectoring event %#RX64 Err=%#RX32\n", pVCpu->idCpu,
    5148                       pVCpu->hm.s.Event.u64IntrInfo, pVCpu->hm.s.Event.u32ErrCode));
     5148                      pVCpu->hm.s.Event.u64IntInfo, pVCpu->hm.s.Event.u32ErrCode));
    51495149
    51505150                break;
    … …  
    51565156                rc = VINF_HM_DOUBLE_FAULT;
    51575157                Log4(("IDT: vcpu[%RU32] Pending vectoring #DF %#RX64 uIdtVector=%#x uExitVector=%#x\n", pVCpu->idCpu,
    5158                       pVCpu->hm.s.Event.u64IntrInfo, uIdtVector, uExitVector));
     5158                      pVCpu->hm.s.Event.u64IntInfo, uIdtVector, uExitVector));
    51595159
    51605160                break;
    … …  
    60666066    AssertRC(rc);
    60676067
    6068     /* Refer Intel spec. 24.8.3 "VM-entry Controls for Event Injection" for the format of u32IntrInfo. */
    6069     uint32_t u32IntrInfo = uVector | VMX_EXIT_INTERRUPTION_INFO_VALID;
     6068    /* Refer Intel spec. 24.8.3 "VM-entry Controls for Event Injection" for the format of u32IntInfo. */
     6069    uint32_t u32IntInfo = uVector | VMX_EXIT_INTERRUPTION_INFO_VALID;
    60706070    if (enmTrpmEvent == TRPM_TRAP)
    60716071    {
    … …  
    60746074            case X86_XCPT_BP:
    60756075            case X86_XCPT_OF:
    6076                 u32IntrInfo |= (VMX_EXIT_INTERRUPTION_INFO_TYPE_SW_XCPT << VMX_EXIT_INTERRUPTION_INFO_TYPE_SHIFT);
     6076                u32IntInfo |= (VMX_EXIT_INTERRUPTION_INFO_TYPE_SW_XCPT << VMX_EXIT_INTERRUPTION_INFO_TYPE_SHIFT);
    60776077                break;
    60786078
    … …  
    60846084            case X86_XCPT_GP:
    60856085            case X86_XCPT_AC:
    6086                 u32IntrInfo |= VMX_EXIT_INTERRUPTION_INFO_ERROR_CODE_VALID;
     6086                u32IntInfo |= VMX_EXIT_INTERRUPTION_INFO_ERROR_CODE_VALID;
    60876087                /* no break! */
    60886088            default:
    6089                 u32IntrInfo |= (VMX_EXIT_INTERRUPTION_INFO_TYPE_HW_XCPT << VMX_EXIT_INTERRUPTION_INFO_TYPE_SHIFT);
     6089                u32IntInfo |= (VMX_EXIT_INTERRUPTION_INFO_TYPE_HW_XCPT << VMX_EXIT_INTERRUPTION_INFO_TYPE_SHIFT);
    60906090                break;
    60916091        }
    … …  
    60946094    {
    60956095        if (uVector == X86_XCPT_NMI)
    6096             u32IntrInfo |= (VMX_EXIT_INTERRUPTION_INFO_TYPE_NMI << VMX_EXIT_INTERRUPTION_INFO_TYPE_SHIFT);
     6096            u32IntInfo |= (VMX_EXIT_INTERRUPTION_INFO_TYPE_NMI << VMX_EXIT_INTERRUPTION_INFO_TYPE_SHIFT);
    60976097        else
    6098             u32IntrInfo |= (VMX_EXIT_INTERRUPTION_INFO_TYPE_EXT_INT << VMX_EXIT_INTERRUPTION_INFO_TYPE_SHIFT);
     6098            u32IntInfo |= (VMX_EXIT_INTERRUPTION_INFO_TYPE_EXT_INT << VMX_EXIT_INTERRUPTION_INFO_TYPE_SHIFT);
    60996099    }
    61006100    else if (enmTrpmEvent == TRPM_SOFTWARE_INT)
    6101         u32IntrInfo |= (VMX_EXIT_INTERRUPTION_INFO_TYPE_SW_INT << VMX_EXIT_INTERRUPTION_INFO_TYPE_SHIFT);
     6101        u32IntInfo |= (VMX_EXIT_INTERRUPTION_INFO_TYPE_SW_INT << VMX_EXIT_INTERRUPTION_INFO_TYPE_SHIFT);
    61026102    else
    61036103        AssertMsgFailed(("Invalid TRPM event type %d\n", enmTrpmEvent));
    … …  
    61056105    rc = TRPMResetTrap(pVCpu);
    61066106    AssertRC(rc);
    6107     Log4(("TRPM->HM event: u32IntrInfo=%#RX32 enmTrpmEvent=%d cbInstr=%u uErrCode=%#RX32 GCPtrFaultAddress=%#RGv\n",
    6108          u32IntrInfo, enmTrpmEvent, cbInstr, uErrCode, GCPtrFaultAddress));
    6109 
    6110     hmR0VmxSetPendingEvent(pVCpu, u32IntrInfo, cbInstr, uErrCode, GCPtrFaultAddress);
     6107    Log4(("TRPM->HM event: u32IntInfo=%#RX32 enmTrpmEvent=%d cbInstr=%u uErrCode=%#RX32 GCPtrFaultAddress=%#RGv\n",
     6108         u32IntInfo, enmTrpmEvent, cbInstr, uErrCode, GCPtrFaultAddress));
     6109
     6110    hmR0VmxSetPendingEvent(pVCpu, u32IntInfo, cbInstr, uErrCode, GCPtrFaultAddress);
    61116111    STAM_COUNTER_DEC(&pVCpu->hm.s.StatInjectPendingReflect);
    61126112}
    … …  
    61236123    Assert(pVCpu->hm.s.Event.fPending);
    61246124
    6125     uint32_t uVectorType     = VMX_IDT_VECTORING_INFO_TYPE(pVCpu->hm.s.Event.u64IntrInfo);
    6126     uint32_t uVector         = VMX_IDT_VECTORING_INFO_VECTOR(pVCpu->hm.s.Event.u64IntrInfo);
    6127     bool     fErrorCodeValid = !!VMX_IDT_VECTORING_INFO_ERROR_CODE_IS_VALID(pVCpu->hm.s.Event.u64IntrInfo);
     6125    uint32_t uVectorType     = VMX_IDT_VECTORING_INFO_TYPE(pVCpu->hm.s.Event.u64IntInfo);
     6126    uint32_t uVector         = VMX_IDT_VECTORING_INFO_VECTOR(pVCpu->hm.s.Event.u64IntInfo);
     6127    bool     fErrorCodeValid = !!VMX_IDT_VECTORING_INFO_ERROR_CODE_IS_VALID(pVCpu->hm.s.Event.u64IntInfo);
    61286128    uint32_t uErrorCode      = pVCpu->hm.s.Event.u32ErrCode;
    61296129
    … …  
    65496549            /* On some CPUs block-by-STI also blocks NMIs. See Intel spec. 26.3.1.5 "Checks On Guest Non-Register State". */
    65506550            Log4(("Pending NMI vcpu[%RU32]\n", pVCpu->idCpu));
    6551             uint32_t u32IntrInfo = X86_XCPT_NMI | VMX_EXIT_INTERRUPTION_INFO_VALID;
    6552             u32IntrInfo         |= (VMX_EXIT_INTERRUPTION_INFO_TYPE_NMI << VMX_EXIT_INTERRUPTION_INFO_TYPE_SHIFT);
    6553 
    6554             hmR0VmxSetPendingEvent(pVCpu, u32IntrInfo, 0 /* cbInstr */, 0 /* u32ErrCode */, 0 /* GCPtrFaultAddres */);
     6551            uint32_t u32IntInfo = X86_XCPT_NMI | VMX_EXIT_INTERRUPTION_INFO_VALID;
     6552            u32IntInfo         |= (VMX_EXIT_INTERRUPTION_INFO_TYPE_NMI << VMX_EXIT_INTERRUPTION_INFO_TYPE_SHIFT);
     6553
     6554            hmR0VmxSetPendingEvent(pVCpu, u32IntInfo, 0 /* cbInstr */, 0 /* u32ErrCode */, 0 /* GCPtrFaultAddres */);
    65556555            VMCPU_FF_CLEAR(pVCpu, VMCPU_FF_INTERRUPT_NMI);
    65566556        }
    … …  
    65786578            {
    65796579                Log4(("Pending interrupt vcpu[%RU32] u8Interrupt=%#x \n", pVCpu->idCpu, u8Interrupt));
    6580                 uint32_t u32IntrInfo = u8Interrupt | VMX_EXIT_INTERRUPTION_INFO_VALID;
    6581                 u32IntrInfo         |= (VMX_EXIT_INTERRUPTION_INFO_TYPE_EXT_INT << VMX_EXIT_INTERRUPTION_INFO_TYPE_SHIFT);
    6582 
    6583                 hmR0VmxSetPendingEvent(pVCpu, u32IntrInfo, 0 /* cbInstr */, 0 /* u32ErrCode */, 0 /* GCPtrfaultAddress */);
     6580                uint32_t u32IntInfo = u8Interrupt | VMX_EXIT_INTERRUPTION_INFO_VALID;
     6581                u32IntInfo         |= (VMX_EXIT_INTERRUPTION_INFO_TYPE_EXT_INT << VMX_EXIT_INTERRUPTION_INFO_TYPE_SHIFT);
     6582
     6583                hmR0VmxSetPendingEvent(pVCpu, u32IntInfo, 0 /* cbInstr */, 0 /* u32ErrCode */, 0 /* GCPtrfaultAddress */);
    65846584            }
    65856585            else
    … …  
    66266626    {
    66276627#if defined(VBOX_STRICT) || defined(VBOX_WITH_STATISTICS)
    6628         uint32_t uIntrType = VMX_EXIT_INTERRUPTION_INFO_TYPE(pVCpu->hm.s.Event.u64IntrInfo);
    6629         if (uIntrType == VMX_EXIT_INTERRUPTION_INFO_TYPE_EXT_INT)
     6628        uint32_t uIntType = VMX_EXIT_INTERRUPTION_INFO_TYPE(pVCpu->hm.s.Event.u64IntInfo);
     6629        if (uIntType == VMX_EXIT_INTERRUPTION_INFO_TYPE_EXT_INT)
    66306630        {
    66316631            rc = hmR0VmxSaveGuestRflags(pVCpu, pMixedCtx);
    … …  
    66366636            Assert(!fBlockMovSS);
    66376637        }
    6638         else if (uIntrType == VMX_EXIT_INTERRUPTION_INFO_TYPE_NMI)
     6638        else if (uIntType == VMX_EXIT_INTERRUPTION_INFO_TYPE_NMI)
    66396639        {
    66406640            Assert(!fBlockSti);
    … …  
    66426642        }
    66436643#endif
    6644         Log4(("Injecting pending event vcpu[%RU32] u64IntrInfo=%#RX64\n", pVCpu->idCpu, pVCpu->hm.s.Event.u64IntrInfo));
    6645         rc = hmR0VmxInjectEventVmcs(pVCpu, pMixedCtx, pVCpu->hm.s.Event.u64IntrInfo, pVCpu->hm.s.Event.cbInstr,
     6644        Log4(("Injecting pending event vcpu[%RU32] u64IntInfo=%#RX64\n", pVCpu->idCpu, pVCpu->hm.s.Event.u64IntInfo));
     6645        rc = hmR0VmxInjectEventVmcs(pVCpu, pMixedCtx, pVCpu->hm.s.Event.u64IntInfo, pVCpu->hm.s.Event.cbInstr,
    66466646                                    pVCpu->hm.s.Event.u32ErrCode, pVCpu->hm.s.Event.GCPtrFaultAddress, &uIntrState);
    66476647        AssertRCReturn(rc, rc);
    … …  
    66536653
    66546654#ifdef VBOX_WITH_STATISTICS
    6655         if (uIntrType == VMX_EXIT_INTERRUPTION_INFO_TYPE_EXT_INT)
     6655        if (uIntType == VMX_EXIT_INTERRUPTION_INFO_TYPE_EXT_INT)
    66566656            STAM_COUNTER_INC(&pVCpu->hm.s.StatInjectInterrupt);
    66576657        else
    … …  
    67096709DECLINLINE(void) hmR0VmxSetPendingXcptUD(PVMCPU pVCpu, PCPUMCTX pMixedCtx)
    67106710{
    6711     uint32_t u32IntrInfo = X86_XCPT_UD | VMX_EXIT_INTERRUPTION_INFO_VALID;
    6712     hmR0VmxSetPendingEvent(pVCpu, u32IntrInfo, 0 /* cbInstr */, 0 /* u32ErrCode */, 0 /* GCPtrFaultAddress */);
     6711    uint32_t u32IntInfo = X86_XCPT_UD | VMX_EXIT_INTERRUPTION_INFO_VALID;
     6712    hmR0VmxSetPendingEvent(pVCpu, u32IntInfo, 0 /* cbInstr */, 0 /* u32ErrCode */, 0 /* GCPtrFaultAddress */);
    67136713}
    67146714
    … …  
    67256725DECLINLINE(int) hmR0VmxInjectXcptDF(PVMCPU pVCpu, PCPUMCTX pMixedCtx, uint32_t *puIntrState)
    67266726{
    6727     uint32_t u32IntrInfo = X86_XCPT_DF | VMX_EXIT_INTERRUPTION_INFO_VALID;
    6728     u32IntrInfo         |= (VMX_EXIT_INTERRUPTION_INFO_TYPE_HW_XCPT << VMX_EXIT_INTERRUPTION_INFO_TYPE_SHIFT);
    6729     u32IntrInfo         |= VMX_EXIT_INTERRUPTION_INFO_ERROR_CODE_VALID;
    6730     return hmR0VmxInjectEventVmcs(pVCpu, pMixedCtx, u32IntrInfo, 0 /* cbInstr */, 0 /* u32ErrCode */, 0 /* GCPtrFaultAddress */,
     6727    uint32_t u32IntInfo = X86_XCPT_DF | VMX_EXIT_INTERRUPTION_INFO_VALID;
     6728    u32IntInfo          |= (VMX_EXIT_INTERRUPTION_INFO_TYPE_HW_XCPT << VMX_EXIT_INTERRUPTION_INFO_TYPE_SHIFT);
     6729    u32IntInfo          |= VMX_EXIT_INTERRUPTION_INFO_ERROR_CODE_VALID;
     6730    return hmR0VmxInjectEventVmcs(pVCpu, pMixedCtx, u32IntInfo, 0 /* cbInstr */, 0 /* u32ErrCode */, 0 /* GCPtrFaultAddress */,
    67316731                                  puIntrState);
    67326732}
    … …  
    67436743DECLINLINE(void) hmR0VmxSetPendingXcptDB(PVMCPU pVCpu, PCPUMCTX pMixedCtx)
    67446744{
    6745     uint32_t u32IntrInfo = X86_XCPT_DB | VMX_EXIT_INTERRUPTION_INFO_VALID;
    6746     u32IntrInfo         |= (VMX_EXIT_INTERRUPTION_INFO_TYPE_HW_XCPT << VMX_EXIT_INTERRUPTION_INFO_TYPE_SHIFT);
    6747     hmR0VmxSetPendingEvent(pVCpu, u32IntrInfo, 0 /* cbInstr */, 0 /* u32ErrCode */, 0 /* GCPtrFaultAddress */);
     6745    uint32_t u32IntInfo = X86_XCPT_DB | VMX_EXIT_INTERRUPTION_INFO_VALID;
     6746    u32IntInfo          |= (VMX_EXIT_INTERRUPTION_INFO_TYPE_HW_XCPT << VMX_EXIT_INTERRUPTION_INFO_TYPE_SHIFT);
     6747    hmR0VmxSetPendingEvent(pVCpu, u32IntInfo, 0 /* cbInstr */, 0 /* u32ErrCode */, 0 /* GCPtrFaultAddress */);
    67486748}
    67496749
    … …  
    67616761DECLINLINE(void) hmR0VmxSetPendingXcptOF(PVMCPU pVCpu, PCPUMCTX pMixedCtx, uint32_t cbInstr)
    67626762{
    6763     uint32_t u32IntrInfo = X86_XCPT_OF | VMX_EXIT_INTERRUPTION_INFO_VALID;
    6764     u32IntrInfo         |= (VMX_EXIT_INTERRUPTION_INFO_TYPE_SW_INT << VMX_EXIT_INTERRUPTION_INFO_TYPE_SHIFT);
    6765     hmR0VmxSetPendingEvent(pVCpu, u32IntrInfo, cbInstr, 0 /* u32ErrCode */, 0 /* GCPtrFaultAddress */);
     6763    uint32_t u32IntInfo = X86_XCPT_OF | VMX_EXIT_INTERRUPTION_INFO_VALID;
     6764    u32IntInfo          |= (VMX_EXIT_INTERRUPTION_INFO_TYPE_SW_INT << VMX_EXIT_INTERRUPTION_INFO_TYPE_SHIFT);
     6765    hmR0VmxSetPendingEvent(pVCpu, u32IntInfo, cbInstr, 0 /* u32ErrCode */, 0 /* GCPtrFaultAddress */);
    67666766}
    67676767
    … …  
    67806780                                    uint32_t *puIntrState)
    67816781{
    6782     uint32_t u32IntrInfo = X86_XCPT_GP | VMX_EXIT_INTERRUPTION_INFO_VALID;
    6783     u32IntrInfo         |= (VMX_EXIT_INTERRUPTION_INFO_TYPE_HW_XCPT << VMX_EXIT_INTERRUPTION_INFO_TYPE_SHIFT);
     6782    uint32_t u32IntInfo = X86_XCPT_GP | VMX_EXIT_INTERRUPTION_INFO_VALID;
     6783    u32IntInfo          |= (VMX_EXIT_INTERRUPTION_INFO_TYPE_HW_XCPT << VMX_EXIT_INTERRUPTION_INFO_TYPE_SHIFT);
    67846784    if (fErrorCodeValid)
    6785         u32IntrInfo |= VMX_EXIT_INTERRUPTION_INFO_ERROR_CODE_VALID;
    6786     return hmR0VmxInjectEventVmcs(pVCpu, pMixedCtx, u32IntrInfo, 0 /* cbInstr */, u32ErrorCode, 0 /* GCPtrFaultAddress */,
     6785        u32IntInfo |= VMX_EXIT_INTERRUPTION_INFO_ERROR_CODE_VALID;
     6786    return hmR0VmxInjectEventVmcs(pVCpu, pMixedCtx, u32IntInfo, 0 /* cbInstr */, u32ErrorCode, 0 /* GCPtrFaultAddress */,
    67876787                                  puIntrState);
    67886788}
    … …  
    68026802DECLINLINE(void) hmR0VmxSetPendingIntN(PVMCPU pVCpu, PCPUMCTX pMixedCtx, uint16_t uVector, uint32_t cbInstr)
    68036803{
    6804     uint32_t u32IntrInfo = uVector | VMX_EXIT_INTERRUPTION_INFO_VALID;
     6804    uint32_t u32IntInfo = uVector | VMX_EXIT_INTERRUPTION_INFO_VALID;
    68056805    if (   uVector == X86_XCPT_BP
    68066806        || uVector == X86_XCPT_OF)
    68076807    {
    6808         u32IntrInfo |= (VMX_EXIT_INTERRUPTION_INFO_TYPE_SW_XCPT << VMX_EXIT_INTERRUPTION_INFO_TYPE_SHIFT);
     6808        u32IntInfo |= (VMX_EXIT_INTERRUPTION_INFO_TYPE_SW_XCPT << VMX_EXIT_INTERRUPTION_INFO_TYPE_SHIFT);
    68096809    }
    68106810    else
    6811         u32IntrInfo |= (VMX_EXIT_INTERRUPTION_INFO_TYPE_SW_INT << VMX_EXIT_INTERRUPTION_INFO_TYPE_SHIFT);
    6812     hmR0VmxSetPendingEvent(pVCpu, u32IntrInfo, cbInstr, 0 /* u32ErrCode */, 0 /* GCPtrFaultAddress */);
     6811        u32IntInfo |= (VMX_EXIT_INTERRUPTION_INFO_TYPE_SW_INT << VMX_EXIT_INTERRUPTION_INFO_TYPE_SHIFT);
     6812    hmR0VmxSetPendingEvent(pVCpu, u32IntInfo, cbInstr, 0 /* u32ErrCode */, 0 /* GCPtrFaultAddress */);
    68136813}
    68146814
    … …  
    68526852 *                              be out-of-sync. Make sure to update the required
    68536853 *                              fields before using them.
    6854  * @param   u64IntrInfo         The VM-entry interruption-information field.
     6854 * @param   u64IntInfo          The VM-entry interruption-information field.
    68556855 * @param   cbInstr             The VM-entry instruction length in bytes (for
    68566856 *                              software interrupts, exceptions and privileged
    … …  
    68656865 * @remarks No-long-jump zone!!!
    68666866 */
    6867 static int hmR0VmxInjectEventVmcs(PVMCPU pVCpu, PCPUMCTX pMixedCtx, uint64_t u64IntrInfo, uint32_t cbInstr,
     6867static int hmR0VmxInjectEventVmcs(PVMCPU pVCpu, PCPUMCTX pMixedCtx, uint64_t u64IntInfo, uint32_t cbInstr,
    68686868                                  uint32_t u32ErrCode, RTGCUINTREG GCPtrFaultAddress, uint32_t *puIntrState)
    68696869{
    68706870    /* Intel spec. 24.8.3 "VM-Entry Controls for Event Injection" specifies the interruption-information field to be 32-bits. */
    6871     AssertMsg(u64IntrInfo >> 32 == 0, ("%#RX64\n", u64IntrInfo));
     6871    AssertMsg(u64IntInfo >> 32 == 0, ("%#RX64\n", u64IntInfo));
    68726872    Assert(puIntrState);
    6873     uint32_t u32IntrInfo = (uint32_t)u64IntrInfo;
    6874 
    6875     const uint32_t uVector   = VMX_EXIT_INTERRUPTION_INFO_VECTOR(u32IntrInfo);
    6876     const uint32_t uIntrType = VMX_EXIT_INTERRUPTION_INFO_TYPE(u32IntrInfo);
     6873    uint32_t u32IntInfo = (uint32_t)u64IntInfo;
     6874
     6875    const uint32_t uVector  = VMX_EXIT_INTERRUPTION_INFO_VECTOR(u32IntInfo);
     6876    const uint32_t uIntType = VMX_EXIT_INTERRUPTION_INFO_TYPE(u32IntInfo);
    68776877
    68786878#ifdef VBOX_STRICT
    68796879    /* Validate the error-code-valid bit for hardware exceptions. */
    6880     if (uIntrType == VMX_EXIT_INTERRUPTION_INFO_TYPE_HW_XCPT)
     6880    if (uIntType == VMX_EXIT_INTERRUPTION_INFO_TYPE_HW_XCPT)
    68816881    {
    68826882        switch (uVector)
    … …  
    68896889            case X86_XCPT_GP:
    68906890            case X86_XCPT_AC:
    6891                 AssertMsg(VMX_EXIT_INTERRUPTION_INFO_ERROR_CODE_IS_VALID(u32IntrInfo),
     6891                AssertMsg(VMX_EXIT_INTERRUPTION_INFO_ERROR_CODE_IS_VALID(u32IntInfo),
    68926892                          ("Error-code-valid bit not set for exception that has an error code uVector=%#x\n", uVector));
    68936893                /* fallthru */
    … …  
    68996899
    69006900    /* Cannot inject an NMI when block-by-MOV SS is in effect. */
    6901     Assert(   uIntrType != VMX_EXIT_INTERRUPTION_INFO_TYPE_NMI
     6901    Assert(   uIntType != VMX_EXIT_INTERRUPTION_INFO_TYPE_NMI
    69026902           || !(*puIntrState & VMX_VMCS_GUEST_INTERRUPTIBILITY_STATE_BLOCK_MOVSS));
    69036903
    … …  
    69496949            /* Software exceptions (#BP and #OF exceptions thrown as a result of INT3 or INTO) */
    69506950            uint16_t uGuestIp = pMixedCtx->ip;
    6951             if (uIntrType == VMX_EXIT_INTERRUPTION_INFO_TYPE_SW_XCPT)
     6951            if (uIntType == VMX_EXIT_INTERRUPTION_INFO_TYPE_SW_XCPT)
    69526952            {
    69536953                Assert(uVector == X86_XCPT_BP || uVector == X86_XCPT_OF);
    … …  
    69556955                uGuestIp = pMixedCtx->ip + (uint16_t)cbInstr;
    69566956            }
    6957             else if (uIntrType == VMX_EXIT_INTERRUPTION_INFO_TYPE_SW_INT)
     6957            else if (uIntType == VMX_EXIT_INTERRUPTION_INFO_TYPE_SW_INT)
    69586958                uGuestIp = pMixedCtx->ip + (uint16_t)cbInstr;
    69596959
    … …  
    69776977                pMixedCtx->cs.Sel      = IdtEntry.uSel;
    69786978                pMixedCtx->cs.u64Base  = IdtEntry.uSel << cbIdtEntry;
    6979                 if (   uIntrType == VMX_EXIT_INTERRUPTION_INFO_TYPE_HW_XCPT
    6980                     && uVector   == X86_XCPT_PF)
     6979                if (   uIntType == VMX_EXIT_INTERRUPTION_INFO_TYPE_HW_XCPT
     6980                    && uVector  == X86_XCPT_PF)
    69816981                {
    69826982                    pMixedCtx->cr2 = GCPtrFaultAddress;
    … …  
    69936993                if (*puIntrState & VMX_VMCS_GUEST_INTERRUPTIBILITY_STATE_BLOCK_STI)
    69946994                {
    6995                     Assert(   uIntrType != VMX_EXIT_INTERRUPTION_INFO_TYPE_NMI
    6996                            && uIntrType != VMX_EXIT_INTERRUPTION_INFO_TYPE_EXT_INT);
     6995                    Assert(   uIntType != VMX_EXIT_INTERRUPTION_INFO_TYPE_NMI
     6996                           && uIntType != VMX_EXIT_INTERRUPTION_INFO_TYPE_EXT_INT);
    69976997                    Log4(("Clearing inhibition due to STI.\n"));
    69986998                    *puIntrState &= ~VMX_VMCS_GUEST_INTERRUPTIBILITY_STATE_BLOCK_STI;
    69996999                }
    7000                 Log4(("Injecting real-mode: u32IntrInfo=%#x u32ErrCode=%#x instrlen=%#x\n", u32IntrInfo, u32ErrCode, cbInstr));
     7000                Log4(("Injecting real-mode: u32IntInfo=%#x u32ErrCode=%#x instrlen=%#x\n", u32IntInfo, u32ErrCode, cbInstr));
    70017001
    70027002                /* The event has been truly dispatched. Mark it as no longer pending so we don't attempt to 'undo'
    … …  
    70137013             * See Intel spec. 26.2.1.3 "VM-Entry Control Fields".
    70147014             */
    7015             u32IntrInfo &= ~VMX_EXIT_INTERRUPTION_INFO_ERROR_CODE_VALID;
     7015            u32IntInfo &= ~VMX_EXIT_INTERRUPTION_INFO_ERROR_CODE_VALID;
    70167016        }
    70177017    }
    70187018
    70197019    /* Validate. */
    7020     Assert(VMX_EXIT_INTERRUPTION_INFO_IS_VALID(u32IntrInfo));       /* Bit 31 (Valid bit) must be set by caller. */
    7021     Assert(!VMX_EXIT_INTERRUPTION_INFO_NMI_UNBLOCK(u32IntrInfo));   /* Bit 12 MBZ. */
    7022     Assert(!(u32IntrInfo & 0x7ffff000));                            /* Bits 30:12 MBZ. */
     7020    Assert(VMX_EXIT_INTERRUPTION_INFO_IS_VALID(u32IntInfo));        /* Bit 31 (Valid bit) must be set by caller. */
     7021    Assert(!VMX_EXIT_INTERRUPTION_INFO_NMI_UNBLOCK(u32IntInfo));    /* Bit 12 MBZ. */
     7022    Assert(!(u32IntInfo & 0x7ffff000));                             /* Bits 30:12 MBZ. */
    70237023
    70247024    /* Inject. */
    7025     rc = VMXWriteVmcs32(VMX_VMCS32_CTRL_ENTRY_INTERRUPTION_INFO, u32IntrInfo);
    7026     if (VMX_EXIT_INTERRUPTION_INFO_ERROR_CODE_IS_VALID(u32IntrInfo))
     7025    rc = VMXWriteVmcs32(VMX_VMCS32_CTRL_ENTRY_INTERRUPTION_INFO, u32IntInfo);
     7026    if (VMX_EXIT_INTERRUPTION_INFO_ERROR_CODE_IS_VALID(u32IntInfo))
    70277027        rc |= VMXWriteVmcs32(VMX_VMCS32_CTRL_ENTRY_EXCEPTION_ERRCODE, u32ErrCode);
    70287028    rc |= VMXWriteVmcs32(VMX_VMCS32_CTRL_ENTRY_INSTR_LENGTH, cbInstr);
    70297029
    7030     if (   VMX_EXIT_INTERRUPTION_INFO_TYPE(u32IntrInfo) == VMX_EXIT_INTERRUPTION_INFO_TYPE_HW_XCPT
     7030    if (   VMX_EXIT_INTERRUPTION_INFO_TYPE(u32IntInfo) == VMX_EXIT_INTERRUPTION_INFO_TYPE_HW_XCPT
    70317031        && uVector == X86_XCPT_PF)
    70327032    {
    … …  
    70347034    }
    70357035
    7036     Log4(("Injecting vcpu[%RU32] u32IntrInfo=%#x u32ErrCode=%#x cbInstr=%#x pMixedCtx->uCR2=%#RX64\n", pVCpu->idCpu,
    7037           u32IntrInfo, u32ErrCode, cbInstr, pMixedCtx->cr2));
     7036    Log4(("Injecting vcpu[%RU32] u32IntInfo=%#x u32ErrCode=%#x cbInstr=%#x pMixedCtx->uCR2=%#RX64\n", pVCpu->idCpu,
     7037          u32IntInfo, u32ErrCode, cbInstr, pMixedCtx->cr2));
    70387038
    70397039    AssertRCReturn(rc, rc);
    … …  
    77657765    uint32_t uExitReason;
    77667766    int rc  = VMXReadVmcs32(VMX_VMCS32_RO_EXIT_REASON, &uExitReason);
    7767     rc     |= hmR0VmxReadEntryIntrInfoVmcs(pVmxTransient);
     7767    rc     |= hmR0VmxReadEntryIntInfoVmcs(pVmxTransient);
    77687768    AssertRC(rc);
    77697769    pVmxTransient->uExitReason    = (uint16_t)VMX_EXIT_REASON_BASIC(uExitReason);
    7770     pVmxTransient->fVMEntryFailed = !!VMX_ENTRY_INTERRUPTION_INFO_VALID(pVmxTransient->uEntryIntrInfo);
     7770    pVmxTransient->fVMEntryFailed = !!VMX_ENTRY_INTERRUPTION_INFO_VALID(pVmxTransient->uEntryIntInfo);
    77717771
    77727772    /* If the VMLAUNCH/VMRESUME failed, we can bail out early. This does -not- cover VMX_EXIT_ERR_*. */
    … …  
    87748774    STAM_PROFILE_ADV_START(&pVCpu->hm.s.StatExitXcptNmi, y3);
    87758775
    8776     int rc = hmR0VmxReadExitIntrInfoVmcs(pVCpu, pVmxTransient);
     8776    int rc = hmR0VmxReadExitIntInfoVmcs(pVCpu, pVmxTransient);
    87778777    AssertRCReturn(rc, rc);
    87788778
    8779     uint32_t uIntrType = VMX_EXIT_INTERRUPTION_INFO_TYPE(pVmxTransient->uExitIntrInfo);
     8779    uint32_t uIntType = VMX_EXIT_INTERRUPTION_INFO_TYPE(pVmxTransient->uExitIntInfo);
    87808780    Assert(   !(pVCpu->hm.s.vmx.u32ExitCtls & VMX_VMCS_CTRL_EXIT_ACK_EXT_INT)
    8781            && uIntrType != VMX_EXIT_INTERRUPTION_INFO_TYPE_EXT_INT);
    8782     Assert(VMX_EXIT_INTERRUPTION_INFO_IS_VALID(pVmxTransient->uExitIntrInfo));
    8783 
    8784     if (uIntrType == VMX_EXIT_INTERRUPTION_INFO_TYPE_NMI)
     8781           && uIntType != VMX_EXIT_INTERRUPTION_INFO_TYPE_EXT_INT);
     8782    Assert(VMX_EXIT_INTERRUPTION_INFO_IS_VALID(pVmxTransient->uExitIntInfo));
     8783
     8784    if (uIntType == VMX_EXIT_INTERRUPTION_INFO_TYPE_NMI)
    87858785    {
    87868786        /*
    … …  
    88108810    }
    88118811
    8812     uint32_t uExitIntrInfo = pVmxTransient->uExitIntrInfo;
    8813     uint32_t uVector       = VMX_EXIT_INTERRUPTION_INFO_VECTOR(uExitIntrInfo);
    8814     switch (uIntrType)
     8812    uint32_t uExitIntInfo = pVmxTransient->uExitIntInfo;
     8813    uint32_t uVector       = VMX_EXIT_INTERRUPTION_INFO_VECTOR(uExitIntInfo);
     8814    switch (uIntType)
    88158815    {
    88168816        case VMX_EXIT_INTERRUPTION_INFO_TYPE_SW_XCPT:   /* Software exception. (#BP or #OF) */
    … …  
    88528852
    88538853                        rc  = hmR0VmxReadExitInstrLenVmcs(pVCpu, pVmxTransient);
    8854                         rc |= hmR0VmxReadExitIntrErrorCodeVmcs(pVCpu, pVmxTransient);
     8854                        rc |= hmR0VmxReadExitIntErrorCodeVmcs(pVCpu, pVmxTransient);
    88558855                        AssertRCReturn(rc, rc);
    8856                         hmR0VmxSetPendingEvent(pVCpu, VMX_VMCS_CTRL_ENTRY_IRQ_INFO_FROM_EXIT_INT_INFO(uExitIntrInfo),
    8857                                                pVmxTransient->cbInstr, pVmxTransient->uExitIntrErrorCode,
     8856                        hmR0VmxSetPendingEvent(pVCpu, VMX_VMCS_CTRL_ENTRY_IRQ_INFO_FROM_EXIT_INT_INFO(uExitIntInfo),
     8857                                               pVmxTransient->cbInstr, pVmxTransient->uExitIntErrorCode,
    88588858                                               0 /* GCPtrFaultAddress */);
    88598859                        AssertRCReturn(rc, rc);
    … …  
    88738873        default:
    88748874        {
    8875             pVCpu->hm.s.u32HMError = uExitIntrInfo;
     8875            pVCpu->hm.s.u32HMError = uExitIntInfo;
    88768876            rc = VERR_VMX_UNEXPECTED_INTERRUPTION_EXIT_TYPE;
    8877             AssertMsgFailed(("Unexpected interruption info %#x\n", VMX_EXIT_INTERRUPTION_INFO_TYPE(uExitIntrInfo)));
     8877            AssertMsgFailed(("Unexpected interruption info %#x\n", VMX_EXIT_INTERRUPTION_INFO_TYPE(uExitIntInfo)));
    88788878            break;
    88798879        }
    … …  
    93369336    uint32_t       u32Val;
    93379337
    9338     rc  = hmR0VmxReadEntryIntrInfoVmcs(pVmxTransient);
     9338    rc  = hmR0VmxReadEntryIntInfoVmcs(pVmxTransient);
    93399339    rc |= hmR0VmxReadEntryXcptErrorCodeVmcs(pVmxTransient);
    93409340    rc |= hmR0VmxReadEntryInstrLenVmcs(pVCpu, pVmxTransient);
    … …  
    93439343
    93449344    Log4(("uInvalidReason                             %u\n", uInvalidReason));
    9345     Log4(("VMX_VMCS32_CTRL_ENTRY_INTERRUPTION_INFO    %#RX32\n", pVmxTransient->uEntryIntrInfo));
     9345    Log4(("VMX_VMCS32_CTRL_ENTRY_INTERRUPTION_INFO    %#RX32\n", pVmxTransient->uEntryIntInfo));
    93469346    Log4(("VMX_VMCS32_CTRL_ENTRY_EXCEPTION_ERRCODE    %#RX32\n", pVmxTransient->uEntryXcptErrorCode));
    93479347    Log4(("VMX_VMCS32_CTRL_ENTRY_INSTR_LENGTH         %#RX32\n", pVmxTransient->cbEntryInstr));
    … …  
    97719771         * interpreting the instruction.
    97729772         */
     9773#if 0 /* Not quite ready, seem iSegReg assertion trigger once... Do we perhaps need to always read that in longjmp / preempt scenario? */
    97739774        Log4(("CS:RIP=%04x:%#RX64 %#06x/%u %c str\n", pMixedCtx->cs.Sel, pMixedCtx->rip, uIOPort, cbValue, fIOWrite ? 'w' : 'r'));
    9774 #if 0 /* Not quite ready, seem iSegReg assertion trigger once... Do we perhaps need to always read that in longjmp / preempt scenario? */
    97759775        AssertReturn(pMixedCtx->dx == uIOPort, VERR_HMVMX_IPE_2);
    97769776        if (MSR_IA32_VMX_BASIC_INFO_VMCS_INS_OUTS(pVM->hm.s.vmx.Msrs.u64BasicInfo))
    … …  
    99749974                Assert(!pVCpu->hm.s.Event.fPending);
    99759975                pVCpu->hm.s.Event.fPending = true;
    9976                 pVCpu->hm.s.Event.u64IntrInfo = pVmxTransient->uIdtVectoringInfo;
     9976                pVCpu->hm.s.Event.u64IntInfo = pVmxTransient->uIdtVectoringInfo;
    99779977                rc = hmR0VmxReadIdtVectoringErrorCodeVmcs(pVmxTransient);
    99789978                AssertRCReturn(rc, rc);
    … …  
    1033510335    }
    1033610336
    10337     hmR0VmxSetPendingEvent(pVCpu, VMX_VMCS_CTRL_ENTRY_IRQ_INFO_FROM_EXIT_INT_INFO(pVmxTransient->uExitIntrInfo),
    10338                            pVmxTransient->cbInstr, pVmxTransient->uExitIntrErrorCode, 0 /* GCPtrFaultAddress */);
     10337    hmR0VmxSetPendingEvent(pVCpu, VMX_VMCS_CTRL_ENTRY_IRQ_INFO_FROM_EXIT_INT_INFO(pVmxTransient->uExitIntInfo),
     10338                           pVmxTransient->cbInstr, pVmxTransient->uExitIntErrorCode, 0 /* GCPtrFaultAddress */);
    1033910339    return rc;
    1034010340}
    … …  
    1035810358    if (rc == VINF_EM_RAW_GUEST_TRAP)
    1035910359    {
    10360         rc  = hmR0VmxReadExitIntrInfoVmcs(pVCpu, pVmxTransient);
     10360        rc  = hmR0VmxReadExitIntInfoVmcs(pVCpu, pVmxTransient);
    1036110361        rc |= hmR0VmxReadExitInstrLenVmcs(pVCpu, pVmxTransient);
    10362         rc |= hmR0VmxReadExitIntrErrorCodeVmcs(pVCpu, pVmxTransient);
     10362        rc |= hmR0VmxReadExitIntErrorCodeVmcs(pVCpu, pVmxTransient);
    1036310363        AssertRCReturn(rc, rc);
    1036410364
    10365         hmR0VmxSetPendingEvent(pVCpu, VMX_VMCS_CTRL_ENTRY_IRQ_INFO_FROM_EXIT_INT_INFO(pVmxTransient->uExitIntrInfo),
    10366                                pVmxTransient->cbInstr, pVmxTransient->uExitIntrErrorCode, 0 /* GCPtrFaultAddress */);
     10365        hmR0VmxSetPendingEvent(pVCpu, VMX_VMCS_CTRL_ENTRY_IRQ_INFO_FROM_EXIT_INT_INFO(pVmxTransient->uExitIntInfo),
     10366                               pVmxTransient->cbInstr, pVmxTransient->uExitIntErrorCode, 0 /* GCPtrFaultAddress */);
    1036710367    }
    1036810368
    … …  
    1042810428         * Raise #DB in the guest.
    1042910429         */
    10430         rc  = hmR0VmxReadExitIntrInfoVmcs(pVCpu, pVmxTransient);
     10430        rc  = hmR0VmxReadExitIntInfoVmcs(pVCpu, pVmxTransient);
    1043110431        rc |= hmR0VmxReadExitInstrLenVmcs(pVCpu, pVmxTransient);
    10432         rc |= hmR0VmxReadExitIntrErrorCodeVmcs(pVCpu, pVmxTransient);
     10432        rc |= hmR0VmxReadExitIntErrorCodeVmcs(pVCpu, pVmxTransient);
    1043310433        AssertRCReturn(rc, rc);
    10434         hmR0VmxSetPendingEvent(pVCpu, VMX_VMCS_CTRL_ENTRY_IRQ_INFO_FROM_EXIT_INT_INFO(pVmxTransient->uExitIntrInfo),
    10435                                pVmxTransient->cbInstr, pVmxTransient->uExitIntrErrorCode, 0 /* GCPtrFaultAddress */);
     10434        hmR0VmxSetPendingEvent(pVCpu, VMX_VMCS_CTRL_ENTRY_IRQ_INFO_FROM_EXIT_INT_INFO(pVmxTransient->uExitIntInfo),
     10435                               pVmxTransient->cbInstr, pVmxTransient->uExitIntErrorCode, 0 /* GCPtrFaultAddress */);
    1043610436        return VINF_SUCCESS;
    1043710437    }
    … …  
    1049310493        /* Forward #NM to the guest. */
    1049410494        Assert(rc == VINF_EM_RAW_GUEST_TRAP);
    10495         rc = hmR0VmxReadExitIntrInfoVmcs(pVCpu, pVmxTransient);
     10495        rc = hmR0VmxReadExitIntInfoVmcs(pVCpu, pVmxTransient);
    1049610496        AssertRCReturn(rc, rc);
    10497         hmR0VmxSetPendingEvent(pVCpu, VMX_VMCS_CTRL_ENTRY_IRQ_INFO_FROM_EXIT_INT_INFO(pVmxTransient->uExitIntrInfo),
     10497        hmR0VmxSetPendingEvent(pVCpu, VMX_VMCS_CTRL_ENTRY_IRQ_INFO_FROM_EXIT_INT_INFO(pVmxTransient->uExitIntInfo),
    1049810498                               pVmxTransient->cbInstr, 0 /* error code */, 0 /* GCPtrFaultAddress */);
    1049910499        STAM_COUNTER_INC(&pVCpu->hm.s.StatExitGuestNM);
    … …  
    1050710507 * VM-exit exception handler for #GP (General-protection exception).
    1050810508 *
    10509  * @remarks Requires pVmxTransient->uExitIntrInfo to be up-to-date.
     10509 * @remarks Requires pVmxTransient->uExitIntInfo to be up-to-date.
    1051010510 */
    1051110511static int hmR0VmxExitXcptGP(PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT pVmxTransient)
    … …  
    1051910519#ifdef HMVMX_ALWAYS_TRAP_ALL_XCPTS
    1052010520        /* If the guest is not in real-mode or we have unrestricted execution support, reflect #GP to the guest. */
    10521         rc  = hmR0VmxReadExitIntrInfoVmcs(pVCpu, pVmxTransient);
    10522         rc |= hmR0VmxReadExitIntrErrorCodeVmcs(pVCpu, pVmxTransient);
     10521        rc  = hmR0VmxReadExitIntInfoVmcs(pVCpu, pVmxTransient);
     10522        rc |= hmR0VmxReadExitIntErrorCodeVmcs(pVCpu, pVmxTransient);
    1052310523        rc |= hmR0VmxReadExitInstrLenVmcs(pVCpu, pVmxTransient);
    1052410524        rc |= hmR0VmxSaveGuestState(pVCpu, pMixedCtx);
    1052510525        AssertRCReturn(rc, rc);
    10526         Log4(("#GP Gst: RIP %#RX64 ErrorCode=%#x CR0=%#RX64 CPL=%u\n", pMixedCtx->rip, pVmxTransient->uExitIntrErrorCode,
     10526        Log4(("#GP Gst: RIP %#RX64 ErrorCode=%#x CR0=%#RX64 CPL=%u\n", pMixedCtx->rip, pVmxTransient->uExitIntErrorCode,
    1052710527             pMixedCtx->cr0, CPUMGetGuestCPL(pVCpu)));
    10528         hmR0VmxSetPendingEvent(pVCpu, VMX_VMCS_CTRL_ENTRY_IRQ_INFO_FROM_EXIT_INT_INFO(pVmxTransient->uExitIntrInfo),
    10529                                pVmxTransient->cbInstr, pVmxTransient->uExitIntrErrorCode, 0 /* GCPtrFaultAddress */);
     10528        hmR0VmxSetPendingEvent(pVCpu, VMX_VMCS_CTRL_ENTRY_IRQ_INFO_FROM_EXIT_INT_INFO(pVmxTransient->uExitIntInfo),
     10529                               pVmxTransient->cbInstr, pVmxTransient->uExitIntErrorCode, 0 /* GCPtrFaultAddress */);
    1053010530        return rc;
    1053110531#else
    … …  
    1075410754 * the exception reported in the VMX transient structure back into the VM.
    1075510755 *
    10756  * @remarks Requires uExitIntrInfo in the VMX transient structure to be
     10756 * @remarks Requires uExitIntInfo in the VMX transient structure to be
    1075710757 *          up-to-date.
    1075810758 */
    … …  
    1076310763    /* Re-inject the exception into the guest. This cannot be a double-fault condition which would have been handled in
    1076410764       hmR0VmxCheckExitDueToEventDelivery(). */
    10765     int rc = hmR0VmxReadExitIntrErrorCodeVmcs(pVCpu, pVmxTransient);
     10765    int rc = hmR0VmxReadExitIntErrorCodeVmcs(pVCpu, pVmxTransient);
    1076610766    rc    |= hmR0VmxReadExitInstrLenVmcs(pVCpu, pVmxTransient);
    1076710767    AssertRCReturn(rc, rc);
    1076810768    Assert(pVmxTransient->fVmcsFieldsRead & HMVMX_UPDATED_TRANSIENT_EXIT_INTERRUPTION_INFO);
    1076910769
    10770     hmR0VmxSetPendingEvent(pVCpu, VMX_VMCS_CTRL_ENTRY_IRQ_INFO_FROM_EXIT_INT_INFO(pVmxTransient->uExitIntrInfo),
    10771                            pVmxTransient->cbInstr, pVmxTransient->uExitIntrErrorCode, 0 /* GCPtrFaultAddress */);
     10770    hmR0VmxSetPendingEvent(pVCpu, VMX_VMCS_CTRL_ENTRY_IRQ_INFO_FROM_EXIT_INT_INFO(pVmxTransient->uExitIntInfo),
     10771                           pVmxTransient->cbInstr, pVmxTransient->uExitIntErrorCode, 0 /* GCPtrFaultAddress */);
    1077210772    return VINF_SUCCESS;
    1077310773}
    … …  
    1078210782    PVM pVM = pVCpu->CTX_SUFF(pVM);
    1078310783    int rc = hmR0VmxReadExitQualificationVmcs(pVCpu, pVmxTransient);
    10784     rc    |= hmR0VmxReadExitIntrInfoVmcs(pVCpu, pVmxTransient);
    10785     rc    |= hmR0VmxReadExitIntrErrorCodeVmcs(pVCpu, pVmxTransient);
     10784    rc    |= hmR0VmxReadExitIntInfoVmcs(pVCpu, pVmxTransient);
     10785    rc    |= hmR0VmxReadExitIntErrorCodeVmcs(pVCpu, pVmxTransient);
    1078610786    AssertRCReturn(rc, rc);
    1078710787
    … …  
    1079310793        {
    1079410794            pMixedCtx->cr2 = pVmxTransient->uExitQualification;  /* Update here in case we go back to ring-3 before injection. */
    10795             hmR0VmxSetPendingEvent(pVCpu, VMX_VMCS_CTRL_ENTRY_IRQ_INFO_FROM_EXIT_INT_INFO(pVmxTransient->uExitIntrInfo),
    10796                                    0 /* cbInstr */, pVmxTransient->uExitIntrErrorCode, pVmxTransient->uExitQualification);
     10795            hmR0VmxSetPendingEvent(pVCpu, VMX_VMCS_CTRL_ENTRY_IRQ_INFO_FROM_EXIT_INT_INFO(pVmxTransient->uExitIntInfo),
     10796                                   0 /* cbInstr */, pVmxTransient->uExitIntErrorCode, pVmxTransient->uExitQualification);
    1079710797        }
    1079810798        else
    … …  
    1081310813
    1081410814    Log4(("#PF: cr2=%#RX64 cs:rip=%#04x:%#RX64 uErrCode %#RX32 cr3=%#RX64\n", pVmxTransient->uExitQualification,
    10815           pMixedCtx->cs.Sel, pMixedCtx->rip, pVmxTransient->uExitIntrErrorCode, pMixedCtx->cr3));
    10816 
    10817     TRPMAssertXcptPF(pVCpu, pVmxTransient->uExitQualification, (RTGCUINT)pVmxTransient->uExitIntrErrorCode);
    10818     rc = PGMTrap0eHandler(pVCpu, pVmxTransient->uExitIntrErrorCode, CPUMCTX2CORE(pMixedCtx),
     10815          pMixedCtx->cs.Sel, pMixedCtx->rip, pVmxTransient->uExitIntErrorCode, pMixedCtx->cr3));
     10816
     10817    TRPMAssertXcptPF(pVCpu, pVmxTransient->uExitQualification, (RTGCUINT)pVmxTransient->uExitIntErrorCode);
     10818    rc = PGMTrap0eHandler(pVCpu, pVmxTransient->uExitIntErrorCode, CPUMCTX2CORE(pMixedCtx),
    1081910819                          (RTGCPTR)pVmxTransient->uExitQualification);
    1082010820
    … …  
    1084210842            pVCpu->hm.s.Event.fPending = false;                 /* In case it's a contributory #PF. */
    1084310843            pMixedCtx->cr2 = pVmxTransient->uExitQualification; /* Update here in case we go back to ring-3 before injection. */
    10844             hmR0VmxSetPendingEvent(pVCpu, VMX_VMCS_CTRL_ENTRY_IRQ_INFO_FROM_EXIT_INT_INFO(pVmxTransient->uExitIntrInfo),
     10844            hmR0VmxSetPendingEvent(pVCpu, VMX_VMCS_CTRL_ENTRY_IRQ_INFO_FROM_EXIT_INT_INFO(pVmxTransient->uExitIntInfo),
    1084510845                                   0 /* cbInstr */, uGstErrorCode, pVmxTransient->uExitQualification);
    1084610846        }

  • trunk/src/VBox/VMM/VMMR3/HM.cpp

    r48998 r49000  
    29812981        rc = SSMR3PutU32(pSSM, pVM->aCpus[i].hm.s.Event.u32ErrCode);
    29822982        AssertRCReturn(rc, rc);
    2983         rc = SSMR3PutU64(pSSM, pVM->aCpus[i].hm.s.Event.u64IntrInfo);
     2983        rc = SSMR3PutU64(pSSM, pVM->aCpus[i].hm.s.Event.u64IntInfo);
    29842984        AssertRCReturn(rc, rc);
     2985        /** @todo Shouldn't we be saving GCPtrFaultAddress too? */
    29852986
    29862987        /** @todo We only need to save pVM->aCpus[i].hm.s.vmx.fWasInRealMode and
    … …  
    30793080        rc = SSMR3GetU32(pSSM, &pVM->aCpus[i].hm.s.Event.u32ErrCode);
    30803081        AssertRCReturn(rc, rc);
    3081         rc = SSMR3GetU64(pSSM, &pVM->aCpus[i].hm.s.Event.u64IntrInfo);
     3082        rc = SSMR3GetU64(pSSM, &pVM->aCpus[i].hm.s.Event.u64IntInfo);
    30823083        AssertRCReturn(rc, rc);
    30833084

  • trunk/src/VBox/VMM/include/HMInternal.h

    r48570 r49000  
    695695        uint32_t                    cbInstr;
    696696        uint32_t                    u32Padding; /**< Explicit alignment padding. */
    697         uint64_t                    u64IntrInfo;
     697        uint64_t                    u64IntInfo;
    698698        RTGCUINTPTR                 GCPtrFaultAddress;
    699699    } Event;

  • trunk/src/VBox/VMM/testcase/tstVMStructSize.cpp

    r48216 r49000  
    412412    CHECK_MEMBER_ALIGNMENT(HMCPU, vmx.u32PinCtls, 8);
    413413    CHECK_MEMBER_ALIGNMENT(HMCPU, DisState, 8);
    414     CHECK_MEMBER_ALIGNMENT(HMCPU, Event.u64IntrInfo, 8);
     414    CHECK_MEMBER_ALIGNMENT(HMCPU, Event.u64IntInfo, 8);
    415415
    416416    /* Make sure the set is large enough and has the correct size. */
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