Changeset 49479 in vbox
- Timestamp:
- Nov 14, 2013 3:13:05 PM (11 years ago)
- svn:sync-xref-src-repo-rev:
- 90631
- Location:
- trunk/src/VBox/VMM
- Files:
-
- 3 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/VMM/VMMAll/CPUMAllRegs.cpp
r49360 r49479 1943 1943 } 1944 1944 1945 NOREF(type); 1945 1946 *pEax |= ((cores - 1) << 26) | 1946 1947 ((sharing - 1) << 14) | -
trunk/src/VBox/VMM/VMMR0/CPUMR0.cpp
r49019 r49479 127 127 static DECLCALLBACK(void) cpumR0CheckCpuid(RTCPUID idCpu, void *pvUser1, void *pvUser2) 128 128 { 129 NOREF(idCpu); NOREF(pvUser2); 130 129 131 struct 130 132 { … … 352 354 VMMR0_INT_DECL(int) CPUMR0LoadGuestFPU(PVM pVM, PVMCPU pVCpu, PCPUMCTX pCtx) 353 355 { 356 354 357 Assert(!RTThreadPreemptIsEnabled(NIL_RTTHREAD)); 355 358 #if HC_ARCH_BITS == 32 && defined(VBOX_WITH_64_BITS_GUESTS) && !defined(VBOX_WITH_HYBRID_32BIT_KERNEL) … … 367 370 #endif 368 371 { 372 NOREF(pCtx); 369 373 Assert(!(pVCpu->cpum.s.fUseFlags & CPUM_USED_MANUAL_XMM_RESTORE)); 370 374 /** @todo Move the FFXR handling down into … … 792 796 static DECLCALLBACK(void) cpumR0MapLocalApicCpuChecker(RTCPUID idCpu, void *pvUser1, void *pvUser2) 793 797 { 798 NOREF(pvUser1); NOREF(pvUser2); 799 794 800 int iCpu = RTMpCpuIdToSetIndex(idCpu); 795 801 AssertReturnVoid(iCpu >= 0 && (unsigned)iCpu < RT_ELEMENTS(g_aLApics)); -
trunk/src/VBox/VMM/VMMR0/HMR0.cpp
r49310 r49479 231 231 } 232 232 233 static DECLCALLBACK(int) hmR0DummyLeave(PVM pVM, PVMCPU pVCpu, PCPUMCTX pCtx) 233 static DECLCALLBACK(void) hmR0DummyThreadCtxCallback(RTTHREADCTXEVENT enmEvent, PVMCPU pVCpu, bool fGlobalInit) 234 { 235 NOREF(enmEvent); NOREF(pVCpu); NOREF(fGlobalInit); 236 } 237 238 static DECLCALLBACK(int) hmR0DummyEnableCpu(PHMGLOBALCPUINFO pCpu, PVM pVM, void *pvCpuPage, RTHCPHYS HCPhysCpuPage, 239 bool fEnabledBySystem, void *pvArg) 240 { 241 NOREF(pCpu); NOREF(pVM); NOREF(pvCpuPage); NOREF(HCPhysCpuPage); NOREF(fEnabledBySystem); NOREF(pvArg); 242 return VINF_SUCCESS; 243 } 244 245 static DECLCALLBACK(int) hmR0DummyDisableCpu(PHMGLOBALCPUINFO pCpu, void *pvCpuPage, RTHCPHYS HCPhysCpuPage) 246 { 247 NOREF(pCpu); NOREF(pvCpuPage); NOREF(HCPhysCpuPage); 248 return VINF_SUCCESS; 249 } 250 251 static DECLCALLBACK(int) hmR0DummyInitVM(PVM pVM) 252 { 253 NOREF(pVM); 254 return VINF_SUCCESS; 255 } 256 257 static DECLCALLBACK(int) hmR0DummyTermVM(PVM pVM) 258 { 259 NOREF(pVM); 260 return VINF_SUCCESS; 261 } 262 263 static DECLCALLBACK(int) hmR0DummySetupVM(PVM pVM) 264 { 265 NOREF(pVM); 266 return VINF_SUCCESS; 267 } 268 269 static DECLCALLBACK(int) hmR0DummyRunGuestCode(PVM pVM, PVMCPU pVCpu, PCPUMCTX pCtx) 234 270 { 235 271 NOREF(pVM); NOREF(pVCpu); NOREF(pCtx); … … 237 273 } 238 274 239 static DECLCALLBACK(void) hmR0DummyThreadCtxCallback(RTTHREADCTXEVENT enmEvent, PVMCPU pVCpu, bool fGlobalInit)240 {241 NOREF(enmEvent); NOREF(pVCpu); NOREF(fGlobalInit);242 }243 244 static DECLCALLBACK(int) hmR0DummyEnableCpu(PHMGLOBALCPUINFO pCpu, PVM pVM, void *pvCpuPage, RTHCPHYS HCPhysCpuPage,245 bool fEnabledBySystem, void *pvArg)246 {247 NOREF(pCpu); NOREF(pVM); NOREF(pvCpuPage); NOREF(HCPhysCpuPage); NOREF(fEnabledBySystem); NOREF(pvArg);248 return VINF_SUCCESS;249 }250 251 static DECLCALLBACK(int) hmR0DummyDisableCpu(PHMGLOBALCPUINFO pCpu, void *pvCpuPage, RTHCPHYS HCPhysCpuPage)252 {253 NOREF(pCpu); NOREF(pvCpuPage); NOREF(HCPhysCpuPage);254 return VINF_SUCCESS;255 }256 257 static DECLCALLBACK(int) hmR0DummyInitVM(PVM pVM)258 {259 NOREF(pVM);260 return VINF_SUCCESS;261 }262 263 static DECLCALLBACK(int) hmR0DummyTermVM(PVM pVM)264 {265 NOREF(pVM);266 return VINF_SUCCESS;267 }268 269 static DECLCALLBACK(int) hmR0DummySetupVM(PVM pVM)270 {271 NOREF(pVM);272 return VINF_SUCCESS;273 }274 275 static DECLCALLBACK(int) hmR0DummyRunGuestCode(PVM pVM, PVMCPU pVCpu, PCPUMCTX pCtx)276 {277 NOREF(pVM); NOREF(pVCpu); NOREF(pCtx);278 return VINF_SUCCESS;279 }280 281 275 static DECLCALLBACK(int) hmR0DummySaveHostState(PVM pVM, PVMCPU pVCpu) 282 276 { 283 277 NOREF(pVM); NOREF(pVCpu); 284 return VINF_SUCCESS;285 }286 287 static DECLCALLBACK(int) hmR0DummyLoadGuestState(PVM pVM, PVMCPU pVCpu, PCPUMCTX pCtx)288 {289 NOREF(pVM); NOREF(pVCpu); NOREF(pCtx);290 278 return VINF_SUCCESS; 291 279 } … … 1342 1330 RTThreadPreemptDisable(&PreemptState); 1343 1331 RTCPUID idCpu = RTMpCpuId(); 1344 PHMGLOBALCPUINFO pCpu = &g_HvmR0.aCpuInfo[idCpu];1345 1332 1346 1333 /* Enable VT-x or AMD-V if local init is required. */ … … 1460 1447 { 1461 1448 Assert(!RTThreadPreemptIsEnabled(NIL_RTTHREAD)); 1449 VMCPU_ASSERT_EMT_RETURN(pVCpu, VERR_HM_WRONG_CPU_1); 1462 1450 1463 1451 RTCPUID idCpu = RTMpCpuId(); … … 1694 1682 VMMR0_INT_DECL(int) HMR0EnterSwitcher(PVM pVM, VMMSWITCHER enmSwitcher, bool *pfVTxDisabled) 1695 1683 { 1684 NOREF(pVM); 1685 1696 1686 Assert(!(ASMGetFlags() & X86_EFL_IF) || !RTThreadPreemptIsEnabled(NIL_RTTHREAD)); 1697 1687
Note:
See TracChangeset
for help on using the changeset viewer.