Changeset 49640 in vbox for trunk/src

Timestamp:

Nov 25, 2013 2:04:00 PM (11 years ago)

Author:

vboxsync

Message:

PGM,IEM: Changed PGMPhysIemGCPhys2Ptr to not require A20 to be masked (copy & paste bug).

Location:

trunk/src/VBox/VMM/VMMAll

Files:

• IEMAll.cpp (modified) (1 diff)
• PGMAllPhys.cpp (modified) (3 diffs)

trunk/src/VBox/VMM/VMMAll/IEMAll.cpp

@@ -5412 +5412 @@
      *        living in PGM, but with publicly accessible inlined access methods
      *        could perhaps be an even better solution. */
-    int rc = PGMPhysIemGCPhys2Ptr(IEMCPU_TO_VM(pIemCpu),
+    int rc = PGMPhysIemGCPhys2Ptr(IEMCPU_TO_VM(pIemCpu), IEMCPU_TO_VMCPU(pIemCpu),
                                   GCPhysMem,
                                   RT_BOOL(fAccess & IEM_ACCESS_TYPE_WRITE),

trunk/src/VBox/VMM/VMMAll/PGMAllPhys.cpp

@@ -4025 +4025 @@
  * @retval  VERR_PGM_PHYS_TLB_UNASSIGNED if the page doesn't exist.
  *
- * @param   pVM         Pointer to the VM.
- * @param   GCPhys      The GC physical address to convert.  Since this is only
- *                      used for filling the REM TLB, the A20 mask must be
- *                      applied before calling this API.
+ * @param   pVM         Pointer to the cross context VM structure.
+ * @param   pVCpu       Pointer to the cross context virtual CPU structure of
+ *                      the calling EMT.
+ * @param   GCPhys      The GC physical address to convert.  This API mask the
+ *                      A20 line when necessary.
  * @param   fWritable   Whether write access is required.
  * @param   ppv         Where to store the pointer corresponding to GCPhys on
@@ -4035 +4036 @@
  *
  * @remarks This is more or a less a copy of PGMR3PhysTlbGCPhys2Ptr.
- */
-VMM_INT_DECL(int) PGMPhysIemGCPhys2Ptr(PVM pVM, RTGCPHYS GCPhys, bool fWritable, bool fByPassHandlers,
+ * @thread  EMT(pVCpu).
+ */
+VMM_INT_DECL(int) PGMPhysIemGCPhys2Ptr(PVM pVM, PVMCPU pVCpu, RTGCPHYS GCPhys, bool fWritable, bool fByPassHandlers,
                                        void **ppv, PPGMPAGEMAPLOCK pLock)
 {
+    PGM_A20_APPLY_TO_VAR(pVCpu, GCPhys);
+
     pgmLock(pVM);
-    PGM_A20_ASSERT_MASKED(VMMGetCpu(pVM), GCPhys);
 
     PPGMRAMRANGE pRam;
@@ -4088 +4091 @@
 
 #if defined(IN_RC) || defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0)
-            PVMCPU pVCpu = VMMGetCpu(pVM);
             void *pv;
             rc = pgmRZDynMapHCPageInlined(pVCpu,