Changeset 49701 in vbox for trunk/src

Timestamp:

Nov 28, 2013 5:30:55 PM (11 years ago)

Author:

vboxsync

Message:

VMM/HMVMXR0: Simplified the MSR optimization code.

File:

• trunk/src/VBox/VMM/VMMR0/HMVMXR0.cpp (modified) (8 diffs)

trunk/src/VBox/VMM/VMMR0/HMVMXR0.cpp

@@ -209 +209 @@
     uint32_t        u32Alignment0;
 #endif
-    /** The guest's LSTAR MSR value used for TPR patching for 32-bit guests. */
-    uint64_t        u64LStarMsr;
     /** The guest's TPR value used for TPR shadowing. */
     uint8_t         u8GuestTpr;
@@ -1287 +1285 @@
         && fUpdateHostMsr)
     {
+        Assert(!VMMRZCallRing3IsEnabled(pVCpu));
+        Assert(!RTThreadPreemptIsEnabled(NIL_RTTHREAD));
         pHostMsr->u64Value = ASMRdMsr(pHostMsr->u32Msr);
     }
@@ -1412 +1412 @@
     Assert(!RTThreadPreemptIsEnabled(NIL_RTTHREAD));
 
-#define VMXLOCAL_SAVE_HOST_MSR(uMsr, a_HostMsrField, RestoreFlag) \
-    do { \
-        if (!(pVCpu->hm.s.vmx.fRestoreHostMsrs & (RestoreFlag))) \
-        { \
-            pVCpu->hm.s.vmx.u64Host##a_HostMsrField = ASMRdMsr(uMsr); \
-        } \
-    } while (0)
-
     /*
      * Note: If you're adding MSRs here, make sure to update the MSR-bitmap permissions in hmR0VmxSetupProcCtls().
      */
-    VMXLOCAL_SAVE_HOST_MSR(MSR_K8_LSTAR,          LStarMsr,        VMX_RESTORE_HOST_MSR_LSTAR);
-    VMXLOCAL_SAVE_HOST_MSR(MSR_K6_STAR,           StarMsr,         VMX_RESTORE_HOST_MSR_STAR);
-    VMXLOCAL_SAVE_HOST_MSR(MSR_K8_SF_MASK,        SFMaskMsr,       VMX_RESTORE_HOST_MSR_SFMASK);
-    VMXLOCAL_SAVE_HOST_MSR(MSR_K8_KERNEL_GS_BASE, KernelGSBaseMsr, VMX_RESTORE_HOST_MSR_KERNELGSBASE);
-
-#undef VMXLOCAL_SAVE_HOST_MSR
+    if (!(pVCpu->hm.s.vmx.fRestoreHostMsrs & VMX_RESTORE_HOST_MSR_LOADED_GUEST))
+    {
+        pVCpu->hm.s.vmx.u64HostLStarMsr        = ASMRdMsr(MSR_K8_LSTAR);
+        pVCpu->hm.s.vmx.u64HostStarMsr         = ASMRdMsr(MSR_K6_STAR);
+        pVCpu->hm.s.vmx.u64HostSFMaskMsr       = ASMRdMsr(MSR_K8_SF_MASK);
+        pVCpu->hm.s.vmx.u64HostKernelGSBaseMsr = ASMRdMsr(MSR_K8_KERNEL_GS_BASE);
+        pVCpu->hm.s.vmx.fRestoreHostMsrs |= VMX_RESTORE_HOST_MSR_SAVED_HOST;
+    }
 }
 
@@ -1470 +1464 @@
     Assert(!VMMRZCallRing3IsEnabled(pVCpu));
 
-#define VMXLOCAL_SAVE_GUEST_MSR(uMsr, a_GuestMsrField, RestoreFlag) \
-    do { \
-        if (pVCpu->hm.s.vmx.fRestoreHostMsrs & (RestoreFlag)) \
-        { \
-            pMixedCtx->msr##a_GuestMsrField = ASMRdMsr(uMsr); \
-            Log4(("hmR0VmxLazySaveGuestMsrs: uMsr=%#RX32 GuestValue=%#RX64\n", (uMsr), pMixedCtx->msr##a_GuestMsrField)); \
-        } \
-    } while (0)
-
-    VMXLOCAL_SAVE_GUEST_MSR(MSR_K8_LSTAR,          LSTAR,        VMX_RESTORE_HOST_MSR_LSTAR);
-    VMXLOCAL_SAVE_GUEST_MSR(MSR_K6_STAR,           STAR,         VMX_RESTORE_HOST_MSR_STAR);
-    VMXLOCAL_SAVE_GUEST_MSR(MSR_K8_SF_MASK,        SFMASK,       VMX_RESTORE_HOST_MSR_SFMASK);
-    VMXLOCAL_SAVE_GUEST_MSR(MSR_K8_KERNEL_GS_BASE, KERNELGSBASE, VMX_RESTORE_HOST_MSR_KERNELGSBASE);
-
-#undef VMXLOCAL_SAVE_GUEST_MSR
+    if (pVCpu->hm.s.vmx.fRestoreHostMsrs & VMX_RESTORE_HOST_MSR_LOADED_GUEST)
+    {
+        Assert(pVCpu->hm.s.vmx.fRestoreHostMsrs & VMX_RESTORE_HOST_MSR_SAVED_HOST);
+        pMixedCtx->msrLSTAR        = ASMRdMsr(MSR_K8_LSTAR);
+        pMixedCtx->msrSTAR         = ASMRdMsr(MSR_K6_STAR);
+        pMixedCtx->msrSFMASK       = ASMRdMsr(MSR_K8_SF_MASK);
+        pMixedCtx->msrKERNELGSBASE = ASMRdMsr(MSR_K8_KERNEL_GS_BASE);
+    }
 }
 
@@ -1508 +1495 @@
     Assert(!VMMRZCallRing3IsEnabled(pVCpu));
 
-#define VMXLOCAL_LOAD_GUEST_MSR(uMsr, a_GuestMsrField, a_HostMsrField, RestoreFlag) \
+#if 0   /* Disabled until issue with non-atomic flag updates is resolved. See @bugref{6398#c170}. */
+    Assert(pVCpu->hm.s.vmx.fRestoreHostMsrs & VMX_RESTORE_HOST_MSR_SAVED_HOST);
+    if (!(pVCpu->hm.s.vmx.fRestoreHostMsrs & VMX_RESTORE_HOST_MSR_LOADED_GUEST))
+    {
+#define VMXLOCAL_LAZY_LOAD_GUEST_MSR(uMsr, a_GuestMsr, a_HostMsr) \
     do { \
-        if (   (pVCpu->hm.s.vmx.fRestoreHostMsrs & (RestoreFlag)) \
-            || pMixedCtx->msr##a_GuestMsrField != pVCpu->hm.s.vmx.u64Host##a_HostMsrField) \
-        { \
-            ASMWrMsr((uMsr), pMixedCtx->msr##a_GuestMsrField); \
-        } \
-        pVCpu->hm.s.vmx.fRestoreHostMsrs |= (RestoreFlag); \
-        Log4(("Load: MSRSWAP uMsr=%#RX32 GuestValue=%#RX64\n", (uMsr), pMixedCtx->msr##a_GuestMsrField)); \
+        if (pMixedCtx->msr##a_GuestMsr != pVCpu->hm.s.vmx.u64Host##a_HostMsr##Msr) \
+            ASMWrMsr(uMsr, pMixedCtx->msr##a_GuestMsr); \
+        else \
+            Assert(ASMRdMsr(uMsr) == pVCpu->hm.s.vmx.u64Host##a_HostMsr##Msr); \
     } while (0)
 
-    VMXLOCAL_LOAD_GUEST_MSR(MSR_K8_LSTAR,          LSTAR,        LStarMsr,        VMX_RESTORE_HOST_MSR_LSTAR);
-    VMXLOCAL_LOAD_GUEST_MSR(MSR_K6_STAR,           STAR,         StarMsr,         VMX_RESTORE_HOST_MSR_STAR);
-    VMXLOCAL_LOAD_GUEST_MSR(MSR_K8_SF_MASK,        SFMASK,       SFMaskMsr,       VMX_RESTORE_HOST_MSR_SFMASK);
-    VMXLOCAL_LOAD_GUEST_MSR(MSR_K8_KERNEL_GS_BASE, KERNELGSBASE, KernelGSBaseMsr, VMX_RESTORE_HOST_MSR_KERNELGSBASE);
-
-#undef VMXLOCAL_LOAD_GUEST_MSR
+        VMXLOCAL_LAZY_LOAD_GUEST_MSR(MSR_K8_LSTAR, LSTAR, LStar);
+        VMXLOCAL_LAZY_LOAD_GUEST_MSR(MSR_K6_STAR, STAR, Star);
+        VMXLOCAL_LAZY_LOAD_GUEST_MSR(MSR_K8_SF_MASK, SFMASK, SFMask);
+        VMXLOCAL_LAZY_LOAD_GUEST_MSR(MSR_K8_KERNEL_GS_BASE, KERNELGSBASE, KernelGSBase);
+#undef VMXLOCAL_LAZY_LOAD_GUEST_MSR
+    }
+    else
+#endif
+    {
+        ASMWrMsr(MSR_K8_LSTAR,          pMixedCtx->msrLSTAR);
+        ASMWrMsr(MSR_K6_STAR,           pMixedCtx->msrSTAR);
+        ASMWrMsr(MSR_K8_SF_MASK,        pMixedCtx->msrSFMASK);
+        ASMWrMsr(MSR_K8_KERNEL_GS_BASE, pMixedCtx->msrKERNELGSBASE);
+    }
+    pVCpu->hm.s.vmx.fRestoreHostMsrs |= VMX_RESTORE_HOST_MSR_LOADED_GUEST;
 }
 
@@ -1543 +1540 @@
     Assert(!VMMRZCallRing3IsEnabled(pVCpu));
 
-#define VMXLOCAL_RESTORE_HOST_MSR(uMsr, a_HostMsrField, RestoreFlag) \
-    do { \
-        if (pVCpu->hm.s.vmx.fRestoreHostMsrs & (RestoreFlag)) \
-        { \
-            ASMWrMsr((uMsr), pVCpu->hm.s.vmx.u64Host##a_HostMsrField); \
-            pVCpu->hm.s.vmx.fRestoreHostMsrs &= ~(RestoreFlag); \
-            Log4(("hmR0VmxLazyRestoreHostMsrs: uMsr=%#RX32 HostValue=%#RX64\n", (uMsr), \
-                 pVCpu->hm.s.vmx.u64Host##a_HostMsrField)); \
-        } \
-    } while (0)
-
-    VMXLOCAL_RESTORE_HOST_MSR(MSR_K8_LSTAR,          LStarMsr,        VMX_RESTORE_HOST_MSR_LSTAR);
-    VMXLOCAL_RESTORE_HOST_MSR(MSR_K6_STAR,           StarMsr,         VMX_RESTORE_HOST_MSR_STAR);
-    VMXLOCAL_RESTORE_HOST_MSR(MSR_K8_SF_MASK,        SFMaskMsr,       VMX_RESTORE_HOST_MSR_SFMASK);
-    VMXLOCAL_RESTORE_HOST_MSR(MSR_K8_KERNEL_GS_BASE, KernelGSBaseMsr, VMX_RESTORE_HOST_MSR_KERNELGSBASE);
-
-#undef VMXLOCAL_RESTORE_HOST_MSR
+    if (pVCpu->hm.s.vmx.fRestoreHostMsrs & VMX_RESTORE_HOST_MSR_LOADED_GUEST)
+    {
+        Assert(pVCpu->hm.s.vmx.fRestoreHostMsrs & VMX_RESTORE_HOST_MSR_SAVED_HOST);
+        ASMWrMsr(MSR_K8_LSTAR,          pVCpu->hm.s.vmx.u64HostLStarMsr);
+        ASMWrMsr(MSR_K6_STAR,           pVCpu->hm.s.vmx.u64HostStarMsr);
+        ASMWrMsr(MSR_K8_SF_MASK,        pVCpu->hm.s.vmx.u64HostSFMaskMsr);
+        ASMWrMsr(MSR_K8_KERNEL_GS_BASE, pVCpu->hm.s.vmx.u64HostKernelGSBaseMsr);
+    }
+    pVCpu->hm.s.vmx.fRestoreHostMsrs &= ~(VMX_RESTORE_HOST_MSR_LOADED_GUEST | VMX_RESTORE_HOST_MSR_SAVED_HOST);
 }
 #endif  /* HC_ARCH_BITS == 64 || defined(VBOX_WITH_HYBRID_32BIT_KERNEL) */
@@ -4411 +4400 @@
 
         VMCPU_HMCF_CLEAR(pVCpu, HM_CHANGED_GUEST_LDTR);
-        Log4(("Load: VMX_VMCS_GUEST_LDTR_BASE=%#RX64\n",  pMixedCtx->ldtr.u64Base));
+        Log4(("Load: VMX_VMCS_GUEST_LDTR_BASE=%#RX64\n", pMixedCtx->ldtr.u64Base));
     }
 
@@ -4476 +4465 @@
             PVMXAUTOMSR pMsr = (PVMXAUTOMSR)pVCpu->hm.s.vmx.pvGuestMsr;
             for (uint32_t i = 0; i < pVCpu->hm.s.vmx.cMsrs; i++, pMsr++)
-                Log4(("MSR[%RU32]: u32Msr=%#RX32 u64Value=%#RX64\n", i, pMsr->u32Msr, pMsr->u64Value));
+                Log4(("Load: MSR[%RU32]: u32Msr=%#RX32 u64Value=%#RX64\n", i, pMsr->u32Msr, pMsr->u64Value));
 # endif
 #endif