VirtualBox

Changeset 49712 in vbox


Ignore:
Timestamp:
Nov 28, 2013 11:58:42 PM (11 years ago)
Author:
vboxsync
svn:sync-xref-src-repo-rev:
91000
Message:

VMM/HMVMXR0: Comment, macros.

File:
1 edited

Legend:

Unmodified
Added
Removed
  • trunk/src/VBox/VMM/VMMR0/HMVMXR0.cpp

    r49701 r49712  
    2020*******************************************************************************/
    2121#define LOG_GROUP LOG_GROUP_HM
     22#include <iprt/x86.h>
    2223#include <iprt/asm-amd64-x86.h>
    2324#include <iprt/thread.h>
     
    29922993 * Saves certain host MSRs in the VM-Exit MSR-load area and some in the
    29932994 * host-state area of the VMCS. Theses MSRs will be automatically restored on
    2994  * the host after every successful VM exit.
     2995 * the host after every successful VM-exit.
    29952996 *
    29962997 * @returns VBox status code.
     
    33813382
    33823383        /*
    3383          * If we're emulating real-mode using Virtual 8086 mode, save the real-mode eflags so we can restore them on VM exit.
     3384         * If we're emulating real-mode using Virtual 8086 mode, save the real-mode eflags so we can restore them on VM-exit.
    33843385         * Modify the real-mode guest's eflags so that VT-x can run the real-mode guest code under Virtual 8086 mode.
    33853386         */
     
    34633464            if (CPUMIsGuestPagingEnabledEx(pMixedCtx))
    34643465            {
    3465                 /* The guest has paging enabled, let it access CR3 without causing a VM exit if supported. */
     3466                /* The guest has paging enabled, let it access CR3 without causing a VM-exit if supported. */
    34663467                pVCpu->hm.s.vmx.u32ProcCtls &= ~(  VMX_VMCS_CTRL_PROC_EXEC_CR3_LOAD_EXIT
    34673468                                                 | VMX_VMCS_CTRL_PROC_EXEC_CR3_STORE_EXIT);
     
    34693470            else
    34703471            {
    3471                 /* The guest doesn't have paging enabled, make CR3 access to cause VM exits to update our shadow. */
     3472                /* The guest doesn't have paging enabled, make CR3 access cause a VM-exit to update our shadow. */
    34723473                pVCpu->hm.s.vmx.u32ProcCtls |=   VMX_VMCS_CTRL_PROC_EXEC_CR3_LOAD_EXIT
    34733474                                               | VMX_VMCS_CTRL_PROC_EXEC_CR3_STORE_EXIT;
     
    37983799        AssertRCReturn(rc, rc);
    37993800
    3800         /* Setup CR4 mask. CR4 flags owned by the host, if the guest attempts to change them, that would cause a VM exit. */
     3801        /* Setup CR4 mask. CR4 flags owned by the host, if the guest attempts to change them, that would cause a VM-exit. */
    38013802        uint32_t u32CR4Mask = 0;
    38023803        u32CR4Mask =  X86_CR4_VME
     
    38173818/**
    38183819 * Loads the guest debug registers into the guest-state area in the VMCS.
    3819  * This also sets up whether #DB and MOV DRx accesses cause VM exits.
     3820 * This also sets up whether #DB and MOV DRx accesses cause VM-exits.
    38203821 *
    38213822 * The guest debug bits are partially shared with the host (e.g. DR6, DR0-3).
     
    44254426 * Loads certain guest MSRs into the VM-entry MSR-load and VM-exit MSR-store
    44264427 * areas. These MSRs will automatically be loaded to the host CPU on every
    4427  * successful VM entry and stored from the host CPU on every successful VM exit.
     4428 * successful VM entry and stored from the host CPU on every successful VM-exit.
    44284429 *
    44294430 * This also creates/updates MSR slots for the host MSRs. The actual host
     
    86278628                                                break; \
    86288629                                            } else do { } while (0)
    8629 /* Duplicate of IEM_IS_CANONICAL(). */
    8630 #define HMVMX_IS_CANONICAL(a_u64Addr)       ((uint64_t)(a_u64Addr) + UINT64_C(0x800000000000) < UINT64_C(0x1000000000000))
    86318630
    86328631    int      rc;
     
    87748773            rc = VMXReadVmcs64(VMX_VMCS_HOST_SYSENTER_ESP, &u64Val);
    87758774            AssertRCBreak(rc);
    8776             HMVMX_CHECK_BREAK(HMVMX_IS_CANONICAL(u64Val), VMX_IGS_SYSENTER_ESP_NOT_CANONICAL);
     8775            HMVMX_CHECK_BREAK(X86_IS_CANONICAL(u64Val), VMX_IGS_SYSENTER_ESP_NOT_CANONICAL);
    87778776
    87788777            rc = VMXReadVmcs64(VMX_VMCS_HOST_SYSENTER_EIP, &u64Val);
    87798778            AssertRCBreak(rc);
    8780             HMVMX_CHECK_BREAK(HMVMX_IS_CANONICAL(u64Val), VMX_IGS_SYSENTER_EIP_NOT_CANONICAL);
     8779            HMVMX_CHECK_BREAK(X86_IS_CANONICAL(u64Val), VMX_IGS_SYSENTER_EIP_NOT_CANONICAL);
    87818780        }
    87828781#endif
     
    89498948            if (HMVMX_IS_64BIT_HOST_MODE())
    89508949            {
    8951                 HMVMX_CHECK_BREAK(HMVMX_IS_CANONICAL(pCtx->fs.u64Base), VMX_IGS_FS_BASE_NOT_CANONICAL);
    8952                 HMVMX_CHECK_BREAK(HMVMX_IS_CANONICAL(pCtx->gs.u64Base), VMX_IGS_GS_BASE_NOT_CANONICAL);
     8950                HMVMX_CHECK_BREAK(X86_IS_CANONICAL(pCtx->fs.u64Base), VMX_IGS_FS_BASE_NOT_CANONICAL);
     8951                HMVMX_CHECK_BREAK(X86_IS_CANONICAL(pCtx->gs.u64Base), VMX_IGS_GS_BASE_NOT_CANONICAL);
    89538952                HMVMX_CHECK_BREAK(   (pCtx->ldtr.Attr.u & X86DESCATTR_UNUSABLE)
    8954                                   || HMVMX_IS_CANONICAL(pCtx->ldtr.u64Base), VMX_IGS_LDTR_BASE_NOT_CANONICAL);
     8953                                  || X86_IS_CANONICAL(pCtx->ldtr.u64Base), VMX_IGS_LDTR_BASE_NOT_CANONICAL);
    89558954                HMVMX_CHECK_BREAK(!(pCtx->cs.u64Base >> 32), VMX_IGS_LONGMODE_CS_BASE_INVALID);
    89568955                HMVMX_CHECK_BREAK((pCtx->ss.Attr.u & X86DESCATTR_UNUSABLE) || !(pCtx->ss.u64Base >> 32),
     
    90089007            if (HMVMX_IS_64BIT_HOST_MODE())
    90099008            {
    9010                 HMVMX_CHECK_BREAK(HMVMX_IS_CANONICAL(pCtx->fs.u64Base), VMX_IGS_FS_BASE_NOT_CANONICAL);
    9011                 HMVMX_CHECK_BREAK(HMVMX_IS_CANONICAL(pCtx->gs.u64Base), VMX_IGS_GS_BASE_NOT_CANONICAL);
     9009                HMVMX_CHECK_BREAK(X86_IS_CANONICAL(pCtx->fs.u64Base), VMX_IGS_FS_BASE_NOT_CANONICAL);
     9010                HMVMX_CHECK_BREAK(X86_IS_CANONICAL(pCtx->gs.u64Base), VMX_IGS_GS_BASE_NOT_CANONICAL);
    90129011                HMVMX_CHECK_BREAK(   (pCtx->ldtr.Attr.u & X86DESCATTR_UNUSABLE)
    9013                                   || HMVMX_IS_CANONICAL(pCtx->ldtr.u64Base), VMX_IGS_LDTR_BASE_NOT_CANONICAL);
     9012                                  || X86_IS_CANONICAL(pCtx->ldtr.u64Base), VMX_IGS_LDTR_BASE_NOT_CANONICAL);
    90149013                HMVMX_CHECK_BREAK(!(pCtx->cs.u64Base >> 32), VMX_IGS_LONGMODE_CS_BASE_INVALID);
    90159014                HMVMX_CHECK_BREAK((pCtx->ss.Attr.u & X86DESCATTR_UNUSABLE) || !(pCtx->ss.u64Base >> 32),
     
    90319030        if (HMVMX_IS_64BIT_HOST_MODE())
    90329031        {
    9033             HMVMX_CHECK_BREAK(HMVMX_IS_CANONICAL(pCtx->tr.u64Base), VMX_IGS_TR_BASE_NOT_CANONICAL);
     9032            HMVMX_CHECK_BREAK(X86_IS_CANONICAL(pCtx->tr.u64Base), VMX_IGS_TR_BASE_NOT_CANONICAL);
    90349033        }
    90359034#endif
     
    90629061            rc = VMXReadVmcs64(VMX_VMCS_GUEST_GDTR_BASE, &u64Val);
    90639062            AssertRCBreak(rc);
    9064             HMVMX_CHECK_BREAK(HMVMX_IS_CANONICAL(u64Val), VMX_IGS_GDTR_BASE_NOT_CANONICAL);
     9063            HMVMX_CHECK_BREAK(X86_IS_CANONICAL(u64Val), VMX_IGS_GDTR_BASE_NOT_CANONICAL);
    90659064
    90669065            rc = VMXReadVmcs64(VMX_VMCS_GUEST_IDTR_BASE, &u64Val);
    90679066            AssertRCBreak(rc);
    9068             HMVMX_CHECK_BREAK(HMVMX_IS_CANONICAL(u64Val), VMX_IGS_IDTR_BASE_NOT_CANONICAL);
     9067            HMVMX_CHECK_BREAK(X86_IS_CANONICAL(u64Val), VMX_IGS_IDTR_BASE_NOT_CANONICAL);
    90699068        }
    90709069#endif
     
    92049203#undef HMVMX_ERROR_BREAK
    92059204#undef HMVMX_CHECK_BREAK
    9206 #undef HMVMX_IS_CANONICAL
    92079205}
    92089206
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