Changeset 49712 in vbox
- Timestamp:
- Nov 28, 2013 11:58:42 PM (11 years ago)
- svn:sync-xref-src-repo-rev:
- 91000
- File:
-
- 1 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/VMM/VMMR0/HMVMXR0.cpp
r49701 r49712 20 20 *******************************************************************************/ 21 21 #define LOG_GROUP LOG_GROUP_HM 22 #include <iprt/x86.h> 22 23 #include <iprt/asm-amd64-x86.h> 23 24 #include <iprt/thread.h> … … 2992 2993 * Saves certain host MSRs in the VM-Exit MSR-load area and some in the 2993 2994 * host-state area of the VMCS. Theses MSRs will be automatically restored on 2994 * the host after every successful VM 2995 * the host after every successful VM-exit. 2995 2996 * 2996 2997 * @returns VBox status code. … … 3381 3382 3382 3383 /* 3383 * If we're emulating real-mode using Virtual 8086 mode, save the real-mode eflags so we can restore them on VM 3384 * If we're emulating real-mode using Virtual 8086 mode, save the real-mode eflags so we can restore them on VM-exit. 3384 3385 * Modify the real-mode guest's eflags so that VT-x can run the real-mode guest code under Virtual 8086 mode. 3385 3386 */ … … 3463 3464 if (CPUMIsGuestPagingEnabledEx(pMixedCtx)) 3464 3465 { 3465 /* The guest has paging enabled, let it access CR3 without causing a VM 3466 /* The guest has paging enabled, let it access CR3 without causing a VM-exit if supported. */ 3466 3467 pVCpu->hm.s.vmx.u32ProcCtls &= ~( VMX_VMCS_CTRL_PROC_EXEC_CR3_LOAD_EXIT 3467 3468 | VMX_VMCS_CTRL_PROC_EXEC_CR3_STORE_EXIT); … … 3469 3470 else 3470 3471 { 3471 /* The guest doesn't have paging enabled, make CR3 access to cause VM exitsto update our shadow. */3472 /* The guest doesn't have paging enabled, make CR3 access cause a VM-exit to update our shadow. */ 3472 3473 pVCpu->hm.s.vmx.u32ProcCtls |= VMX_VMCS_CTRL_PROC_EXEC_CR3_LOAD_EXIT 3473 3474 | VMX_VMCS_CTRL_PROC_EXEC_CR3_STORE_EXIT; … … 3798 3799 AssertRCReturn(rc, rc); 3799 3800 3800 /* Setup CR4 mask. CR4 flags owned by the host, if the guest attempts to change them, that would cause a VM 3801 /* Setup CR4 mask. CR4 flags owned by the host, if the guest attempts to change them, that would cause a VM-exit. */ 3801 3802 uint32_t u32CR4Mask = 0; 3802 3803 u32CR4Mask = X86_CR4_VME … … 3817 3818 /** 3818 3819 * Loads the guest debug registers into the guest-state area in the VMCS. 3819 * This also sets up whether #DB and MOV DRx accesses cause VM 3820 * This also sets up whether #DB and MOV DRx accesses cause VM-exits. 3820 3821 * 3821 3822 * The guest debug bits are partially shared with the host (e.g. DR6, DR0-3). … … 4425 4426 * Loads certain guest MSRs into the VM-entry MSR-load and VM-exit MSR-store 4426 4427 * areas. These MSRs will automatically be loaded to the host CPU on every 4427 * successful VM entry and stored from the host CPU on every successful VM 4428 * successful VM entry and stored from the host CPU on every successful VM-exit. 4428 4429 * 4429 4430 * This also creates/updates MSR slots for the host MSRs. The actual host … … 8627 8628 break; \ 8628 8629 } else do { } while (0) 8629 /* Duplicate of IEM_IS_CANONICAL(). */8630 #define HMVMX_IS_CANONICAL(a_u64Addr) ((uint64_t)(a_u64Addr) + UINT64_C(0x800000000000) < UINT64_C(0x1000000000000))8631 8630 8632 8631 int rc; … … 8774 8773 rc = VMXReadVmcs64(VMX_VMCS_HOST_SYSENTER_ESP, &u64Val); 8775 8774 AssertRCBreak(rc); 8776 HMVMX_CHECK_BREAK( HMVMX_IS_CANONICAL(u64Val), VMX_IGS_SYSENTER_ESP_NOT_CANONICAL);8775 HMVMX_CHECK_BREAK(X86_IS_CANONICAL(u64Val), VMX_IGS_SYSENTER_ESP_NOT_CANONICAL); 8777 8776 8778 8777 rc = VMXReadVmcs64(VMX_VMCS_HOST_SYSENTER_EIP, &u64Val); 8779 8778 AssertRCBreak(rc); 8780 HMVMX_CHECK_BREAK( HMVMX_IS_CANONICAL(u64Val), VMX_IGS_SYSENTER_EIP_NOT_CANONICAL);8779 HMVMX_CHECK_BREAK(X86_IS_CANONICAL(u64Val), VMX_IGS_SYSENTER_EIP_NOT_CANONICAL); 8781 8780 } 8782 8781 #endif … … 8949 8948 if (HMVMX_IS_64BIT_HOST_MODE()) 8950 8949 { 8951 HMVMX_CHECK_BREAK( HMVMX_IS_CANONICAL(pCtx->fs.u64Base), VMX_IGS_FS_BASE_NOT_CANONICAL);8952 HMVMX_CHECK_BREAK( HMVMX_IS_CANONICAL(pCtx->gs.u64Base), VMX_IGS_GS_BASE_NOT_CANONICAL);8950 HMVMX_CHECK_BREAK(X86_IS_CANONICAL(pCtx->fs.u64Base), VMX_IGS_FS_BASE_NOT_CANONICAL); 8951 HMVMX_CHECK_BREAK(X86_IS_CANONICAL(pCtx->gs.u64Base), VMX_IGS_GS_BASE_NOT_CANONICAL); 8953 8952 HMVMX_CHECK_BREAK( (pCtx->ldtr.Attr.u & X86DESCATTR_UNUSABLE) 8954 || HMVMX_IS_CANONICAL(pCtx->ldtr.u64Base), VMX_IGS_LDTR_BASE_NOT_CANONICAL);8953 || X86_IS_CANONICAL(pCtx->ldtr.u64Base), VMX_IGS_LDTR_BASE_NOT_CANONICAL); 8955 8954 HMVMX_CHECK_BREAK(!(pCtx->cs.u64Base >> 32), VMX_IGS_LONGMODE_CS_BASE_INVALID); 8956 8955 HMVMX_CHECK_BREAK((pCtx->ss.Attr.u & X86DESCATTR_UNUSABLE) || !(pCtx->ss.u64Base >> 32), … … 9008 9007 if (HMVMX_IS_64BIT_HOST_MODE()) 9009 9008 { 9010 HMVMX_CHECK_BREAK( HMVMX_IS_CANONICAL(pCtx->fs.u64Base), VMX_IGS_FS_BASE_NOT_CANONICAL);9011 HMVMX_CHECK_BREAK( HMVMX_IS_CANONICAL(pCtx->gs.u64Base), VMX_IGS_GS_BASE_NOT_CANONICAL);9009 HMVMX_CHECK_BREAK(X86_IS_CANONICAL(pCtx->fs.u64Base), VMX_IGS_FS_BASE_NOT_CANONICAL); 9010 HMVMX_CHECK_BREAK(X86_IS_CANONICAL(pCtx->gs.u64Base), VMX_IGS_GS_BASE_NOT_CANONICAL); 9012 9011 HMVMX_CHECK_BREAK( (pCtx->ldtr.Attr.u & X86DESCATTR_UNUSABLE) 9013 || HMVMX_IS_CANONICAL(pCtx->ldtr.u64Base), VMX_IGS_LDTR_BASE_NOT_CANONICAL);9012 || X86_IS_CANONICAL(pCtx->ldtr.u64Base), VMX_IGS_LDTR_BASE_NOT_CANONICAL); 9014 9013 HMVMX_CHECK_BREAK(!(pCtx->cs.u64Base >> 32), VMX_IGS_LONGMODE_CS_BASE_INVALID); 9015 9014 HMVMX_CHECK_BREAK((pCtx->ss.Attr.u & X86DESCATTR_UNUSABLE) || !(pCtx->ss.u64Base >> 32), … … 9031 9030 if (HMVMX_IS_64BIT_HOST_MODE()) 9032 9031 { 9033 HMVMX_CHECK_BREAK( HMVMX_IS_CANONICAL(pCtx->tr.u64Base), VMX_IGS_TR_BASE_NOT_CANONICAL);9032 HMVMX_CHECK_BREAK(X86_IS_CANONICAL(pCtx->tr.u64Base), VMX_IGS_TR_BASE_NOT_CANONICAL); 9034 9033 } 9035 9034 #endif … … 9062 9061 rc = VMXReadVmcs64(VMX_VMCS_GUEST_GDTR_BASE, &u64Val); 9063 9062 AssertRCBreak(rc); 9064 HMVMX_CHECK_BREAK( HMVMX_IS_CANONICAL(u64Val), VMX_IGS_GDTR_BASE_NOT_CANONICAL);9063 HMVMX_CHECK_BREAK(X86_IS_CANONICAL(u64Val), VMX_IGS_GDTR_BASE_NOT_CANONICAL); 9065 9064 9066 9065 rc = VMXReadVmcs64(VMX_VMCS_GUEST_IDTR_BASE, &u64Val); 9067 9066 AssertRCBreak(rc); 9068 HMVMX_CHECK_BREAK( HMVMX_IS_CANONICAL(u64Val), VMX_IGS_IDTR_BASE_NOT_CANONICAL);9067 HMVMX_CHECK_BREAK(X86_IS_CANONICAL(u64Val), VMX_IGS_IDTR_BASE_NOT_CANONICAL); 9069 9068 } 9070 9069 #endif … … 9204 9203 #undef HMVMX_ERROR_BREAK 9205 9204 #undef HMVMX_CHECK_BREAK 9206 #undef HMVMX_IS_CANONICAL9207 9205 } 9208 9206
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