Changeset 49732 in vbox

Timestamp:

Nov 29, 2013 6:54:30 PM (11 years ago)

Author:

vboxsync

Message:

Easier to read.

File:

• trunk/src/VBox/VMM/testcase/tstX86-FpuSaveRestore.cpp (modified) (6 diffs)

trunk/src/VBox/VMM/testcase/tstX86-FpuSaveRestore.cpp

@@ -39 +39 @@
 
 
+
     RTTestSub(hTest, "CS/DS Selector");
 
+    RTTestIPrintf(RTTESTLVL_ALWAYS,  "Initial state:\n");
     /* Trigger an exception to make sure we've got something to look at. */
     MyFpuPrepXcpt();
-
-    /* Initial state.*/
     static X86FXSTATE FxState;
     MyFpuSave(&FxState);
@@ -50 +50 @@
     MyFpuStoreEnv(&FpuEnv);
 #ifdef RT_ARCH_AMD64
-    RTTestIPrintf(RTTESTLVL_ALWAYS,  "FxState IP=%#06x%04x%08x\n",  FxState.Rsrvd1, FxState.CS, FxState.FPUIP);
+    RTTestIPrintf(RTTESTLVL_ALWAYS,  "  FxState IP=%#06x%04x%08x\n",  FxState.Rsrvd1, FxState.CS, FxState.FPUIP);
 #else
-    RTTestIPrintf(RTTESTLVL_ALWAYS,  "FxState CS:IP=%#06x:%#010x\n",  FxState.CS, FxState.FPUIP);
+    RTTestIPrintf(RTTESTLVL_ALWAYS,  "  FxState CS:IP=%#06x:%#010x\n",  FxState.CS, FxState.FPUIP);
 #endif
-    RTTestIPrintf(RTTESTLVL_ALWAYS,  "FpuEnv  CS:IP=%#06x:%#010x\n",  FpuEnv.FPUCS, FpuEnv.FPUIP);
+    RTTestIPrintf(RTTESTLVL_ALWAYS,  "  FpuEnv  CS:IP=%#06x:%#010x\n",  FpuEnv.FPUCS, FpuEnv.FPUIP);
 
     /* Modify the state a little so we can tell the difference. */
@@ -65 +65 @@
 
     /* Just do FXRSTOR. */
+    RTTestIPrintf(RTTESTLVL_ALWAYS,  "Just FXRSTOR:\n");
     MyFpuRestore(&FxState2);
 
@@ -72 +73 @@
     MyFpuStoreEnv(&FpuEnvJustRestore);
 #ifdef RT_ARCH_AMD64
-    RTTestIPrintf(RTTESTLVL_ALWAYS,  "FxState IP=%#06x%04x%08x\n",  FxStateJustRestore.Rsrvd1, FxStateJustRestore.CS, FxStateJustRestore.FPUIP);
+    RTTestIPrintf(RTTESTLVL_ALWAYS,  "  FxState IP=%#06x%04x%08x\n",  FxStateJustRestore.Rsrvd1, FxStateJustRestore.CS, FxStateJustRestore.FPUIP);
 #else
-    RTTestIPrintf(RTTESTLVL_ALWAYS,  "FxState CS:IP=%#06x:%#010x\n",  FxStateJustRestore.CS, FxStateJustRestore.FPUIP);
+    RTTestIPrintf(RTTESTLVL_ALWAYS,  "  FxState CS:IP=%#06x:%#010x\n",  FxStateJustRestore.CS, FxStateJustRestore.FPUIP);
 #endif
-    RTTestIPrintf(RTTESTLVL_ALWAYS,  "FpuEnv  CS:IP=%#06x:%#010x\n",  FpuEnvJustRestore.FPUCS, FpuEnvJustRestore.FPUIP);
+    RTTestIPrintf(RTTESTLVL_ALWAYS,  "  FpuEnv  CS:IP=%#06x:%#010x\n",  FpuEnvJustRestore.FPUCS, FpuEnvJustRestore.FPUIP);
 
 
     /* FXRSTORE + FLDENV */
+    RTTestIPrintf(RTTESTLVL_ALWAYS,  "FXRSTOR first, then FLDENV:\n");
     MyFpuRestore(&FxState2);
     MyFpuLoadEnv(&FpuEnv2);
@@ -88 +90 @@
     MyFpuStoreEnv(&FpuEnvRestoreLoad);
 #ifdef RT_ARCH_AMD64
-    RTTestIPrintf(RTTESTLVL_ALWAYS,  "FxState IP=%#06x%04x%08x\n",  FxStateRestoreLoad.Rsrvd1, FxStateRestoreLoad.CS, FxStateRestoreLoad.FPUIP);
+    RTTestIPrintf(RTTESTLVL_ALWAYS,  "  FxState IP=%#06x%04x%08x\n",  FxStateRestoreLoad.Rsrvd1, FxStateRestoreLoad.CS, FxStateRestoreLoad.FPUIP);
 #else
-    RTTestIPrintf(RTTESTLVL_ALWAYS,  "FxState CS:IP=%#06x:%#010x\n",  FxStateRestoreLoad.CS, FxStateRestoreLoad.FPUIP);
+    RTTestIPrintf(RTTESTLVL_ALWAYS,  "  FxState CS:IP=%#06x:%#010x\n",  FxStateRestoreLoad.CS, FxStateRestoreLoad.FPUIP);
 #endif
-    RTTestIPrintf(RTTESTLVL_ALWAYS,  "FpuEnv  CS:IP=%#06x:%#010x\n",  FpuEnvRestoreLoad.FPUCS, FpuEnvRestoreLoad.FPUIP);
+    RTTestIPrintf(RTTESTLVL_ALWAYS,  "  FpuEnv  CS:IP=%#06x:%#010x\n",  FpuEnvRestoreLoad.FPUCS, FpuEnvRestoreLoad.FPUIP);
 
     /* Reverse the order (FLDENV + FXRSTORE). */
+    RTTestIPrintf(RTTESTLVL_ALWAYS,  "FLDENV first, then FXRSTOR:\n");
     MyFpuLoadEnv(&FpuEnv2);
     MyFpuRestore(&FxState2);
@@ -103 +106 @@
     MyFpuStoreEnv(&FpuEnvLoadRestore);
 #ifdef RT_ARCH_AMD64
-    RTTestIPrintf(RTTESTLVL_ALWAYS,  "FxState IP=%#06x%04x%08x\n",  FxStateLoadRestore.Rsrvd1, FxStateLoadRestore.CS, FxStateLoadRestore.FPUIP);
+    RTTestIPrintf(RTTESTLVL_ALWAYS,  "  FxState IP=%#06x%04x%08x\n",  FxStateLoadRestore.Rsrvd1, FxStateLoadRestore.CS, FxStateLoadRestore.FPUIP);
 #else
-    RTTestIPrintf(RTTESTLVL_ALWAYS,  "FxState CS:IP=%#06x:%#010x\n",  FxStateLoadRestore.CS, FxStateLoadRestore.FPUIP);
+    RTTestIPrintf(RTTESTLVL_ALWAYS,  "  FxState CS:IP=%#06x:%#010x\n",  FxStateLoadRestore.CS, FxStateLoadRestore.FPUIP);
 #endif
-    RTTestIPrintf(RTTESTLVL_ALWAYS,  "FpuEnv  CS:IP=%#06x:%#010x\n",  FpuEnvLoadRestore.FPUCS, FpuEnvLoadRestore.FPUIP);
+    RTTestIPrintf(RTTESTLVL_ALWAYS,  "  FpuEnv  CS:IP=%#06x:%#010x\n",  FpuEnvLoadRestore.FPUCS, FpuEnvLoadRestore.FPUIP);