Changeset 49899 in vbox for trunk/src/VBox/VMM/VMMAll/CPUMAllMsrs.cpp
- Timestamp:
- Dec 13, 2013 4:17:46 PM (11 years ago)
- File:
-
- 1 edited
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- Unmodified
- Added
- Removed
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trunk/src/VBox/VMM/VMMAll/CPUMAllMsrs.cpp
r49893 r49899 1079 1079 1080 1080 /** @callback_method_impl{FNCPUMRDMSR} */ 1081 static DECLCALLBACK(int) cpumMsrRd_(PVMCPU pVCpu, uint32_t idMsr, PCCPUMMSRRANGE pRange, uint64_t *puValue) 1082 { 1083 *puValue = 0; 1081 static DECLCALLBACK(int) cpumMsrRd_Ia32DebugInterface(PVMCPU pVCpu, uint32_t idMsr, PCCPUMMSRRANGE pRange, uint64_t *puValue) 1082 { 1083 /** @todo IA32_DEBUG_INTERFACE (no docs) */ 1084 *puValue = 0; 1085 return VINF_SUCCESS; 1086 } 1087 1088 1089 /** @callback_method_impl{FNCPUMWRMSR} */ 1090 static DECLCALLBACK(int) cpumMsrWr_Ia32DebugInterface(PVMCPU pVCpu, uint32_t idMsr, PCCPUMMSRRANGE pRange, uint64_t uValue) 1091 { 1092 /** @todo IA32_DEBUG_INTERFACE (no docs) */ 1084 1093 return VINF_SUCCESS; 1085 1094 } … … 2171 2180 2172 2181 2182 /** @callback_method_impl{FNCPUMRDMSR} */ 2183 static DECLCALLBACK(int) cpumMsrRd_IntelI7IvyConfigTdpNominal(PVMCPU pVCpu, uint32_t idMsr, PCCPUMMSRRANGE pRange, uint64_t *puValue) 2184 { 2185 /** @todo intel power management. */ 2186 *puValue = pRange->uInitOrReadValue; 2187 return VINF_SUCCESS; 2188 } 2189 2190 2191 /** @callback_method_impl{FNCPUMRDMSR} */ 2192 static DECLCALLBACK(int) cpumMsrRd_IntelI7IvyConfigTdpLevel1(PVMCPU pVCpu, uint32_t idMsr, PCCPUMMSRRANGE pRange, uint64_t *puValue) 2193 { 2194 /** @todo intel power management. */ 2195 *puValue = pRange->uInitOrReadValue; 2196 return VINF_SUCCESS; 2197 } 2198 2199 2200 /** @callback_method_impl{FNCPUMRDMSR} */ 2201 static DECLCALLBACK(int) cpumMsrRd_IntelI7IvyConfigTdpLevel2(PVMCPU pVCpu, uint32_t idMsr, PCCPUMMSRRANGE pRange, uint64_t *puValue) 2202 { 2203 /** @todo intel power management. */ 2204 *puValue = pRange->uInitOrReadValue; 2205 return VINF_SUCCESS; 2206 } 2207 2208 2209 /** @callback_method_impl{FNCPUMRDMSR} */ 2210 static DECLCALLBACK(int) cpumMsrRd_IntelI7IvyConfigTdpControl(PVMCPU pVCpu, uint32_t idMsr, PCCPUMMSRRANGE pRange, uint64_t *puValue) 2211 { 2212 /** @todo intel power management. */ 2213 *puValue = 0; 2214 return VINF_SUCCESS; 2215 } 2216 2217 2218 /** @callback_method_impl{FNCPUMWRMSR} */ 2219 static DECLCALLBACK(int) cpumMsrWr_IntelI7IvyConfigTdpControl(PVMCPU pVCpu, uint32_t idMsr, PCCPUMMSRRANGE pRange, uint64_t uValue) 2220 { 2221 /** @todo intel power management. */ 2222 return VINF_SUCCESS; 2223 } 2224 2225 2226 /** @callback_method_impl{FNCPUMRDMSR} */ 2227 static DECLCALLBACK(int) cpumMsrRd_IntelI7IvyTurboActivationRatio(PVMCPU pVCpu, uint32_t idMsr, PCCPUMMSRRANGE pRange, uint64_t *puValue) 2228 { 2229 /** @todo intel power management. */ 2230 *puValue = 0; 2231 return VINF_SUCCESS; 2232 } 2233 2234 2235 /** @callback_method_impl{FNCPUMWRMSR} */ 2236 static DECLCALLBACK(int) cpumMsrWr_IntelI7IvyTurboActivationRatio(PVMCPU pVCpu, uint32_t idMsr, PCCPUMMSRRANGE pRange, uint64_t uValue) 2237 { 2238 /** @todo intel power management. */ 2239 return VINF_SUCCESS; 2240 } 2241 2242 2243 /** @callback_method_impl{FNCPUMRDMSR} */ 2244 static DECLCALLBACK(int) cpumMsrRd_IntelI7UncPerfGlobalCtrl(PVMCPU pVCpu, uint32_t idMsr, PCCPUMMSRRANGE pRange, uint64_t *puValue) 2245 { 2246 /** @todo uncore msrs. */ 2247 *puValue = 0; 2248 return VINF_SUCCESS; 2249 } 2250 2251 2252 /** @callback_method_impl{FNCPUMWRMSR} */ 2253 static DECLCALLBACK(int) cpumMsrWr_IntelI7UncPerfGlobalCtrl(PVMCPU pVCpu, uint32_t idMsr, PCCPUMMSRRANGE pRange, uint64_t uValue) 2254 { 2255 /** @todo uncore msrs. */ 2256 return VINF_SUCCESS; 2257 } 2258 2259 2260 /** @callback_method_impl{FNCPUMRDMSR} */ 2261 static DECLCALLBACK(int) cpumMsrRd_IntelI7UncPerfGlobalStatus(PVMCPU pVCpu, uint32_t idMsr, PCCPUMMSRRANGE pRange, uint64_t *puValue) 2262 { 2263 /** @todo uncore msrs. */ 2264 *puValue = 0; 2265 return VINF_SUCCESS; 2266 } 2267 2268 2269 /** @callback_method_impl{FNCPUMWRMSR} */ 2270 static DECLCALLBACK(int) cpumMsrWr_IntelI7UncPerfGlobalStatus(PVMCPU pVCpu, uint32_t idMsr, PCCPUMMSRRANGE pRange, uint64_t uValue) 2271 { 2272 /** @todo uncore msrs. */ 2273 return VINF_SUCCESS; 2274 } 2275 2276 2277 /** @callback_method_impl{FNCPUMRDMSR} */ 2278 static DECLCALLBACK(int) cpumMsrRd_IntelI7UncPerfGlobalOvfCtrl(PVMCPU pVCpu, uint32_t idMsr, PCCPUMMSRRANGE pRange, uint64_t *puValue) 2279 { 2280 /** @todo uncore msrs. */ 2281 *puValue = 0; 2282 return VINF_SUCCESS; 2283 } 2284 2285 2286 /** @callback_method_impl{FNCPUMWRMSR} */ 2287 static DECLCALLBACK(int) cpumMsrWr_IntelI7UncPerfGlobalOvfCtrl(PVMCPU pVCpu, uint32_t idMsr, PCCPUMMSRRANGE pRange, uint64_t uValue) 2288 { 2289 /** @todo uncore msrs. */ 2290 return VINF_SUCCESS; 2291 } 2292 2293 2294 /** @callback_method_impl{FNCPUMRDMSR} */ 2295 static DECLCALLBACK(int) cpumMsrRd_IntelI7UncPerfFixedCtrCtrl(PVMCPU pVCpu, uint32_t idMsr, PCCPUMMSRRANGE pRange, uint64_t *puValue) 2296 { 2297 /** @todo uncore msrs. */ 2298 *puValue = 0; 2299 return VINF_SUCCESS; 2300 } 2301 2302 2303 /** @callback_method_impl{FNCPUMWRMSR} */ 2304 static DECLCALLBACK(int) cpumMsrWr_IntelI7UncPerfFixedCtrCtrl(PVMCPU pVCpu, uint32_t idMsr, PCCPUMMSRRANGE pRange, uint64_t uValue) 2305 { 2306 /** @todo uncore msrs. */ 2307 return VINF_SUCCESS; 2308 } 2309 2310 2311 /** @callback_method_impl{FNCPUMRDMSR} */ 2312 static DECLCALLBACK(int) cpumMsrRd_IntelI7UncPerfFixedCtr(PVMCPU pVCpu, uint32_t idMsr, PCCPUMMSRRANGE pRange, uint64_t *puValue) 2313 { 2314 /** @todo uncore msrs. */ 2315 *puValue = 0; 2316 return VINF_SUCCESS; 2317 } 2318 2319 2320 /** @callback_method_impl{FNCPUMWRMSR} */ 2321 static DECLCALLBACK(int) cpumMsrWr_IntelI7UncPerfFixedCtr(PVMCPU pVCpu, uint32_t idMsr, PCCPUMMSRRANGE pRange, uint64_t uValue) 2322 { 2323 /** @todo uncore msrs. */ 2324 return VINF_SUCCESS; 2325 } 2326 2327 2328 /** @callback_method_impl{FNCPUMRDMSR} */ 2329 static DECLCALLBACK(int) cpumMsrRd_IntelI7UncCBoxConfig(PVMCPU pVCpu, uint32_t idMsr, PCCPUMMSRRANGE pRange, uint64_t *puValue) 2330 { 2331 /** @todo uncore msrs. */ 2332 *puValue = 0; 2333 return VINF_SUCCESS; 2334 } 2335 2336 2337 /** @callback_method_impl{FNCPUMRDMSR} */ 2338 static DECLCALLBACK(int) cpumMsrRd_IntelI7UncArbPerfCtrN(PVMCPU pVCpu, uint32_t idMsr, PCCPUMMSRRANGE pRange, uint64_t *puValue) 2339 { 2340 /** @todo uncore msrs. */ 2341 *puValue = 0; 2342 return VINF_SUCCESS; 2343 } 2344 2345 2346 /** @callback_method_impl{FNCPUMWRMSR} */ 2347 static DECLCALLBACK(int) cpumMsrWr_IntelI7UncArbPerfCtrN(PVMCPU pVCpu, uint32_t idMsr, PCCPUMMSRRANGE pRange, uint64_t uValue) 2348 { 2349 /** @todo uncore msrs. */ 2350 return VINF_SUCCESS; 2351 } 2352 2353 2354 /** @callback_method_impl{FNCPUMRDMSR} */ 2355 static DECLCALLBACK(int) cpumMsrRd_IntelI7UncArbPerfEvtSelN(PVMCPU pVCpu, uint32_t idMsr, PCCPUMMSRRANGE pRange, uint64_t *puValue) 2356 { 2357 /** @todo uncore msrs. */ 2358 *puValue = 0; 2359 return VINF_SUCCESS; 2360 } 2361 2362 2363 /** @callback_method_impl{FNCPUMWRMSR} */ 2364 static DECLCALLBACK(int) cpumMsrWr_IntelI7UncArbPerfEvtSelN(PVMCPU pVCpu, uint32_t idMsr, PCCPUMMSRRANGE pRange, uint64_t uValue) 2365 { 2366 /** @todo uncore msrs. */ 2367 return VINF_SUCCESS; 2368 } 2173 2369 2174 2370 … … 3906 4102 cpumMsrRd_Ia32TscDeadline, 3907 4103 cpumMsrRd_Ia32X2ApicN, 4104 cpumMsrRd_Ia32DebugInterface, 3908 4105 cpumMsrRd_Ia32VmxBase, 3909 4106 cpumMsrRd_Ia32VmxPinbasedCtls, … … 3982 4179 cpumMsrRd_IntelI7RaplPp1EnergyStatus, 3983 4180 cpumMsrRd_IntelI7RaplPp1Policy, 4181 cpumMsrRd_IntelI7IvyConfigTdpNominal, 4182 cpumMsrRd_IntelI7IvyConfigTdpLevel1, 4183 cpumMsrRd_IntelI7IvyConfigTdpLevel2, 4184 cpumMsrRd_IntelI7IvyConfigTdpControl, 4185 cpumMsrRd_IntelI7IvyTurboActivationRatio, 4186 cpumMsrRd_IntelI7UncPerfGlobalCtrl, 4187 cpumMsrRd_IntelI7UncPerfGlobalStatus, 4188 cpumMsrRd_IntelI7UncPerfGlobalOvfCtrl, 4189 cpumMsrRd_IntelI7UncPerfFixedCtrCtrl, 4190 cpumMsrRd_IntelI7UncPerfFixedCtr, 4191 cpumMsrRd_IntelI7UncCBoxConfig, 4192 cpumMsrRd_IntelI7UncArbPerfCtrN, 4193 cpumMsrRd_IntelI7UncArbPerfEvtSelN, 3984 4194 3985 4195 cpumMsrRd_P6LastBranchFromIp, … … 4133 4343 cpumMsrWr_Ia32TscDeadline, 4134 4344 cpumMsrWr_Ia32X2ApicN, 4345 cpumMsrWr_Ia32DebugInterface, 4135 4346 4136 4347 cpumMsrWr_Amd64Efer, … … 4176 4387 cpumMsrWr_IntelI7RaplPp1PowerLimit, 4177 4388 cpumMsrWr_IntelI7RaplPp1Policy, 4389 cpumMsrWr_IntelI7IvyConfigTdpControl, 4390 cpumMsrWr_IntelI7IvyTurboActivationRatio, 4391 cpumMsrWr_IntelI7UncPerfGlobalCtrl, 4392 cpumMsrWr_IntelI7UncPerfGlobalStatus, 4393 cpumMsrWr_IntelI7UncPerfGlobalOvfCtrl, 4394 cpumMsrWr_IntelI7UncPerfFixedCtrCtrl, 4395 cpumMsrWr_IntelI7UncPerfFixedCtr, 4396 cpumMsrWr_IntelI7UncArbPerfCtrN, 4397 cpumMsrWr_IntelI7UncArbPerfEvtSelN, 4178 4398 4179 4399 cpumMsrWr_P6LastIntFromIp, … … 4512 4732 CPUM_ASSERT_RD_MSR_FN(Ia32TscDeadline); 4513 4733 CPUM_ASSERT_RD_MSR_FN(Ia32X2ApicN); 4734 CPUM_ASSERT_RD_MSR_FN(Ia32DebugInterface); 4514 4735 CPUM_ASSERT_RD_MSR_FN(Ia32VmxBase); 4515 4736 CPUM_ASSERT_RD_MSR_FN(Ia32VmxPinbasedCtls); … … 4529 4750 CPUM_ASSERT_RD_MSR_FN(Ia32VmxTrueExitCtls); 4530 4751 CPUM_ASSERT_RD_MSR_FN(Ia32VmxTrueEntryCtls); 4752 4531 4753 CPUM_ASSERT_RD_MSR_FN(Amd64Efer); 4532 4754 CPUM_ASSERT_RD_MSR_FN(Amd64SyscallTarget); … … 4538 4760 CPUM_ASSERT_RD_MSR_FN(Amd64KernelGsBase); 4539 4761 CPUM_ASSERT_RD_MSR_FN(Amd64TscAux); 4762 4540 4763 CPUM_ASSERT_RD_MSR_FN(IntelEblCrPowerOn); 4541 4764 CPUM_ASSERT_RD_MSR_FN(IntelPlatformInfo100MHz); … … 4586 4809 CPUM_ASSERT_RD_MSR_FN(IntelI7RaplPp1EnergyStatus); 4587 4810 CPUM_ASSERT_RD_MSR_FN(IntelI7RaplPp1Policy); 4811 CPUM_ASSERT_RD_MSR_FN(IntelI7IvyConfigTdpNominal); 4812 CPUM_ASSERT_RD_MSR_FN(IntelI7IvyConfigTdpLevel1); 4813 CPUM_ASSERT_RD_MSR_FN(IntelI7IvyConfigTdpLevel2); 4814 CPUM_ASSERT_RD_MSR_FN(IntelI7IvyConfigTdpControl); 4815 CPUM_ASSERT_RD_MSR_FN(IntelI7IvyTurboActivationRatio); 4816 CPUM_ASSERT_RD_MSR_FN(IntelI7UncPerfGlobalCtrl); 4817 CPUM_ASSERT_RD_MSR_FN(IntelI7UncPerfGlobalStatus); 4818 CPUM_ASSERT_RD_MSR_FN(IntelI7UncPerfGlobalOvfCtrl); 4819 CPUM_ASSERT_RD_MSR_FN(IntelI7UncPerfFixedCtrCtrl); 4820 CPUM_ASSERT_RD_MSR_FN(IntelI7UncPerfFixedCtr); 4821 CPUM_ASSERT_RD_MSR_FN(IntelI7UncCBoxConfig); 4822 CPUM_ASSERT_RD_MSR_FN(IntelI7UncArbPerfCtrN); 4823 CPUM_ASSERT_RD_MSR_FN(IntelI7UncArbPerfEvtSelN); 4588 4824 4589 4825 CPUM_ASSERT_RD_MSR_FN(P6LastBranchFromIp); … … 4726 4962 CPUM_ASSERT_WR_MSR_FN(Ia32TscDeadline); 4727 4963 CPUM_ASSERT_WR_MSR_FN(Ia32X2ApicN); 4964 CPUM_ASSERT_WR_MSR_FN(Ia32DebugInterface); 4965 4728 4966 CPUM_ASSERT_WR_MSR_FN(Amd64Efer); 4729 4967 CPUM_ASSERT_WR_MSR_FN(Amd64SyscallTarget); … … 4768 5006 CPUM_ASSERT_WR_MSR_FN(IntelI7RaplPp1PowerLimit); 4769 5007 CPUM_ASSERT_WR_MSR_FN(IntelI7RaplPp1Policy); 5008 CPUM_ASSERT_WR_MSR_FN(IntelI7IvyConfigTdpControl); 5009 CPUM_ASSERT_WR_MSR_FN(IntelI7IvyTurboActivationRatio); 5010 CPUM_ASSERT_WR_MSR_FN(IntelI7UncPerfGlobalCtrl); 5011 CPUM_ASSERT_WR_MSR_FN(IntelI7UncPerfGlobalStatus); 5012 CPUM_ASSERT_WR_MSR_FN(IntelI7UncPerfGlobalOvfCtrl); 5013 CPUM_ASSERT_WR_MSR_FN(IntelI7UncPerfFixedCtrCtrl); 5014 CPUM_ASSERT_WR_MSR_FN(IntelI7UncPerfFixedCtr); 5015 CPUM_ASSERT_WR_MSR_FN(IntelI7UncArbPerfCtrN); 5016 CPUM_ASSERT_WR_MSR_FN(IntelI7UncArbPerfEvtSelN); 4770 5017 4771 5018 CPUM_ASSERT_WR_MSR_FN(P6LastIntFromIp);
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