Changeset 50162 in vbox
- Timestamp:
- Jan 22, 2014 4:14:15 PM (11 years ago)
- File:
-
- 1 edited
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trunk/src/VBox/VMM/VMMR3/CPUM.cpp
r50038 r50162 1104 1104 AssertLogRelRCReturn(rc, rc); 1105 1105 1106 /** @cfgm{/CPUM/SSE4.1, boolean, false} 1107 * Expose SSE4.1 to the guest if available. 1108 */ 1109 bool fSse41; 1110 rc = CFGMR3QueryBoolDef(pCpumCfg, "SSE4.1", &fSse41, false); 1111 AssertLogRelRCReturn(rc, rc); 1112 1113 /** @cfgm{/CPUM/SSE4.2, boolean, false} 1114 * Expose SSE4.2 to the guest if available. 1115 */ 1116 bool fSse42; 1117 rc = CFGMR3QueryBoolDef(pCpumCfg, "SSE4.2", &fSse42, false); 1118 AssertLogRelRCReturn(rc, rc); 1119 1106 1120 /** @cfgm{/CPUM/NT4LeafLimit, boolean, false} 1107 1121 * Limit the number of standard CPUID leaves to 0..3 to prevent NT4 from … … 1222 1236 /* ECX Bit 14 - xTPR Update Control. Processor supports changing IA32_MISC_ENABLES[bit 23]. */ 1223 1237 //| X86_CPUID_FEATURE_ECX_TPRUPDATE 1238 | (fSse41 ? X86_CPUID_FEATURE_ECX_SSE4_1 : 0) 1239 | (fSse42 ? X86_CPUID_FEATURE_ECX_SSE4_2 : 0) 1224 1240 /* ECX Bit 21 - x2APIC support - not yet. */ 1225 1241 // | X86_CPUID_FEATURE_ECX_X2APIC … … 1232 1248 PORTABLE_DISABLE_FEATURE_BIT(1, pStdFeatureLeaf->uEcx, SSSE3, X86_CPUID_FEATURE_ECX_SSSE3); 1233 1249 PORTABLE_DISABLE_FEATURE_BIT(1, pStdFeatureLeaf->uEcx, SSE3, X86_CPUID_FEATURE_ECX_SSE3); 1250 PORTABLE_DISABLE_FEATURE_BIT(1, pStdFeatureLeaf->uEcx, SSE4_1, X86_CPUID_FEATURE_ECX_SSE4_1); 1251 PORTABLE_DISABLE_FEATURE_BIT(1, pStdFeatureLeaf->uEcx, SSE4_2, X86_CPUID_FEATURE_ECX_SSE4_2); 1234 1252 PORTABLE_DISABLE_FEATURE_BIT(1, pStdFeatureLeaf->uEcx, CX16, X86_CPUID_FEATURE_ECX_CX16); 1235 1253 PORTABLE_DISABLE_FEATURE_BIT(2, pStdFeatureLeaf->uEdx, SSE2, X86_CPUID_FEATURE_EDX_SSE2);
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