VirtualBox

Changeset 50590 in vbox for trunk/src/VBox/VMM


Ignore:
Timestamp:
Feb 25, 2014 6:51:23 PM (11 years ago)
Author:
vboxsync
svn:sync-xref-src-repo-rev:
92460
Message:

CPUM,VMM: More work related to bus, cpu and tsc frequency info. Should cover older core and p6 as well as p4 now.

Location:
trunk/src/VBox/VMM
Files:
17 edited

Legend:

Unmodified
Added
Removed

  • trunk/src/VBox/VMM/VMMAll/CPUMAllMsrs.cpp

    r50584 r50590  
    182182
    183183/** @callback_method_impl{FNCPUMRDMSR} */
     184static DECLCALLBACK(int) cpumMsrRd_Ia32PlatformId(PVMCPU pVCpu, uint32_t idMsr, PCCPUMMSRRANGE pRange, uint64_t *puValue)
     185{
     186    uint64_t uValue = pRange->uValue;
     187    if (uValue & 0x1f00)
     188    {
     189        /* Max allowed bus ratio present. */
     190        /** @todo Implement scaled BUS frequency. */
     191    }
     192
     193    *puValue = uValue;
     194    return VINF_SUCCESS;
     195}
     196
     197
     198/** @callback_method_impl{FNCPUMRDMSR} */
    184199static DECLCALLBACK(int) cpumMsrRd_Ia32ApicBase(PVMCPU pVCpu, uint32_t idMsr, PCCPUMMSRRANGE pRange, uint64_t *puValue)
    185200{
    … …  
    714729static DECLCALLBACK(int) cpumMsrRd_Ia32PerfStatus(PVMCPU pVCpu, uint32_t idMsr, PCCPUMMSRRANGE pRange, uint64_t *puValue)
    715730{
    716     /** @todo implement IA32_PERFSTATUS. */
    717     *puValue = pRange->uValue;
     731    uint64_t uValue = pRange->uValue;
     732
     733    /* Always provide the max bus ratio for now.  XNU expects it. */
     734    uValue &= ~((UINT64_C(0x1f) << 40) | RT_BIT_64(46));
     735
     736    PVM      pVM            = pVCpu->CTX_SUFF(pVM);
     737    uint64_t uScalableBusHz = CPUMGetGuestScalableBusFrequency(pVM);
     738    uint64_t uTscHz         = TMCpuTicksPerSecond(pVM);
     739    uint8_t  uTscRatio      = (uint8_t)((uTscHz + uScalableBusHz / 2) / uScalableBusHz);
     740    if (uTscRatio > 0x1f)
     741        uTscRatio = 0x1f;
     742    uValue |= (uint64_t)uTscRatio << 40;
     743
     744    *puValue = uValue;
    718745    return VINF_SUCCESS;
    719746}
    … …  
    15301557static DECLCALLBACK(int) cpumMsrRd_IntelP4EbcFrequencyId(PVMCPU pVCpu, uint32_t idMsr, PCCPUMMSRRANGE pRange, uint64_t *puValue)
    15311558{
     1559    uint64_t uValue;
     1560    PVM      pVM            = pVCpu->CTX_SUFF(pVM);
     1561    uint64_t uScalableBusHz = CPUMGetGuestScalableBusFrequency(pVM);
     1562    if (pVM->cpum.s.GuestFeatures.uModel >= 2)
     1563    {
     1564        if (uScalableBusHz <= CPUM_SBUSFREQ_100MHZ && pVM->cpum.s.GuestFeatures.uModel <= 2)
     1565        {
     1566            uScalableBusHz = CPUM_SBUSFREQ_100MHZ;
     1567            uValue = 0;
     1568        }
     1569        else if (uScalableBusHz <= CPUM_SBUSFREQ_133MHZ)
     1570        {
     1571            uScalableBusHz = CPUM_SBUSFREQ_133MHZ;
     1572            uValue = 1;
     1573        }
     1574        else if (uScalableBusHz <= CPUM_SBUSFREQ_167MHZ)
     1575        {
     1576            uScalableBusHz = CPUM_SBUSFREQ_167MHZ;
     1577            uValue = 3;
     1578        }
     1579        else if (uScalableBusHz <= CPUM_SBUSFREQ_200MHZ)
     1580        {
     1581            uScalableBusHz = CPUM_SBUSFREQ_200MHZ;
     1582            uValue = 2;
     1583        }
     1584        else if (uScalableBusHz <= CPUM_SBUSFREQ_267MHZ && pVM->cpum.s.GuestFeatures.uModel > 2)
     1585        {
     1586            uScalableBusHz = CPUM_SBUSFREQ_267MHZ;
     1587            uValue = 0;
     1588        }
     1589        else
     1590        {
     1591            uScalableBusHz = CPUM_SBUSFREQ_333MHZ;
     1592            uValue = 6;
     1593        }
     1594        uValue <<= 16;
     1595
     1596        uint64_t uTscHz    = TMCpuTicksPerSecond(pVM);
     1597        uint8_t  uTscRatio = (uint8_t)((uTscHz + uScalableBusHz / 2) / uScalableBusHz);
     1598        uValue |= (uint32_t)uTscRatio << 24;
     1599
     1600        uValue |= pRange->uValue & ~UINT64_C(0xff0f0000);
     1601    }
     1602    else
     1603    {
     1604        /* Probably more stuff here, but intel doesn't want to tell us. */
     1605        uValue = pRange->uValue;
     1606        uValue &= ~(RT_BIT_64(21) | RT_BIT_64(22) | RT_BIT_64(23)); /* 100 MHz is only documented value */
     1607    }
     1608
     1609    *puValue = uValue;
     1610    return VINF_SUCCESS;
     1611}
     1612
     1613
     1614/** @callback_method_impl{FNCPUMWRMSR} */
     1615static DECLCALLBACK(int) cpumMsrWr_IntelP4EbcFrequencyId(PVMCPU pVCpu, uint32_t idMsr, PCCPUMMSRRANGE pRange, uint64_t uValue, uint64_t uRawValue)
     1616{
    15321617    /** @todo P4 bus frequency config  */
    1533     *puValue = pRange->uValue;
    1534     return VINF_SUCCESS;
    1535 }
    1536 
    1537 
    1538 /** @callback_method_impl{FNCPUMWRMSR} */
    1539 static DECLCALLBACK(int) cpumMsrWr_IntelP4EbcFrequencyId(PVMCPU pVCpu, uint32_t idMsr, PCCPUMMSRRANGE pRange, uint64_t uValue, uint64_t uRawValue)
    1540 {
    1541     /** @todo P4 bus frequency config  */
    1542     return VINF_SUCCESS;
    1543 }
    1544 
    1545 
    1546 /** @callback_method_impl{FNCPUMRDMSR} */
    1547 static DECLCALLBACK(int) cpumMsrRd_IntelPlatformInfo100MHz(PVMCPU pVCpu, uint32_t idMsr, PCCPUMMSRRANGE pRange, uint64_t *puValue)
    1548 {
    1549     PVM pVM = pVCpu->CTX_SUFF(pVM);
    1550 
     1618    return VINF_SUCCESS;
     1619}
     1620
     1621
     1622/** @callback_method_impl{FNCPUMRDMSR} */
     1623static DECLCALLBACK(int) cpumMsrRd_IntelP6FsbFrequency(PVMCPU pVCpu, uint32_t idMsr, PCCPUMMSRRANGE pRange, uint64_t *puValue)
     1624{
     1625    /* Convert the scalable bus frequency to the encoding in the intel manual (for core+). */
     1626    uint64_t uScalableBusHz = CPUMGetGuestScalableBusFrequency(pVCpu->CTX_SUFF(pVM));
     1627    if (uScalableBusHz <= CPUM_SBUSFREQ_100MHZ)
     1628        *puValue = 5;
     1629    else if (uScalableBusHz <= CPUM_SBUSFREQ_133MHZ)
     1630        *puValue = 1;
     1631    else if (uScalableBusHz <= CPUM_SBUSFREQ_167MHZ)
     1632        *puValue = 3;
     1633    else if (uScalableBusHz <= CPUM_SBUSFREQ_200MHZ)
     1634        *puValue = 2;
     1635    else if (uScalableBusHz <= CPUM_SBUSFREQ_267MHZ)
     1636        *puValue = 0;
     1637    else if (uScalableBusHz <= CPUM_SBUSFREQ_333MHZ)
     1638        *puValue = 4;
     1639    else /*if (uScalableBusHz <= CPUM_SBUSFREQ_400MHZ)*/
     1640        *puValue = 6;
     1641
     1642    *puValue |= pRange->uValue & ~UINT64_C(0x7);
     1643
     1644    return VINF_SUCCESS;
     1645}
     1646
     1647
     1648/** @callback_method_impl{FNCPUMRDMSR} */
     1649static DECLCALLBACK(int) cpumMsrRd_IntelPlatformInfo(PVMCPU pVCpu, uint32_t idMsr, PCCPUMMSRRANGE pRange, uint64_t *puValue)
     1650{
    15511651    /* Just indicate a fixed TSC, no turbo boost, no programmable anything. */
    1552     uint64_t uTscHz = TMCpuTicksPerSecond(pVM);
    1553     uint8_t  uTsc100MHz = (uint8_t)(uTscHz / UINT32_C(100000000));
    1554     *puValue = ((uint32_t)uTsc100MHz << 8)   /* TSC invariant frequency. */
    1555              | ((uint64_t)uTsc100MHz << 40); /* The max turbo frequency. */
     1652    PVM      pVM            = pVCpu->CTX_SUFF(pVM);
     1653    uint64_t uScalableBusHz = CPUMGetGuestScalableBusFrequency(pVM);
     1654    uint64_t uTscHz         = TMCpuTicksPerSecond(pVM);
     1655    uint8_t  uTscRatio      = (uint8_t)((uTscHz + uScalableBusHz / 2) / uScalableBusHz);
     1656    uint64_t uValue         = ((uint32_t)uTscRatio << 8)   /* TSC invariant frequency. */
     1657                            | ((uint64_t)uTscRatio << 40); /* The max turbo frequency. */
    15561658
    15571659    /* Ivy bridge has a minimum operating ratio as well. */
    15581660    if (true) /** @todo detect sandy bridge. */
    1559         *puValue |= (uint64_t)uTsc100MHz << 48;
    1560 
    1561     return VINF_SUCCESS;
    1562 }
    1563 
    1564 
    1565 /** @callback_method_impl{FNCPUMRDMSR} */
    1566 static DECLCALLBACK(int) cpumMsrRd_IntelPlatformInfo133MHz(PVMCPU pVCpu, uint32_t idMsr, PCCPUMMSRRANGE pRange, uint64_t *puValue)
    1567 {
    1568     /* Just indicate a fixed TSC, no turbo boost, no programmable anything. */
    1569     uint64_t uTscHz = TMCpuTicksPerSecond(pVCpu->CTX_SUFF(pVM));
    1570     uint8_t  uTsc133MHz = (uint8_t)(uTscHz / UINT32_C(133333333));
    1571     *puValue = ((uint32_t)uTsc133MHz << 8)   /* TSC invariant frequency. */
    1572              | ((uint64_t)uTsc133MHz << 40); /* The max turbo frequency. */
    1573     return VINF_SUCCESS;
    1574 }
    1575 
    1576 
    1577 /** @callback_method_impl{FNCPUMRDMSR} */
    1578 static DECLCALLBACK(int) cpumMsrRd_IntelFlexRatio100MHz(PVMCPU pVCpu, uint32_t idMsr, PCCPUMMSRRANGE pRange, uint64_t *puValue)
     1661        uValue |= (uint64_t)uTscRatio << 48;
     1662
     1663    *puValue = uValue;
     1664    return VINF_SUCCESS;
     1665}
     1666
     1667
     1668/** @callback_method_impl{FNCPUMRDMSR} */
     1669static DECLCALLBACK(int) cpumMsrRd_IntelFlexRatio(PVMCPU pVCpu, uint32_t idMsr, PCCPUMMSRRANGE pRange, uint64_t *puValue)
    15791670{
    15801671    uint64_t uValue = pRange->uValue & ~UINT64_C(0x1ff00);
    15811672
    1582     uint64_t uTscHz = TMCpuTicksPerSecond(pVCpu->CTX_SUFF(pVM));
    1583     uint8_t  uTsc100MHz = (uint8_t)(uTscHz / UINT32_C(100000000));
    1584     uValue |= (uint32_t)uTsc100MHz << 8;
     1673    PVM      pVM            = pVCpu->CTX_SUFF(pVM);
     1674    uint64_t uScalableBusHz = CPUMGetGuestScalableBusFrequency(pVM);
     1675    uint64_t uTscHz         = TMCpuTicksPerSecond(pVM);
     1676    uint8_t  uTscRatio      = (uint8_t)((uTscHz + uScalableBusHz / 2) / uScalableBusHz);
     1677    uValue |= (uint32_t)uTscRatio << 8;
    15851678
    15861679    *puValue = uValue;
    … …  
    15901683
    15911684/** @callback_method_impl{FNCPUMWRMSR} */
    1592 static DECLCALLBACK(int) cpumMsrWr_IntelFlexRatio100MHz(PVMCPU pVCpu, uint32_t idMsr, PCCPUMMSRRANGE pRange, uint64_t uValue, uint64_t uRawValue)
    1593 {
    1594     /** @todo implement writing MSR_FLEX_RATIO. */
    1595     return VINF_SUCCESS;
    1596 }
    1597 
    1598 
    1599 /** @callback_method_impl{FNCPUMRDMSR} */
    1600 static DECLCALLBACK(int) cpumMsrRd_IntelFlexRatio133MHz(PVMCPU pVCpu, uint32_t idMsr, PCCPUMMSRRANGE pRange, uint64_t *puValue)
    1601 {
    1602     uint64_t uValue = pRange->uValue & ~UINT64_C(0x1ff00);
    1603 
    1604     uint64_t uTscHz = TMCpuTicksPerSecond(pVCpu->CTX_SUFF(pVM));
    1605     uint8_t  uTsc133MHz = (uint8_t)(uTscHz / UINT32_C(133333333));
    1606     uValue |= (uint32_t)uTsc133MHz << 8;
    1607 
    1608     *puValue = uValue;
    1609     return VINF_SUCCESS;
    1610 }
    1611 
    1612 
    1613 /** @callback_method_impl{FNCPUMWRMSR} */
    1614 static DECLCALLBACK(int) cpumMsrWr_IntelFlexRatio133MHz(PVMCPU pVCpu, uint32_t idMsr, PCCPUMMSRRANGE pRange, uint64_t uValue, uint64_t uRawValue)
     1685static DECLCALLBACK(int) cpumMsrWr_IntelFlexRatio(PVMCPU pVCpu, uint32_t idMsr, PCCPUMMSRRANGE pRange, uint64_t uValue, uint64_t uRawValue)
    16151686{
    16161687    /** @todo implement writing MSR_FLEX_RATIO. */
    … …  
    43094380    cpumMsrRd_Ia32P5McType,
    43104381    cpumMsrRd_Ia32TimestampCounter,
     4382    cpumMsrRd_Ia32PlatformId,
    43114383    cpumMsrRd_Ia32ApicBase,
    43124384    cpumMsrRd_Ia32FeatureControl,
    … …  
    43884460    cpumMsrRd_IntelP4EbcSoftPowerOn,
    43894461    cpumMsrRd_IntelP4EbcFrequencyId,
    4390     cpumMsrRd_IntelPlatformInfo100MHz,
    4391     cpumMsrRd_IntelPlatformInfo133MHz,
    4392     cpumMsrRd_IntelFlexRatio100MHz,
    4393     cpumMsrRd_IntelFlexRatio133MHz,
     4462    cpumMsrRd_IntelP6FsbFrequency,
     4463    cpumMsrRd_IntelPlatformInfo,
     4464    cpumMsrRd_IntelFlexRatio,
    43944465    cpumMsrRd_IntelPkgCStConfigControl,
    43954466    cpumMsrRd_IntelPmgIoCaptureBase,
    … …  
    46274698    cpumMsrWr_IntelP4EbcSoftPowerOn,
    46284699    cpumMsrWr_IntelP4EbcFrequencyId,
    4629     cpumMsrWr_IntelFlexRatio100MHz,
    4630     cpumMsrWr_IntelFlexRatio133MHz,
     4700    cpumMsrWr_IntelFlexRatio,
    46314701    cpumMsrWr_IntelPkgCStConfigControl,
    46324702    cpumMsrWr_IntelPmgIoCaptureBase,
    … …  
    50005070    CPUM_ASSERT_RD_MSR_FN(Ia32P5McType);
    50015071    CPUM_ASSERT_RD_MSR_FN(Ia32TimestampCounter);
     5072    CPUM_ASSERT_RD_MSR_FN(Ia32PlatformId);
    50025073    CPUM_ASSERT_RD_MSR_FN(Ia32ApicBase);
    50035074    CPUM_ASSERT_RD_MSR_FN(Ia32FeatureControl);
    … …  
    50785149    CPUM_ASSERT_RD_MSR_FN(IntelP4EbcSoftPowerOn);
    50795150    CPUM_ASSERT_RD_MSR_FN(IntelP4EbcFrequencyId);
    5080     CPUM_ASSERT_RD_MSR_FN(IntelPlatformInfo100MHz);
    5081     CPUM_ASSERT_RD_MSR_FN(IntelPlatformInfo133MHz);
    5082     CPUM_ASSERT_RD_MSR_FN(IntelFlexRatio100MHz);
    5083     CPUM_ASSERT_RD_MSR_FN(IntelFlexRatio133MHz);
     5151    CPUM_ASSERT_RD_MSR_FN(IntelP6FsbFrequency);
     5152    CPUM_ASSERT_RD_MSR_FN(IntelPlatformInfo);
     5153    CPUM_ASSERT_RD_MSR_FN(IntelFlexRatio);
    50845154    CPUM_ASSERT_RD_MSR_FN(IntelPkgCStConfigControl);
    50855155    CPUM_ASSERT_RD_MSR_FN(IntelPmgIoCaptureBase);
    … …  
    53065376    CPUM_ASSERT_WR_MSR_FN(IntelP4EbcSoftPowerOn);
    53075377    CPUM_ASSERT_WR_MSR_FN(IntelP4EbcFrequencyId);
    5308     CPUM_ASSERT_WR_MSR_FN(IntelFlexRatio100MHz);
    5309     CPUM_ASSERT_WR_MSR_FN(IntelFlexRatio133MHz);
     5378    CPUM_ASSERT_WR_MSR_FN(IntelFlexRatio);
    53105379    CPUM_ASSERT_WR_MSR_FN(IntelPkgCStConfigControl);
    53115380    CPUM_ASSERT_WR_MSR_FN(IntelPmgIoCaptureBase);
    … …  
    54535522
    54545523/**
    5455  * Gets the bus frequency.
     5524 * Gets the scalable bus frequency.
    54565525 *
    54575526 * The bus frequency is used as a base in several MSRs that gives the CPU and
    54585527 * other frequency ratios.
    54595528 *
    5460  * @returns Bus frequency in Hz.
     5529 * @returns Scalable bus frequency in Hz. Will not return CPUM_SBUSFREQ_UNKNOWN.
    54615530 * @param   pVM                 Pointer to the shared VM structure.
    54625531 */
    5463 VMMDECL(uint64_t) CPUMGetGuestBusFrequency(PVM pVM)
    5464 {
    5465     if (CPUMMICROARCH_IS_INTEL_CORE7(pVM->cpum.s.GuestFeatures.enmMicroarch))
    5466     {
    5467         return pVM->cpum.s.GuestFeatures.enmMicroarch >= kCpumMicroarch_Intel_Core7_SandyBridge
    5468             ? UINT64_C(100000000)  /* 100MHz */
    5469             : UINT64_C(133333333); /* 133MHz */
    5470     }
    5471 
    5472     /* 133MHz */
    5473     return UINT64_C(133333333);
     5532VMMDECL(uint64_t) CPUMGetGuestScalableBusFrequency(PVM pVM)
     5533{
     5534    uint64_t uFreq = pVM->cpum.s.GuestInfo.uScalableBusFreq;
     5535    if (uFreq == CPUM_SBUSFREQ_UNKNOWN)
     5536        uFreq = CPUM_SBUSFREQ_100MHZ;
     5537    return uFreq;
    54745538}
    54755539

  • trunk/src/VBox/VMM/VMMR3/CPUM.cpp

    r50255 r50590  
    988988    AssertLogRelRCReturn(rc, rc);
    989989
     990    /*
     991     * Adjust the scalable bus frequency according to the CPUID information
     992     * we're now using.
     993     */
     994    if (CPUMMICROARCH_IS_INTEL_CORE7(pVM->cpum.s.GuestFeatures.enmMicroarch))
     995        pCPUM->GuestInfo.uScalableBusFreq = pCPUM->GuestFeatures.enmMicroarch >= kCpumMicroarch_Intel_Core7_SandyBridge
     996                                          ? UINT64_C(100000000)  /* 100MHz */
     997                                          : UINT64_C(133333333); /* 133MHz */
    990998
    991999    /*

  • trunk/src/VBox/VMM/VMMR3/CPUMR3Db.cpp

    r50157 r50590  
    4949    /** The microarchitecture. */
    5050    CPUMMICROARCH   enmMicroarch;
     51    /** Scalable bus frequency used for reporting other frequencies. */
     52    uint64_t        uScalableBusFreq;
    5153    /** Flags (TBD). */
    5254    uint32_t        fFlags;
    … …  
    668670    pInfo->iFirstExtCpuIdLeaf   = 0; /* Set by caller. */
    669671    pInfo->uPadding             = 0;
     672    pInfo->uScalableBusFreq     = pEntry->uScalableBusFreq;
    670673    pInfo->paCpuIdLeavesR0      = NIL_RTR0PTR;
    671674    pInfo->paMsrRangesR0        = NIL_RTR0PTR;

  • trunk/src/VBox/VMM/VMMR3/cpus/AMD_Athlon_64_3200.h

    r49972 r50590  
    205205    /*.uStepping        = */ 8,
    206206    /*.enmMicroarch     = */ kCpumMicroarch_AMD_K8_130nm,
     207    /*.uScalableBusFreq = */ CPUM_SBUSFREQ_UNKNOWN,
    207208    /*.fFlags           = */ 0,
    208209    /*.cMaxPhysAddrWidth= */ 40,

  • trunk/src/VBox/VMM/VMMR3/cpus/AMD_FX_8150_Eight_Core.h

    r49995 r50590  
    364364    /*.uStepping        = */ 2,
    365365    /*.enmMicroarch     = */ kCpumMicroarch_AMD_15h_Bulldozer,
     366    /*.uScalableBusFreq = */ CPUM_SBUSFREQ_UNKNOWN,
    366367    /*.fFlags           = */ 0,
    367368    /*.cMaxPhysAddrWidth= */ 48,

  • trunk/src/VBox/VMM/VMMR3/cpus/AMD_Phenom_II_X6_1100T.h

    r49995 r50590  
    253253    /*.uStepping        = */ 0,
    254254    /*.enmMicroarch     = */ kCpumMicroarch_AMD_K10,
     255    /*.uScalableBusFreq = */ CPUM_SBUSFREQ_UNKNOWN,
    255256    /*.fFlags           = */ 0,
    256257    /*.cMaxPhysAddrWidth= */ 48,

  • trunk/src/VBox/VMM/VMMR3/cpus/Intel_Core_i5_3570.h

    r50584 r50590  
    6464    MFX(0x00000006, "IA32_MONITOR_FILTER_LINE_SIZE", Ia32MonitorFilterLineSize, Ia32MonitorFilterLineSize, 0, 0, UINT64_C(0xffffffffffff0000)), /* value=0x40 */
    6565    MFN(0x00000010, "IA32_TIME_STAMP_COUNTER", Ia32TimestampCounter, Ia32TimestampCounter), /* value=0x4293`b0a3f54a */
    66     MVO(0x00000017, "IA32_PLATFORM_ID", UINT64_C(0x4000000000000)),
     66    MFV(0x00000017, "IA32_PLATFORM_ID", Ia32PlatformId, ReadOnly, UINT64_C(0x4000000000000)),
    6767    MFX(0x0000001b, "IA32_APIC_BASE", Ia32ApicBase, Ia32ApicBase, UINT32_C(0xfee00c00), 0, UINT64_C(0xfffffff0000002ff)),
    6868    MFX(0x0000002a, "EBL_CR_POWERON", IntelEblCrPowerOn, ReadOnly, 0, 0, 0), /* value=0x0 */
    … …  
    7878    MFO(0x0000009b, "IA32_SMM_MONITOR_CTL", Ia32SmmMonitorCtl), /* value=0x0 */
    7979    RSN(0x000000c1, 0x000000c8, "IA32_PMCn", Ia32PmcN, Ia32PmcN, 0x0, ~(uint64_t)UINT32_MAX, 0),
    80     MFO(0x000000ce, "MSR_PLATFORM_INFO", IntelPlatformInfo100MHz), /* value=0x81010'e0012200*/
     80    MFO(0x000000ce, "MSR_PLATFORM_INFO", IntelPlatformInfo), /* value=0x81010'e0012200*/
    8181    MFX(0x000000e2, "MSR_PKG_CST_CONFIG_CONTROL", IntelPkgCStConfigControl, IntelPkgCStConfigControl, 0, 0, UINT64_C(0xffffffffe1ffffff)), /* value=0x1e008403 */
    8282    MFX(0x000000e4, "MSR_PMG_IO_CAPTURE_BASE", IntelPmgIoCaptureBase, IntelPmgIoCaptureBase, 0, 0, UINT64_C(0xfffffffffff80000)), /* value=0x10414 */
    … …  
    9999    MFX(0x0000017a, "IA32_MCG_STATUS", Ia32McgStatus, Ia32McgStatus, 0, 0, UINT64_C(0xfffffffffffffff8)), /* value=0x0 */
    100100    RSN(0x00000186, 0x0000018d, "IA32_PERFEVTSELn", Ia32PerfEvtSelN, Ia32PerfEvtSelN, 0x0, 0, UINT64_C(0xffffffff00080000)),
    101     MFX(0x00000194, "CLOCK_FLEX_MAX", IntelFlexRatio100MHz, IntelFlexRatio100MHz, 0x190000, 0x1e00ff, UINT64_C(0xffffffffffe00000)),
     101    MFX(0x00000194, "CLOCK_FLEX_MAX", IntelFlexRatio, IntelFlexRatio, 0x190000, 0x1e00ff, UINT64_C(0xffffffffffe00000)),
    102102    MFX(0x00000198, "IA32_PERF_STATUS", Ia32PerfStatus, ReadOnly, UINT64_C(0x1d2400001000), 0, 0), /* value=0x1d24`00001000 */
    103103    MFX(0x00000199, "IA32_PERF_CTL", Ia32PerfCtl, Ia32PerfCtl, 0x1000, 0, 0), /* Might bite. value=0x1000 */
    … …  
    320320    /*.uStepping        = */ 9,
    321321    /*.enmMicroarch     = */ kCpumMicroarch_Intel_Core7_IvyBridge,
     322    /*.uScalableBusFreq = */ CPUM_SBUSFREQ_100MHZ,
    322323    /*.fFlags           = */ 0,
    323324    /*.cMaxPhysAddrWidth= */ 36,

  • trunk/src/VBox/VMM/VMMR3/cpus/Intel_Core_i7_3820QM.h

    r49922 r50590  
    6464    MFX(0x00000006, "IA32_MONITOR_FILTER_LINE_SIZE", Ia32MonitorFilterLineSize, Ia32MonitorFilterLineSize, 0, 0, UINT64_C(0xffffffffffff0000)), /* value=0x40 */
    6565    MFX(0x00000010, "IA32_TIME_STAMP_COUNTER", Ia32TimestampCounter, Ia32TimestampCounter, 0, 0, 0),
    66     MVO(0x00000017, "IA32_PLATFORM_ID", UINT64_C(0x10000000000000)),
     66    MFV(0x00000017, "IA32_PLATFORM_ID", Ia32PlatformId, ReadOnly, UINT64_C(0x10000000000000)),
    6767    MFX(0x0000001b, "IA32_APIC_BASE", Ia32ApicBase, Ia32ApicBase, UINT32_C(0xfee00900), 0, UINT64_C(0xfffffff0000002ff)),
    6868    MFX(0x0000002a, "EBL_CR_POWERON", IntelEblCrPowerOn, ReadOnly, 0, 0, 0), /* value=0x0 */
    … …  
    362362    /*.uStepping        = */ 9,
    363363    /*.enmMicroarch     = */ kCpumMicroarch_Intel_Core7_IvyBridge,
     364    /*.uScalableBusFreq = */ CPUM_SBUSFREQ_UNKNOWN,
    364365    /*.fFlags           = */ 0,
    365366    /*.cMaxPhysAddrWidth= */ 36,

  • trunk/src/VBox/VMM/VMMR3/cpus/Intel_Core_i7_3960X.h

    r50584 r50590  
    7373    MFX(0x00000006, "IA32_MONITOR_FILTER_LINE_SIZE", Ia32MonitorFilterLineSize, Ia32MonitorFilterLineSize, 0, 0, UINT64_C(0xffffffffffff0000)), /* value=0x40 */
    7474    MFN(0x00000010, "IA32_TIME_STAMP_COUNTER", Ia32TimestampCounter, Ia32TimestampCounter), /* value=0x177ab4`48466b19 */
    75     MVO(0x00000017, "IA32_PLATFORM_ID", UINT64_C(0x8000000000000)),
     75    MFV(0x00000017, "IA32_PLATFORM_ID", Ia32PlatformId, ReadOnly, UINT64_C(0x8000000000000)),
    7676    MFX(0x0000001b, "IA32_APIC_BASE", Ia32ApicBase, Ia32ApicBase, UINT32_C(0xfee00800), 0, UINT64_C(0xffffc000000002ff)),
    7777    MFX(0x0000002a, "EBL_CR_POWERON", IntelEblCrPowerOn, ReadOnly, 0, 0, 0), /* value=0x0 */
    … …  
    8686    MFO(0x0000009b, "IA32_SMM_MONITOR_CTL", Ia32SmmMonitorCtl), /* value=0x0 */
    8787    RSN(0x000000c1, 0x000000c4, "IA32_PMCn", Ia32PmcN, Ia32PmcN, 0x0, ~(uint64_t)UINT32_MAX, 0),
    88     MFO(0x000000ce, "MSR_PLATFORM_INFO", IntelPlatformInfo100MHz), /* value=0xc00'70012100*/
     88    MFO(0x000000ce, "MSR_PLATFORM_INFO", IntelPlatformInfo), /* value=0xc00'70012100*/
    8989    MFX(0x000000e2, "MSR_PKG_CST_CONFIG_CONTROL", IntelPkgCStConfigControl, IntelPkgCStConfigControl, 0, 0, UINT64_C(0xffffffffe1ffffff)), /* value=0x1e008400 */
    9090    MFX(0x000000e4, "MSR_PMG_IO_CAPTURE_BASE", IntelPmgIoCaptureBase, IntelPmgIoCaptureBase, 0, 0, UINT64_C(0xfffffffffff80000)), /* value=0x20414 */
    … …  
    103103    MFX(0x0000017f, "I7_SB_ERROR_CONTROL", IntelI7SandyErrorControl, IntelI7SandyErrorControl, 0, 0xc, UINT64_C(0xffffffffffffffe1)), /* value=0x0 */
    104104    RSN(0x00000186, 0x00000189, "IA32_PERFEVTSELn", Ia32PerfEvtSelN, Ia32PerfEvtSelN, 0x0, 0, UINT64_C(0xffffffff00080000)),
    105     MFX(0x00000194, "CLOCK_FLEX_MAX", IntelFlexRatio100MHz, IntelFlexRatio100MHz, 0xf2100, 0xe0000, UINT64_C(0xfffffffffff00000)),
     105    MFX(0x00000194, "CLOCK_FLEX_MAX", IntelFlexRatio, IntelFlexRatio, 0xf2100, 0xe0000, UINT64_C(0xfffffffffff00000)),
    106106    MFX(0x00000198, "IA32_PERF_STATUS", Ia32PerfStatus, ReadOnly, UINT64_C(0x288300002400), 0, 0), /* value=0x2883`00002400 */
    107107    MFX(0x00000199, "IA32_PERF_CTL", Ia32PerfCtl, Ia32PerfCtl, 0x2700, 0, 0), /* Might bite. value=0x2700 */
    … …  
    350350    /*.uStepping        = */ 6,
    351351    /*.enmMicroarch     = */ kCpumMicroarch_Intel_Core7_SandyBridge,
     352    /*.uScalableBusFreq = */ CPUM_SBUSFREQ_100MHZ,
    352353    /*.fFlags           = */ 0,
    353354    /*.cMaxPhysAddrWidth= */ 46,

  • trunk/src/VBox/VMM/VMMR3/cpus/Intel_Pentium_4_3_00GHz.h

    r49966 r50590  
    5858    MFX(0x00000006, "IA32_MONITOR_FILTER_LINE_SIZE", Ia32MonitorFilterLineSize, Ia32MonitorFilterLineSize, 0, UINT64_C(0xffffffffffff0000), 0), /* value=0x40 */
    5959    MFN(0x00000010, "IA32_TIME_STAMP_COUNTER", Ia32TimestampCounter, Ia32TimestampCounter), /* value=0x1ac`2077a134 */
    60     MVI(0x00000017, "IA32_PLATFORM_ID", UINT64_C(0x12000000000000)),
     60    MFV(0x00000017, "IA32_PLATFORM_ID", Ia32PlatformId, ReadOnly, UINT64_C(0x12000000000000)),
    6161    MFX(0x0000001b, "IA32_APIC_BASE", Ia32ApicBase, Ia32ApicBase, UINT32_C(0xfee00800), 0x600, UINT64_C(0xffffff00000000ff)),
    6262    MFX(0x0000002a, "P4_EBC_HARD_POWERON", IntelP4EbcHardPowerOn, IntelP4EbcHardPowerOn, 0, UINT64_MAX, 0), /* value=0x0 */
    … …  
    258258    /*.uStepping        = */ 3,
    259259    /*.enmMicroarch     = */ kCpumMicroarch_Intel_NB_Prescott2M,
     260    /*.uScalableBusFreq = */ CPUM_SBUSFREQ_UNKNOWN,
    260261    /*.fFlags           = */ 0,
    261262    /*.cMaxPhysAddrWidth= */ 36,

  • trunk/src/VBox/VMM/VMMR3/cpus/Intel_Pentium_M_processor_2_00GHz.h

    r49922 r50590  
    4848    MFI(0x00000001, "IA32_P5_MC_TYPE", Ia32P5McType), /* value=0x0 */
    4949    MFX(0x00000010, "IA32_TIME_STAMP_COUNTER", Ia32TimestampCounter, Ia32TimestampCounter, 0, ~(uint64_t)UINT32_MAX, 0), /* value=0x22`4d44782e */
    50     MVO(0x00000017, "IA32_PLATFORM_ID", UINT64_C(0x140000d0248a28)),
     50    MFV(0x00000017, "IA32_PLATFORM_ID", Ia32PlatformId, ReadOnly, UINT64_C(0x140000d0248a28)),
    5151    MVX(0x00000018, "P6_UNK_0000_0018", 0, 0, 0),
    5252    MFX(0x0000001b, "IA32_APIC_BASE", Ia32ApicBase, Ia32ApicBase, UINT32_C(0xfee00100), UINT64_C(0xffffffff00000600), 0xff),
    … …  
    8989    MFX(0x000000c2, "IA32_PMC1", Ia32PmcN, Ia32PmcN, 0, ~(uint64_t)UINT32_MAX, 0), /* value=0x0 */
    9090    MVI(0x000000c7, "P6_UNK_0000_00c7", UINT64_C(0x5a000000ac000000)),
    91     MVO(0x000000cd, "P6_UNK_0000_00cd", 0),
     91    MFX(0x000000cd, "MSR_FSB_FREQ", IntelP6FsbFrequency, ReadOnly, 0, 0, 0),
    9292    MVO(0x000000ce, "P6_UNK_0000_00ce", UINT64_C(0x2812140000000000)),
    9393    MFX(0x000000fe, "IA32_MTRRCAP", Ia32MtrrCap, ReadOnly, 0x508, 0, 0), /* value=0x508 */
    … …  
    197197    /*.uStepping        = */ 6,
    198198    /*.enmMicroarch     = */ kCpumMicroarch_Intel_P6_M_Dothan,
     199    /*.uScalableBusFreq = */ CPUM_SBUSFREQ_UNKNOWN,
    199200    /*.fFlags           = */ 0,
    200201    /*.cMaxPhysAddrWidth= */ 32,

  • trunk/src/VBox/VMM/VMMR3/cpus/Intel_Xeon_X5482_3_20GHz.h

    r49927 r50590  
    6161    MFX(0x00000006, "IA32_MONITOR_FILTER_LINE_SIZE", Ia32MonitorFilterLineSize, Ia32MonitorFilterLineSize, 0, 0, UINT64_C(0xffffffffffff0000)), /* value=0x40 */
    6262    MFN(0x00000010, "IA32_TIME_STAMP_COUNTER", Ia32TimestampCounter, Ia32TimestampCounter), /* value=0x1358`d28c2c60 */
    63     MVO(0x00000017, "IA32_PLATFORM_ID", UINT64_C(0x18000088e40822)),
     63    MFV(0x00000017, "IA32_PLATFORM_ID", Ia32PlatformId, ReadOnly, UINT64_C(0x18000088e40822)),
    6464    MFX(0x0000001b, "IA32_APIC_BASE", Ia32ApicBase, Ia32ApicBase, UINT32_C(0xfee00800), 0, UINT64_C(0xffffffc0000006ff)),
    6565    MVX(0x00000021, "C2_UNK_0000_0021", 0, 0, UINT64_C(0xffffffffffffffc0)),
    … …  
    8383    RSN(0x000000c1, 0x000000c2, "IA32_PMCn", Ia32PmcN, Ia32PmcN, 0x0, ~(uint64_t)UINT32_MAX, 0),
    8484    MVI(0x000000c7, "P6_UNK_0000_00c7", UINT64_C(0x2300000052000000)),
    85     MVO(0x000000cd, "P6_UNK_0000_00cd", 0x806),
     85    MFX(0x000000cd, "P6_MSR_FSB_FREQ", IntelP6FsbFrequency, ReadOnly, 0x806, 0, 0),
    8686    MVO(0x000000ce, "P6_UNK_0000_00ce", UINT64_C(0x1208227f7f0710)),
    8787    MVO(0x000000cf, "C2_UNK_0000_00cf", 0),
    … …  
    226226    /*.uStepping        = */ 6,
    227227    /*.enmMicroarch     = */ kCpumMicroarch_Intel_Core2_Penryn,
     228    /*.uScalableBusFreq = */ CPUM_SBUSFREQ_400MHZ,
    228229    /*.fFlags           = */ 0,
    229230    /*.cMaxPhysAddrWidth= */ 38,

  • trunk/src/VBox/VMM/VMMR3/cpus/Quad_Core_AMD_Opteron_2384.h

    r49995 r50590  
    251251    /*.uStepping        = */ 2,
    252252    /*.enmMicroarch     = */ kCpumMicroarch_AMD_K10,
     253    /*.uScalableBusFreq = */ CPUM_SBUSFREQ_UNKNOWN,
    253254    /*.fFlags           = */ 0,
    254255    /*.cMaxPhysAddrWidth= */ 48,

  • trunk/src/VBox/VMM/VMMR3/cpus/VIA_QuadCore_L4700_1_2_GHz.h

    r49993 r50590  
    8080    RSN(0x000000c1, 0x000000c3, "IA32_PMCn", Ia32PmcN, Ia32PmcN, 0x0, UINT64_C(0xffffff0000000000), 0), /* XXX: The range ended earlier than expected! */
    8181    RVI(0x000000c4, 0x000000cc, "ZERO_0000_00c4_THRU_0000_00cc", 0),
    82     MVO(0x000000cd, "P6_UNK_0000_00cd", 0),
     82    MFX(0x000000cd, "MSR_FSB_FREQ", IntelP6FsbFrequency, ReadOnly, 0, 0, 0),
    8383    RVI(0x000000ce, 0x000000e1, "ZERO_0000_00ce_THRU_0000_00e1", 0),
    8484    MFI(0x000000e2, "MSR_PKG_CST_CONFIG_CONTROL", IntelPkgCStConfigControl), /* value=0x6a204 */
    … …  
    385385    /*.uStepping        = */ 13,
    386386    /*.enmMicroarch     = */ kCpumMicroarch_VIA_Isaiah,
     387    /*.uScalableBusFreq = */ CPUM_SBUSFREQ_267MHZ, /*??*/
    387388    /*.fFlags           = */ 0,
    388389    /*.cMaxPhysAddrWidth= */ 36,

  • trunk/src/VBox/VMM/include/CPUMInternal.h

    r50584 r50590  
    130130    kCpumMsrRdFn_Ia32P5McType,
    131131    kCpumMsrRdFn_Ia32TimestampCounter,
     132    kCpumMsrRdFn_Ia32PlatformId,            /**< Takes real CPU value for reference. */
    132133    kCpumMsrRdFn_Ia32ApicBase,
    133134    kCpumMsrRdFn_Ia32FeatureControl,
    … …  
    209210    kCpumMsrRdFn_IntelP4EbcSoftPowerOn,
    210211    kCpumMsrRdFn_IntelP4EbcFrequencyId,
    211     kCpumMsrRdFn_IntelPlatformInfo100MHz,
    212     kCpumMsrRdFn_IntelPlatformInfo133MHz,
    213     kCpumMsrRdFn_IntelFlexRatio100MHz,      /**< Takes real value as reference. */
    214     kCpumMsrRdFn_IntelFlexRatio133MHz,      /**< Takes real value as reference. */
     212    kCpumMsrRdFn_IntelP6FsbFrequency,       /**< Takes real value as reference. */
     213    kCpumMsrRdFn_IntelPlatformInfo,
     214    kCpumMsrRdFn_IntelFlexRatio,            /**< Takes real value as reference. */
    215215    kCpumMsrRdFn_IntelPkgCStConfigControl,
    216216    kCpumMsrRdFn_IntelPmgIoCaptureBase,
    … …  
    456456    kCpumMsrWrFn_IntelP4EbcSoftPowerOn,
    457457    kCpumMsrWrFn_IntelP4EbcFrequencyId,
    458     kCpumMsrWrFn_IntelFlexRatio100MHz,
    459     kCpumMsrWrFn_IntelFlexRatio133MHz,
     458    kCpumMsrWrFn_IntelFlexRatio,
    460459    kCpumMsrWrFn_IntelPkgCStConfigControl,
    461460    kCpumMsrWrFn_IntelPmgIoCaptureBase,
    … …  
    746745     *  Set to cCpuIdLeaves if none present. */
    747746    uint32_t                    iFirstExtCpuIdLeaf;
     747    /** Alignment padding.  */
     748    uint32_t                    uPadding;
    748749    /** How to handle unknown CPUID leaves. */
    749750    CPUMUKNOWNCPUID             enmUnknownCpuIdMethod;
    … …  
    751752    CPUMCPUID                   DefCpuId;
    752753
    753     /** Alignment padding. */
    754     uint32_t                    uPadding;
     754    /** Scalable bus frequency used for reporting other frequencies. */
     755    uint64_t                    uScalableBusFreq;
    755756
    756757    /** Pointer to the MSR ranges (ring-0 pointer). */

  • trunk/src/VBox/VMM/include/CPUMInternal.mac

    r49893 r50590  
    9090%endif
    9191
    92     .GuestInfo            resb    RTHCPTR_CB*4 + RTRCPTR_CB*2 + 4*10
     92    .GuestInfo            resb    RTHCPTR_CB*4 + RTRCPTR_CB*2 + 4*12
    9393    .GuestFeatures        resb    32
    9494    .HostFeatures         resb    32

  • trunk/src/VBox/VMM/tools/VBoxCpuReport.cpp

    r50584 r50590  
    7171/** The alternative debug stream. */
    7272static PRTSTREAM        g_pDebugOut;
     73
     74/** Snooping info storage for vbCpuRepGuessScalableBusFrequencyName. */
     75static uint64_t         g_uMsrIntelP6FsbFrequency = UINT64_MAX;
    7376
    7477
    … …  
    694697        case 0x000000c7: return g_enmMicroarch >= kCpumMicroarch_Intel_Core7_First ? "IA32_PMC6" : "P6_UNK_0000_00c7"; /* P6_M_Dothan. */
    695698        case 0x000000c8: return g_enmMicroarch >= kCpumMicroarch_Intel_Core7_First ? "IA32_PMC7" : NULL;
    696         case 0x000000cd: return "P6_UNK_0000_00cd"; /* P6_M_Dothan. */
     699        case 0x000000cd: return "MSR_FSB_FREQ"; /* P6_M_Dothan. */
    697700        case 0x000000ce: return g_enmMicroarch >= kCpumMicroarch_Intel_Core7_First ? "IA32_PLATFORM_INFO" : "P6_UNK_0000_00ce"; /* P6_M_Dothan. */
    698701        case 0x000000cf: return "C2_UNK_0000_00cf"; /* Core2_Penryn. */
    … …  
    18011804            return "Ia32MonitorFilterLineSize";
    18021805        case 0x00000010: return "Ia32TimestampCounter";
     1806        case 0x00000017: *pfTakesValue = true; return "Ia32PlatformId";
    18031807        case 0x0000001b: return "Ia32ApicBase";
    18041808        case 0x0000002a: *pfTakesValue = true; return g_fIntelNetBurst ? "IntelP4EbcHardPowerOn" : "IntelEblCrPowerOn";
    … …  
    18431847            return NULL;
    18441848
    1845         case 0x000000ce: return CPUMMICROARCH_IS_INTEL_CORE7(g_enmMicroarch)
    1846                               ? (g_enmMicroarch >= kCpumMicroarch_Intel_Core7_SandyBridge
    1847                                  ? "IntelPlatformInfo100MHz" : "IntelPlatformInfo133MHz")
    1848                               : NULL;
    1849 
     1849        case 0x000000cd: *pfTakesValue = true; return "IntelP6FsbFrequency";
     1850        case 0x000000ce: return CPUMMICROARCH_IS_INTEL_CORE7(g_enmMicroarch)  ? "IntelPlatformInfo" : NULL;
    18501851        case 0x000000e2: return "IntelPkgCStConfigControl";
    18511852        case 0x000000e3: return "IntelCore2SmmCStMiscInfo";
    … …  
    18821883        case 0x00000187: return "Ia32PerfEvtSelN";
    18831884        case 0x00000193: return /*g_fIntelNetBurst ? NULL :*/ NULL /* Core2_Penryn. */;
    1884         case 0x00000194:
    1885             if (g_fIntelNetBurst)
    1886                 break;
    1887             *pfTakesValue = true;
    1888             return CPUMMICROARCH_IS_INTEL_CORE7(g_enmMicroarch) && g_enmMicroarch >= kCpumMicroarch_Intel_Core7_SandyBridge
    1889                  ? "IntelFlexRatio100MHz" : "IntelFlexRatio133MHz";
     1885        case 0x00000194: if (g_fIntelNetBurst) break;   *pfTakesValue = true; return "IntelFlexRatio";
    18901886        case 0x00000198: *pfTakesValue = true; return "Ia32PerfStatus";
    18911887        case 0x00000199: *pfTakesValue = true; return "Ia32PerfCtl";
    … …  
    40974093        if (RT_FAILURE(rc))
    40984094            return rc;
     4095
     4096        /*
     4097         *  A little ugly snooping.
     4098         */
     4099        if (uMsr == 0x000000cd && !(fFlags & VBCPUREPMSR_F_WRITE_ONLY))
     4100            g_uMsrIntelP6FsbFrequency = uValue;
    40994101    }
    41004102
    … …  
    43164318
    43174319
     4320/**
     4321 * Takes a shot a the bus frequency name (last part).
     4322 *
     4323 * @returns Name suffix.
     4324 */
     4325static const char *vbCpuRepGuessScalableBusFrequencyName(void)
     4326{
     4327    if (CPUMMICROARCH_IS_INTEL_CORE7(g_enmMicroarch))
     4328        return g_enmMicroarch >= kCpumMicroarch_Intel_Core7_SandyBridge ? "100MHZ" : "133MHZ";
     4329
     4330    if (g_uMsrIntelP6FsbFrequency != UINT64_MAX)
     4331        switch (g_uMsrIntelP6FsbFrequency & 0x7)
     4332        {
     4333            case 5: return "100MHZ";
     4334            case 1: return "133MHZ";
     4335            case 3: return "167MHZ";
     4336            case 2: return "200MHZ";
     4337            case 0: return "267MHZ";
     4338            case 4: return "333MHZ";
     4339            case 6: return "400MHZ";
     4340        }
     4341
     4342    return "UNKNOWN";
     4343}
     4344
     4345
    43184346static int produceCpuReport(void)
    43194347{
    … …  
    45084536                   "    /*.uStepping        = */ %u,\n"
    45094537                   "    /*.enmMicroarch     = */ kCpumMicroarch_%s,\n"
     4538                   "    /*.uScalableBusFreq = */ CPUM_SBUSFREQ_%s,\n"
    45104539                   "    /*.fFlags           = */ 0,\n"
    45114540                   "    /*.cMaxPhysAddrWidth= */ %u,\n"
    … …  
    45304559                   ASMGetCpuStepping(uEax),
    45314560                   CPUMR3MicroarchName(enmMicroarch),
     4561                   vbCpuRepGuessScalableBusFrequencyName(),
    45324562                   vbCpuRepGetPhysAddrWidth(),
    45334563                   szNameC,
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