Changeset 51563 in vbox for trunk/src/VBox

Timestamp:

Jun 6, 2014 6:09:36 AM (11 years ago)

Author:

vboxsync

svn:sync-xref-src-repo-rev:

94221

Message:

VMM/GIM: bits.

Location:

trunk/src/VBox/VMM

Files:

• VMMAll/GIMAll.cpp (modified) (3 diffs)
• VMMAll/GIMAllHv.cpp (modified) (4 diffs)
• include/GIMHvInternal.h (modified) (1 diff)

trunk/src/VBox/VMM/VMMAll/GIMAll.cpp

@@ -102 +102 @@
 
 
+VMMDECL(bool) GIMIsParavirtTscEnabled(PVM pVM)
+{
+    if (!pVM->gim.s.fEnabled)
+        return false;
+
+    switch (pVM->gim.s.enmProviderId)
+    {
+        case GIMPROVIDERID_HYPERV:
+            return GIMHvIsParavirtTscEnabled(pVM);
+
+        default:
+            break;
+    }
+    return false;
+}
+
+
 /**
  * Invokes the read-MSR handler for the GIM provider configured for the VM.
@@ -142 +159 @@
 VMM_INT_DECL(int) GIMWriteMsr(PVMCPU pVCpu, uint32_t idMsr, PCCPUMMSRRANGE pRange, uint64_t uValue, uint64_t uRawValue)
 {
-    Assert(pVCpu);
+    AssertPtr(pVCpu);
+    NOREF(uValue);
+
     PVM pVM = pVCpu->CTX_SUFF(pVM);
     Assert(GIMIsEnabled(pVM));
@@ -150 +169 @@
     {
         case GIMPROVIDERID_HYPERV:
-            return GIMHvWriteMsr(pVCpu, idMsr, pRange, uValue, uRawValue);
+            return GIMHvWriteMsr(pVCpu, idMsr, pRange, uRawValue);
 
         default:

trunk/src/VBox/VMM/VMMAll/GIMAllHv.cpp

@@ -37 +37 @@
  * @param   pCtx            Pointer to the guest-CPU context.
  */
-VMMDECL(int) GIMHvHypercall(PVMCPU pVCpu, PCPUMCTX pCtx)
+VMM_INT_DECL(int) GIMHvHypercall(PVMCPU pVCpu, PCPUMCTX pCtx)
 {
     return VINF_SUCCESS;
+}
+
+
+/**
+ * Returns whether the guest has configured and enabled the use of Hyper-V's
+ * paravirtualized TSC.
+ *
+ * @returns true if paravirt. TSC is enabled, false otherwise.
+ * @param   pVM     Pointer to the VM.
+ */
+VMM_INT_DECL(bool) GIMHvIsParavirtTscEnabled(PVM pVM)
+{
+    return MSR_GIM_HV_REF_TSC_IS_ENABLED(pVM->gim.s.u.Hv.u64TscPageMsr);
 }
 
@@ -51 +64 @@
  * @thread EMT(pVCpu)
  */
-VMMDECL(int) GIMHvUpdateParavirtTsc(PVM pVM, uint64_t u64Offset)
+VMM_INT_DECL(int) GIMHvUpdateParavirtTsc(PVM pVM, uint64_t u64Offset)
 {
     Assert(GIMIsEnabled(pVM));
@@ -81 +94 @@
  * @param   puValue     Where to store the MSR value read.
  */
-VMMDECL(int) GIMHvReadMsr(PVMCPU pVCpu, uint32_t idMsr, PCCPUMMSRRANGE pRange, uint64_t *puValue)
+VMM_INT_DECL(int) GIMHvReadMsr(PVMCPU pVCpu, uint32_t idMsr, PCCPUMMSRRANGE pRange, uint64_t *puValue)
 {
     NOREF(pRange);
@@ -140 +153 @@
  * @param   idMsr       The MSR being written.
  * @param   pRange      The range this MSR belongs to.
- * @param   uValue      The value to set, ignored bits masked.
  * @param   uRawValue   The raw value with the ignored bits not masked.
  */
-VMMDECL(int) GIMHvWriteMsr(PVMCPU pVCpu, uint32_t idMsr, PCCPUMMSRRANGE pRange, uint64_t uValue, uint64_t uRawValue)
-{
-    NOREF(pRange); NOREF(uValue);
+VMM_INT_DECL(int) GIMHvWriteMsr(PVMCPU pVCpu, uint32_t idMsr, PCCPUMMSRRANGE pRange, uint64_t uRawValue)
+{
+    NOREF(pRange);
     PVM    pVM = pVCpu->CTX_SUFF(pVM);
     PGIMHV pHv = &pVM->gim.s.u.Hv;

trunk/src/VBox/VMM/include/GIMHvInternal.h

@@ -477 +477 @@
 
 #ifdef IN_RING0
-VMMR0_INT_DECL(int)     GIMR0HvInitVM(PVM pVM);
-VMMR0_INT_DECL(int)     GIMR0HvTermVM(PVM pVM);
+VMMR0_INT_DECL(int)             GIMR0HvInitVM(PVM pVM);
+VMMR0_INT_DECL(int)             GIMR0HvTermVM(PVM pVM);
 #endif /* IN_RING0 */
 
 #ifdef IN_RING3
-VMMR3_INT_DECL(int)     GIMR3HvInit(PVM pVM);
-VMMR3_INT_DECL(void)    GIMR3HvRelocate(PVM pVM, RTGCINTPTR offDelta);
-VMMR3_INT_DECL(void)    GIMR3HvReset(PVM pVM);
+VMMR3_INT_DECL(int)             GIMR3HvInit(PVM pVM);
+VMMR3_INT_DECL(void)            GIMR3HvRelocate(PVM pVM, RTGCINTPTR offDelta);
+VMMR3_INT_DECL(void)            GIMR3HvReset(PVM pVM);
 VMMR3_INT_DECL(PGIMMMIO2REGION) GIMR3HvGetMmio2Regions(PVM pVM, uint32_t *pcRegions);
 #endif /* IN_RING3 */
 
-VMMDECL(int)            GIMHvUpdateParavirtTsc(PVM pVM, uint64_t u64Offset);
-VMMDECL(int)            GIMHvHypercall(PVMCPU pVCpu, PCPUMCTX pCtx);
-VMMDECL(int)            GIMHvReadMsr(PVMCPU pVCpu, uint32_t idMsr, PCCPUMMSRRANGE pRange, uint64_t *puValue);
-VMMDECL(int)            GIMHvWriteMsr(PVMCPU pVCpu, uint32_t idMsr, PCCPUMMSRRANGE pRange, uint64_t uValue, uint64_t uRawValue);
+VMM_INT_DECL(bool)              GIMHvIsParavirtTscEnabled(PVM pVM);
+VMM_INT_DECL(int)               GIMHvUpdateParavirtTsc(PVM pVM, uint64_t u64Offset);
+VMM_INT_DECL(int)               GIMHvHypercall(PVMCPU pVCpu, PCPUMCTX pCtx);
+VMM_INT_DECL(int)               GIMHvReadMsr(PVMCPU pVCpu, uint32_t idMsr, PCCPUMMSRRANGE pRange, uint64_t *puValue);
+VMM_INT_DECL(int)               GIMHvWriteMsr(PVMCPU pVCpu, uint32_t idMsr, PCCPUMMSRRANGE pRange, uint64_t uRawValue);
 
 RT_C_DECLS_END