Changeset 52009 in vbox
- Timestamp:
- Jul 14, 2014 5:27:31 AM (11 years ago)
- svn:sync-xref-src-repo-rev:
- 94972
- Location:
- trunk/src/VBox
- Files:
-
- 7 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/Main/src-client/ConsoleImpl2.cpp
r52004 r52009 1218 1218 && fOsXGuest) 1219 1219 { 1220 /* When adding new OS X types, please add corresponding types to GIMOSID and 1221 update GIMR3IsOSXGuest(). */ 1220 1222 GIMOSID enmOsId = GIMOSID_OSX; 1221 1223 if (osTypeId == "MacOS_64") -
trunk/src/VBox/VMM/VMMR0/HMSVMR0.cpp
r52006 r52009 5132 5132 STAM_COUNTER_INC(&pVCpu->hm.s.StatExitGuestDB); 5133 5133 5134 5135 5134 /* This can be a fault-type #DB (instruction breakpoint) or a trap-type #DB (data breakpoint). However, for both cases 5136 5135 DR6 and DR7 are updated to what the exception handler expects. See AMD spec. 15.12.2 "#DB (Debug)". */ -
trunk/src/VBox/VMM/VMMR0/HMVMXR0.cpp
r52006 r52009 6385 6385 * 6386 6386 * The present bit and the unusable bit has been observed to be set at the 6387 * same time (the selector was supposed to invalid as we started executing6387 * same time (the selector was supposed to be invalid as we started executing 6388 6388 * a V8086 interrupt in ring-0). 6389 6389 * -
trunk/src/VBox/VMM/VMMR3/GIMMinimal.cpp
r51797 r52009 64 64 uMaxIntelFamilyModelStep = RT_MAKE_U32_FROM_U8(1, 23, 6, 7); /* Penryn / X5482. */ 65 65 break; 66 66 67 case GIMOSID_OSX_106: 67 68 case GIMOSID_OSX_106_64: 68 69 uMaxIntelFamilyModelStep = RT_MAKE_U32_FROM_U8(1, 23, 6, 7); /* Penryn / X5482 */ 69 70 break; 71 70 72 case GIMOSID_OSX_107: 71 73 case GIMOSID_OSX_107_64: … … 73 75 uMaxIntelFamilyModelStep = RT_MAKE_U32_FROM_U8(1, 23, 6, 7); /* Penryn / X5482 */ 74 76 break; 77 75 78 case GIMOSID_OSX_108: 76 79 case GIMOSID_OSX_108_64: … … 78 81 uMaxIntelFamilyModelStep = RT_MAKE_U32_FROM_U8(1, 23, 6, 7); /* Penryn / X5482 */ 79 82 break; 83 80 84 case GIMOSID_OSX_109: 81 85 case GIMOSID_OSX_109_64: … … 91 95 { 92 96 CPUMCPUIDLEAF Leaf; 93 int rc = CPUMR3CpuIdGetLeaf(pVM, &Leaf, 1, 0 );97 int rc = CPUMR3CpuIdGetLeaf(pVM, &Leaf, 1, 0 /* uSubLeaf */); 94 98 if (RT_SUCCESS(rc)) 95 99 { … … 101 105 { 102 106 uint32_t uNew = Leaf.uEax & UINT32_C(0xf0003000); 103 uNew |= RT_BYTE1(uMaxIntelFamilyModelStep) & 0xf; /* stepping */104 uNew |= (RT_BYTE2(uMaxIntelFamilyModelStep) & 0xf) << 4; /* 4 low model bits */105 uNew |= (RT_BYTE2(uMaxIntelFamilyModelStep) >> 4) << 16; /* 4 high model bits */106 uNew |= (RT_BYTE3(uMaxIntelFamilyModelStep) & 0xf) << 8; /* 4 low family bits */107 uNew |= RT_BYTE1(uMaxIntelFamilyModelStep) & 0xf; /* stepping */ 108 uNew |= (RT_BYTE2(uMaxIntelFamilyModelStep) & 0xf) << 4; /* 4 low model bits */ 109 uNew |= (RT_BYTE2(uMaxIntelFamilyModelStep) >> 4) << 16; /* 4 high model bits */ 110 uNew |= (RT_BYTE3(uMaxIntelFamilyModelStep) & 0xf) << 8; /* 4 low family bits */ 107 111 /* 8 high family bits, Intel's suggested calculation. */ 108 112 if (RT_BYTE3(uMaxIntelFamilyModelStep) > 0xf) … … 133 137 } 134 138 135 /** @todo Register CPUID leaves, MSR ranges with CPUM. */136 /** -XXX_ CPUMGetGuestCpuId CPUMGetGuestCpuVendor CPUMR3CpuIdInsert */137 139 return VINF_SUCCESS; 138 140 } -
trunk/src/VBox/VMM/VMMR3/VM.cpp
r51640 r52009 986 986 if (RT_SUCCESS(rc)) 987 987 { 988 /* GIM must be init'd before PDM, DevGIM construction may989 require GIM provider to be setup. */988 /* GIM must be init'd before PDM, gimdevR3Construct() 989 requires GIM provider to be setup. */ 990 990 rc = GIMR3Init(pVM); 991 991 if (RT_SUCCESS(rc)) -
trunk/src/VBox/VMM/include/GIMHvInternal.h
r52006 r52009 21 21 #include <VBox/vmm/gim.h> 22 22 #include <VBox/vmm/cpum.h> 23 24 /** 25 * GIM Hyper-V saved-state version. 26 */ 27 #define GIM_HV_SSM_VERSION 0x1 23 28 24 29 /** @name Hyper-V base feature identification. -
trunk/src/VBox/VMM/include/GIMInternal.h
r51797 r52009 44 44 /** The provider that is active for this VM. */ 45 45 GIMPROVIDERID enmProviderId; 46 /** The interface version. */46 /** The interface implementation version. */ 47 47 uint32_t u32Version; 48 48
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