Changeset 52465 in vbox

Timestamp:

Aug 22, 2014 11:39:08 AM (11 years ago)

Author:

vboxsync

svn:sync-xref-src-repo-rev:

95680

Message:

VMM: Fix IEM FXSAVE implementation to match the logic in HM/raw-mode FPU handling.

Location:

trunk

Files:

• include/iprt/x86.h (modified) (2 diffs)
• include/iprt/x86.mac (modified) (1 diff)
• src/VBox/VMM/VMMAll/IEMAllCImpl.cpp.h (modified) (1 diff)
• src/VBox/VMM/VMMR0/CPUMR0A.asm (modified) (3 diffs)

trunk/include/iprt/x86.h

@@ -2344 +2344 @@
     } aXMM[16]; /* 8 registers in 32 bits mode; 16 in long mode */
     /* - offset 416 - */
-    uint32_t    au32RsrvdRest[(512 - 416) / sizeof(uint32_t)];
+    uint32_t    au32RsrvdRest[(464 - 416) / sizeof(uint32_t)];
+    /* - offset 464 - Software usable reserved bits. */
+    uint32_t    au32RsrvdForSoftware[(512 - 464) / sizeof(uint32_t)];
 } X86FXSTATE;
 #pragma pack()
@@ -2351 +2353 @@
 /** Pointer to a const FPU Extended state. */
 typedef const X86FXSTATE *PCX86FXSTATE;
+
+/** Offset for software usable reserved bits (464:511) where we store a 32-bit
+ *  magic. Don't forget to update x86.mac if you change this! */
+#define X86_OFF_FXSTATE_RSVD            0x1d0
+/** The 32-bit magic used to recognize if this a 32-bit FPU state. Don't
+ *  forget to update x86.mac if you change this! */
+#define X86_FXSTATE_RSVD_32BIT_MAGIC    0x32b3232b
+AssertCompileSize(X86FXSTATE, 512);
+AssertCompileMemberOffset(X86FXSTATE, au32RsrvdForSoftware, 0x1d0);
 
 /** @name FPU status word flags.

trunk/include/iprt/x86.mac

@@ -271 +271 @@
 %define X86_DR7_RW_LEN_ALL_MASKS            0xffff0000
 %define X86_DR7_INIT_VAL                    0x400
+%define X86_OFF_FXSTATE_RSVD                0x1d0
+%define X86_FXSTATE_RSVD_32BIT_MAGIC        0x32b3232b
 %define MSR_P5_MC_ADDR                      0x00000000
 %define MSR_P5_MC_TYPE                      0x00000001

trunk/src/VBox/VMM/VMMAll/IEMAllCImpl.cpp.h

@@ -5505 +5505 @@
 
     /* FPU IP, CS, DP and DS. */
-    /** @todo FPU IP, CS, DP and DS cannot be implemented correctly without extra
-     * state information. :-/
-     * Storing zeros now to prevent any potential leakage of host info. */
-    pDst->FPUIP  = 0;
-    pDst->CS     = 0;
-    pDst->Rsrvd1 = 0;
-    pDst->FPUDP  = 0;
-    pDst->DS     = 0;
-    pDst->Rsrvd2 = 0;
+    pDst->FPUIP  = pCtx->fpu.FPUIP;
+    pDst->CS     = pCtx->fpu.CS;
+    pDst->FPUDP  = pCtx->fpu.FPUDP;
+    pDst->DS     = pCtx->fpu.DS;
+    if (enmEffOpSize == IEMMODE_64BIT)
+    {
+        /* Save upper 16-bits of FPUIP (IP:CS:Rsvd1) and FPUDP (DP:DS:Rsvd2). */
+        pDst->Rsrvd1 = pCtx->fpu.Rsrvd1;
+        pDst->Rsrvd2 = pCtx->fpu.Rsrvd2;
+        pDst->au32RsrvdForSoftware[0] = 0;
+    }
+    else
+    {
+        pDst->Rsrvd1 = 0;
+        pDst->Rsrvd2 = 0;
+        pDst->au32RsrvdForSoftware[0] = X86_FXSTATE_RSVD_32BIT_MAGIC;
+    }
 
     /* XMM registers. */

trunk/src/VBox/VMM/VMMR0/CPUMR0A.asm

@@ -37 +37 @@
 ; Use define because I'm too lazy to convert the struct.
 %define XMM_OFF_IN_X86FXSTATE   160
-%define RSVD_OFF_IN_X86FXSTATE  2ch     ; Reserved upper 32-bit part of ST(0)/MM0.
 %define IP_OFF_IN_X86FXSTATE    08h
 %define CS_OFF_IN_X86FXSTATE    0ch
 %define DS_OFF_IN_X86FXSTATE    14h
-
-; Must fit into the dword (32-bits) at RSVD_OFF_IN_X86FXSTATE.
-%define FPUSTATE_32BIT_MAGIC    032b3232bh
 
 
@@ -122 +118 @@
     mov         [rdx + CPUMCPU.Guest.fpu + DS_OFF_IN_X86FXSTATE], eax
     add         rsp, 20h
-    mov         dword [rdx + CPUMCPU.Guest.fpu + RSVD_OFF_IN_X86FXSTATE], FPUSTATE_32BIT_MAGIC
+    mov         dword [rdx + CPUMCPU.Guest.fpu + X86_OFF_FXSTATE_RSVD], X86_FXSTATE_RSVD_32BIT_MAGIC
 %%save_done:
 %endmacro
@@ -131 +127 @@
 ; @remarks Requires CPUMCPU pointer in RDX
 %macro RESTORE_32_OR_64_FPU 0
-    cmp         dword [rdx + CPUMCPU.Guest.fpu + RSVD_OFF_IN_X86FXSTATE], FPUSTATE_32BIT_MAGIC
+    cmp         dword [rdx + CPUMCPU.Guest.fpu + X86_OFF_FXSTATE_RSVD], X86_FXSTATE_RSVD_32BIT_MAGIC
     jne         short %%restore_64bit_fpu
-    ; We probably don't need to wipe out the reserved field - safer this way due to our limited testing
-    mov         word [rdx + CPUMCPU.Guest.fpu + RSVD_OFF_IN_X86FXSTATE], 0
     fxrstor     [rdx + CPUMCPU.Guest.fpu]
-    mov         dword [rdx + CPUMCPU.Guest.fpu + RSVD_OFF_IN_X86FXSTATE], FPUSTATE_32BIT_MAGIC
     jmp         short %%restore_fpu_done
 %%restore_64bit_fpu: