Changeset 53435 in vbox
- Timestamp:
- Dec 3, 2014 6:03:25 PM (10 years ago)
- File:
-
- 1 edited
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trunk/include/VBox/sup.h
r53430 r53435 33 33 #include <iprt/stdarg.h> 34 34 #include <iprt/cpuset.h> 35 #include <iprt/asm-amd64-x86.h> 35 #if defined(RT_ARCH_AMD64) || defined(RT_ARCH_X86) 36 # include <iprt/asm-amd64-x86.h> 37 #endif 36 38 37 39 RT_C_DECLS_BEGIN … … 427 429 SUPDECL(PSUPGLOBALINFOPAGE) SUPGetGIP(void); 428 430 429 431 #if defined(RT_ARCH_AMD64) || defined(RT_ARCH_X86) 430 432 /** 431 433 * Gets the TSC frequency of the calling CPU. … … 448 450 Assert(pGip->u32Mode == SUPGIPMODE_ASYNC_TSC); 449 451 iCpu = pGip->aiCpuFromApicId[ASMGetApicId()]; 450 if ( iCpu >= pGip->cCpus)452 if (RT_UNLIKELY(iCpu >= pGip->cCpus)) 451 453 return UINT64_MAX; 452 454 } … … 454 456 return pGip->aCPUs[iCpu].u64CpuHz; 455 457 } 456 458 #endif /* X86 || AMD64 */ 457 459 458 460 /** … … 1483 1485 switch (pGip->u32Mode) 1484 1486 { 1485 case SUPGIPMODE_INVARIANT_TSC: return "Invariant";1486 case SUPGIPMODE_SYNC_TSC: return "Synchronous";1487 case SUPGIPMODE_ASYNC_TSC: return "Asynchronous";1488 case SUPGIPMODE_INVALID: return "Invalid";1489 default: return "???";1487 case SUPGIPMODE_INVARIANT_TSC: return "Invariant"; 1488 case SUPGIPMODE_SYNC_TSC: return "Synchronous"; 1489 case SUPGIPMODE_ASYNC_TSC: return "Asynchronous"; 1490 case SUPGIPMODE_INVALID: return "Invalid"; 1491 default: return "???"; 1490 1492 } 1491 1493 } … … 1504 1506 && pGip->u32Mode == SUPGIPMODE_INVARIANT_TSC) 1505 1507 { 1506 uint64_t uLo; 1507 uint64_t uHi; 1508 1509 if (pGip->u64CpuHz == u64CpuHz) 1510 return true; 1511 1512 /* Arbitrary tolerance threshold, tweak later if required, perhaps 1513 more tolerance on lower frequencies and less tolerance on higher. */ 1514 uLo = (pGip->u64CpuHz << 10) / 1025; 1515 uHi = pGip->u64CpuHz + (pGip->u64CpuHz - uLo); 1516 if ( u64CpuHz < uLo 1517 || u64CpuHz > uHi) 1518 return false; 1508 if (pGip->u64CpuHz != u64CpuHz) 1509 { 1510 /* Arbitrary tolerance threshold, tweak later if required, perhaps 1511 more tolerance on lower frequencies and less tolerance on higher. */ 1512 uint64_t uLo = (pGip->u64CpuHz << 10) / 1025; 1513 uint64_t uHi = pGip->u64CpuHz + (pGip->u64CpuHz - uLo); 1514 if ( u64CpuHz < uLo 1515 || u64CpuHz > uHi) 1516 return false; 1517 } 1519 1518 return true; 1520 1519 } … … 1522 1521 } 1523 1522 1523 #if defined(RT_ARCH_AMD64) || defined(RT_ARCH_X86) 1524 1524 1525 1525 /** … … 1533 1533 * applied or not (optional, can be NULL). 1534 1534 * 1535 * @note If you change the delta calculation made here, make sure to update the1536 * assembly version in sup.mac! Also update supdrvGipMpEvent() while1537 * re-adjusting deltas while choosing a new GIP master.1538 1535 * @remarks Maybe called with interrupts disabled in ring-0! 1536 * 1537 * @note If you change the delta calculation made here, make sure to update 1538 * the assembly version in sup.mac! Also update supdrvGipMpEvent() 1539 * while re-adjusting deltas while choosing a new GIP master. 1539 1540 */ 1540 1541 DECLINLINE(int) SUPTscDeltaApply(PSUPGLOBALINFOPAGE pGip, uint64_t *puTsc, uint16_t idApic, bool *pfDeltaApplied) … … 1567 1568 1568 1569 /** 1569 * Gets the delta-adjusted TSC, must only be called when GIP mode is invariant 1570 * (i.e. when TSC deltas are likely to be computed and available). 1571 * 1572 * In other GIP modes, like async, we don't bother with computing TSC deltas and 1573 * therefore it is meaningless to call this function, use SUPReadTSC() instead. 1570 * Gets the delta-adjusted TSC. 1571 * 1572 * Must only be called when GIP mode is invariant (i.e. when TSC deltas are 1573 * likely to be computed and available). In other GIP modes, like async, we 1574 * don't bother with computing TSC deltas and therefore it is meaningless to 1575 * call this function, use SUPReadTSC() instead. 1574 1576 * 1575 1577 * @returns VBox status code. … … 1585 1587 DECLINLINE(int) SUPGetTsc(uint64_t *puTsc, uint16_t *pidApic) 1586 1588 { 1587 # ifdef IN_RING31589 # ifdef IN_RING3 1588 1590 return SUPR3ReadTsc(puTsc, pidApic); 1589 # else1591 # else 1590 1592 RTCCUINTREG uFlags; 1591 1593 uint16_t idApic; … … 1607 1609 AssertRCReturn(rc, rc); 1608 1610 return fDeltaApplied ? VINF_SUCCESS : VERR_SUPDRV_TSC_READ_FAILED; 1609 # endif1611 # endif 1610 1612 } 1611 1613 … … 1613 1615 /** 1614 1616 * Reads the host TSC value. 1617 * 1615 1618 * If applicable, normalizes the host TSC value with intercpu TSC deltas. 1616 1619 * … … 1628 1631 return u64Tsc; 1629 1632 } 1630 else 1631 return ASMReadTSC(); 1633 return ASMReadTSC(); 1632 1634 } 1635 1636 #endif /* X86 || AMD64 */ 1633 1637 1634 1638
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