Changeset 53607 in vbox for trunk/src/VBox
- Timestamp:
- Dec 30, 2014 1:48:21 PM (10 years ago)
- Location:
- trunk/src/VBox/ValidationKit/utils/cpu
- Files:
-
- 3 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/ValidationKit/utils/cpu/cidet-app.cpp
r53579 r53607 48 48 # include <signal.h> 49 49 # include <unistd.h> 50 # include <sys/ucontext.h> 50 51 #endif 51 52 … … 121 122 /** Stack size (= pbStackEnd - pbStackLow). */ 122 123 uint32_t cbStack; 124 /** Whether we're currently using the 'lock int3' to deal with tricky stack. */ 125 bool fUsingLockedInt3; 123 126 } CIDETAPP; 124 127 /** Pointer to a CIDET driver app instance. */ … … 411 414 { 412 415 # if 1 413 RTStrmPrintf(g_pStdErr, "signal %d pSigInfo=%p pvCtx=%p", iSignal, pSigInfo, pvCtx); 414 if (pSigInfo) 415 RTStrmPrintf(g_pStdErr, " si_addr=%p si_code=%#x sival_ptr=%p sival_int=%d", 416 pSigInfo->si_addr, pSigInfo->si_code, pSigInfo->si_value.sival_ptr, pSigInfo->si_value.sival_int); 417 RTStrmPrintf(g_pStdErr, "\n"); 416 if ( !g_pExecutingThis 417 || !g_pExecutingThis->fUsingLockedInt3 418 || iSignal != SIGILL) 419 { 420 RTStrmPrintf(g_pStdErr, "signal %d pSigInfo=%p pvCtx=%p", iSignal, pSigInfo, pvCtx); 421 if (pSigInfo) 422 RTStrmPrintf(g_pStdErr, " si_addr=%p si_code=%#x sival_ptr=%p sival_int=%d", 423 pSigInfo->si_addr, pSigInfo->si_code, pSigInfo->si_value.sival_ptr, pSigInfo->si_value.sival_int); 424 RTStrmPrintf(g_pStdErr, "\n"); 425 } 418 426 # endif 419 427 … … 433 441 * Gather all the CPU state information available. 434 442 */ 435 443 # ifdef RT_OS_LINUX 444 ucontext_t const *pCtx = (ucontext_t const *)pvCtx; 445 # ifdef RT_ARCH_AMD64 446 447 pThis->Core.ActualCtx.aGRegs[X86_GREG_xAX] = pCtx->uc_mcontext.gregs[REG_RAX]; 448 pThis->Core.ActualCtx.aGRegs[X86_GREG_xCX] = pCtx->uc_mcontext.gregs[REG_RCX]; 449 pThis->Core.ActualCtx.aGRegs[X86_GREG_xDX] = pCtx->uc_mcontext.gregs[REG_RDX]; 450 pThis->Core.ActualCtx.aGRegs[X86_GREG_xBX] = pCtx->uc_mcontext.gregs[REG_RBX]; 451 pThis->Core.ActualCtx.aGRegs[X86_GREG_xSP] = pCtx->uc_mcontext.gregs[REG_RSP]; 452 pThis->Core.ActualCtx.aGRegs[X86_GREG_xBP] = pCtx->uc_mcontext.gregs[REG_RBP]; 453 pThis->Core.ActualCtx.aGRegs[X86_GREG_xSI] = pCtx->uc_mcontext.gregs[REG_RSI]; 454 pThis->Core.ActualCtx.aGRegs[X86_GREG_xDI] = pCtx->uc_mcontext.gregs[REG_RDI]; 455 pThis->Core.ActualCtx.aGRegs[X86_GREG_x8 ] = pCtx->uc_mcontext.gregs[REG_R8]; 456 pThis->Core.ActualCtx.aGRegs[X86_GREG_x9 ] = pCtx->uc_mcontext.gregs[REG_R9]; 457 pThis->Core.ActualCtx.aGRegs[X86_GREG_x10] = pCtx->uc_mcontext.gregs[REG_R10]; 458 pThis->Core.ActualCtx.aGRegs[X86_GREG_x11] = pCtx->uc_mcontext.gregs[REG_R11]; 459 pThis->Core.ActualCtx.aGRegs[X86_GREG_x12] = pCtx->uc_mcontext.gregs[REG_R12]; 460 pThis->Core.ActualCtx.aGRegs[X86_GREG_x13] = pCtx->uc_mcontext.gregs[REG_R13]; 461 pThis->Core.ActualCtx.aGRegs[X86_GREG_x14] = pCtx->uc_mcontext.gregs[REG_R14]; 462 pThis->Core.ActualCtx.aGRegs[X86_GREG_x15] = pCtx->uc_mcontext.gregs[REG_R15]; 463 pThis->Core.ActualCtx.aSRegs[X86_SREG_CS] = RT_LO_U16((uint32_t)pCtx->uc_mcontext.gregs[REG_CSGSFS]); 464 pThis->Core.ActualCtx.aSRegs[X86_SREG_GS] = RT_HI_U16((uint32_t)pCtx->uc_mcontext.gregs[REG_CSGSFS]); 465 pThis->Core.ActualCtx.aSRegs[X86_SREG_FS] = (uint16_t)RT_HI_U32(pCtx->uc_mcontext.gregs[REG_CSGSFS]); 466 pThis->Core.ActualCtx.aSRegs[X86_SREG_DS] = ASMGetDS(); 467 pThis->Core.ActualCtx.aSRegs[X86_SREG_ES] = ASMGetES(); 468 pThis->Core.ActualCtx.aSRegs[X86_SREG_SS] = ASMGetSS(); 469 pThis->Core.ActualCtx.rip = pCtx->uc_mcontext.gregs[REG_RIP]; 470 pThis->Core.ActualCtx.rfl = pCtx->uc_mcontext.gregs[REG_EFL]; 471 pThis->Core.ActualCtx.cr2 = pCtx->uc_mcontext.gregs[REG_CR2]; 472 pThis->Core.ActualCtx.uXcpt = pCtx->uc_mcontext.gregs[REG_TRAPNO]; 473 pThis->Core.ActualCtx.uErr = pCtx->uc_mcontext.gregs[REG_ERR]; 474 475 /* Fudge the FS register as it seems REG_CSGSFS isn't working right. */ 476 if ( pThis->Core.ActualCtx.aSRegs[X86_SREG_FS] == 0 477 && pThis->Core.ExpectedCtx.aSRegs[X86_SREG_FS] != 0) 478 pThis->Core.ActualCtx.aSRegs[X86_SREG_FS] = pThis->Core.ExpectedCtx.aSRegs[X86_SREG_FS]; 479 480 # elif defined(RT_ARCH_X86) 481 pThis->Core.ActualCtx.aGRegs[X86_GREG_xAX] = pCtx->uc_mcontext.gregs[REG_EAX]; 482 pThis->Core.ActualCtx.aGRegs[X86_GREG_xCX] = pCtx->uc_mcontext.gregs[REG_ECX]; 483 pThis->Core.ActualCtx.aGRegs[X86_GREG_xDX] = pCtx->uc_mcontext.gregs[REG_EDX]; 484 pThis->Core.ActualCtx.aGRegs[X86_GREG_xBX] = pCtx->uc_mcontext.gregs[REG_EBX]; 485 pThis->Core.ActualCtx.aGRegs[X86_GREG_xSP] = pCtx->uc_mcontext.gregs[REG_ESP]; 486 pThis->Core.ActualCtx.aGRegs[X86_GREG_xBP] = pCtx->uc_mcontext.gregs[REG_EBP]; 487 pThis->Core.ActualCtx.aGRegs[X86_GREG_xSI] = pCtx->uc_mcontext.gregs[REG_ESI]; 488 pThis->Core.ActualCtx.aGRegs[X86_GREG_xDI] = pCtx->uc_mcontext.gregs[REG_EDI]; 489 pThis->Core.ActualCtx.aSRegs[X86_SREG_CS] = pCtx->uc_mcontext.gregs[REG_CS]; 490 pThis->Core.ActualCtx.aSRegs[X86_SREG_DS] = pCtx->uc_mcontext.gregs[REG_DS]; 491 pThis->Core.ActualCtx.aSRegs[X86_SREG_ES] = pCtx->uc_mcontext.gregs[REG_ES]; 492 pThis->Core.ActualCtx.aSRegs[X86_SREG_FS] = pCtx->uc_mcontext.gregs[REG_FS]; 493 pThis->Core.ActualCtx.aSRegs[X86_SREG_GS] = pCtx->uc_mcontext.gregs[REG_GS]; 494 pThis->Core.ActualCtx.aSRegs[X86_SREG_SS] = pCtx->uc_mcontext.gregs[REG_SS]; 495 pThis->Core.ActualCtx.rip = pCtx->uc_mcontext.gregs[REG_EIP]; 496 pThis->Core.ActualCtx.rfl = pCtx->uc_mcontext.gregs[REG_EFL]; 497 pThis->Core.ActualCtx.cr2 = pCtx->uc_mcontext.cr2; 498 pThis->Core.ActualCtx.uXcpt = pCtx->uc_mcontext.gregs[REG_TRAPNO]; 499 pThis->Core.ActualCtx.uErr = pCtx->uc_mcontext.gregs[REG_ERR]; 500 501 # else 502 # error "Unsupported arch." 503 # endif 504 505 /* Adjust uErr. */ 506 switch (pThis->Core.ActualCtx.uXcpt) 507 { 508 case X86_XCPT_TS: 509 case X86_XCPT_NP: 510 case X86_XCPT_SS: 511 case X86_XCPT_GP: 512 case X86_XCPT_PF: 513 case X86_XCPT_AC: 514 case X86_XCPT_DF: 515 break; 516 default: 517 pThis->Core.ActualCtx.uErr = UINT64_MAX; 518 break; 519 } 520 521 /* Fudge the resume flag (it's probably always set here). */ 522 if ( (pThis->Core.ActualCtx.rfl & X86_EFL_RF) 523 && !(pThis->Core.ExpectedCtx.rfl & X86_EFL_RF)) 524 pThis->Core.ActualCtx.rfl &= ~X86_EFL_RF; 525 526 # else 527 /** @todo */ 528 # endif 529 530 531 /* 532 * Check for the 'lock int3' instruction used for tricky stacks. 533 */ 534 if ( pThis->fUsingLockedInt3 535 && pThis->Core.ActualCtx.uXcpt == X86_XCPT_UD 536 && pThis->Core.ActualCtx.rip == pThis->Core.CodeBuf.uEffBufAddr - pThis->Core.CodeBuf.offSegBase 537 + pThis->Core.CodeBuf.offActive + pThis->Core.CodeBuf.cbActive ) 538 { 539 pThis->Core.ActualCtx.uXcpt = UINT32_MAX; 540 Assert(pThis->Core.ActualCtx.uErr == UINT64_MAX); 541 } 436 542 437 543 /* … … 915 1021 /* int3 */ 916 1022 *pbDst++ = 0xcc; 1023 1024 pThisApp->fUsingLockedInt3 = false; 1025 917 1026 } 918 1027 else … … 922 1031 */ 923 1032 *pbDst++ = 0xf0; /* lock prefix */ 924 //*pbDst++ = 0xcc; /* lock prefix */925 1033 memset(pbDst, 0xcc, 15); /* int3 */ 926 1034 pbDst += 15; 1035 1036 pThisApp->fUsingLockedInt3 = true; 927 1037 } 928 1038 -
trunk/src/VBox/ValidationKit/utils/cpu/cidet-appA.asm
r53564 r53607 116 116 mov [xCX + CIDETCPUCTX.cr4], rax 117 117 mov [xCX + CIDETCPUCTX.cr8], rax 118 mov [xCX + CIDETCPUCTX.dr0], rax 119 mov [xCX + CIDETCPUCTX.dr1], rax 120 mov [xCX + CIDETCPUCTX.dr2], rax 121 mov [xCX + CIDETCPUCTX.dr3], rax 122 mov [xCX + CIDETCPUCTX.dr6], rax 123 mov [xCX + CIDETCPUCTX.dr7], rax 118 124 %else 119 125 xor eax, eax … … 154 160 mov [xCX + CIDETCPUCTX.cr8 ], eax 155 161 mov [xCX + CIDETCPUCTX.cr8 + 4], eax 162 mov [xCX + CIDETCPUCTX.dr0 ], eax 163 mov [xCX + CIDETCPUCTX.dr0 + 4], eax 164 mov [xCX + CIDETCPUCTX.dr1 ], eax 165 mov [xCX + CIDETCPUCTX.dr1 + 4], eax 166 mov [xCX + CIDETCPUCTX.dr2 ], eax 167 mov [xCX + CIDETCPUCTX.dr2 + 4], eax 168 mov [xCX + CIDETCPUCTX.dr3 ], eax 169 mov [xCX + CIDETCPUCTX.dr3 + 4], eax 170 mov [xCX + CIDETCPUCTX.dr6 ], eax 171 mov [xCX + CIDETCPUCTX.dr6 + 4], eax 172 mov [xCX + CIDETCPUCTX.dr7 ], eax 173 mov [xCX + CIDETCPUCTX.dr7 + 4], eax 156 174 %endif 157 175 mov [xCX + CIDETCPUCTX.tr], ax 158 176 mov [xCX + CIDETCPUCTX.ldtr], ax 177 dec xAX 178 mov [xCX + CIDETCPUCTX.uErr], xAX 179 %ifdef RT_ARCH_X86 180 mov [xCX + CIDETCPUCTX.uErr + 4], eax 181 %endif 182 mov [xCX + CIDETCPUCTX.uXcpt], eax 159 183 160 184 ; -
trunk/src/VBox/ValidationKit/utils/cpu/cidet-core.cpp
r53579 r53607 272 272 pThis->InTemplateCtx.cr8 = 0; 273 273 pThis->InTemplateCtx.fIgnoredRFlags = 0; 274 pThis->InTemplateCtx.uXcpt = 0;275 pThis->InTemplateCtx.uErr = 0;274 pThis->InTemplateCtx.uXcpt = UINT32_MAX; 275 pThis->InTemplateCtx.uErr = UINT64_MAX; 276 276 pThis->InTemplateCtx.fTrickyStack = false; 277 277 } … … 457 457 pThis->fHasHighByteRegInMrmReg = true; 458 458 pThis->aOperands[pThis->idxMrmRegOp].fIsHighByteRegister = true; 459 Assert(!pThis->fRexW); Assert(!pThis->fRexX); Assert(!pThis->fRexB); 459 460 460 461 /* Check for collisions. */ … … 834 835 pThis->fRexB = false; 835 836 pThis->fRexX = false; 836 if (!pThis->fRex B&& !pThis->fRexW && !pThis->fRex)837 if (!pThis->fRexR && !pThis->fRexW && !pThis->fRex) 837 838 { 838 839 pThis->fNoRexPrefixMrmRm = true;
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