Changeset 54254 in vbox for trunk/include

Timestamp:

Feb 17, 2015 10:58:55 PM (10 years ago)

Author:

vboxsync

svn:sync-xref-src-repo-rev:

98321

Message:

Added ASMGetIdtrLimit.

File:

• trunk/include/iprt/asm-amd64-x86.h (modified) (5 diffs)

trunk/include/iprt/asm-amd64-x86.h

@@ -28 +28 @@
 
 #include <iprt/types.h>
+#include <iprt/assert.h>
 #if !defined(RT_ARCH_AMD64) && !defined(RT_ARCH_X86)
 # error "Not on AMD64 or x86"
@@ -83 +84 @@
  */
 
-/** @todo find a more proper place for this structure? */
+/** @todo find a more proper place for these structures? */
+
 #pragma pack(1)
 /** IDTR */
@@ -96 +98 @@
 
 #pragma pack(1)
+/** @internal */
+typedef struct RTIDTRALIGNEDINT
+{
+    /** Alignment padding.   */
+    uint8_t     au16Padding[ARCH_BITS == 64 ? 3 : 1];
+    /** The IDTR structure.  */
+    RTIDTR      Idtr;
+} RTIDTRALIGNEDINT;
+#pragma pack()
+
+/** Wrapped RTIDTR for preventing misalignment exceptions. */
+typedef union RTIDTRALIGNED
+{
+    /** Try make sure this structure has optimal alignment. */
+    uint64_t            auAlignmentHack[ARCH_BITS == 64 ? 2 : 1];
+    /** Aligned structure. */
+    RTIDTRALIGNEDINT    s;
+} RTIDTRALIGNED;
+AssertCompileSize(RTIDTRALIGNED, ARCH_BITS * 2 / 8);
+/** Pointer to a an RTIDTR alignment wrapper. */
+typedef RTIDTRALIGNED *PRIDTRALIGNED;
+
+
+#pragma pack(1)
 /** GDTR */
 typedef struct RTGDTR
@@ -106 +132 @@
 #pragma pack()
 
+#pragma pack(1)
+/** @internal */
+typedef struct RTGDTRALIGNEDINT
+{
+    /** Alignment padding.   */
+    uint8_t     au16Padding[ARCH_BITS == 64 ? 3 : 1];
+    /** The GDTR structure.  */
+    RTGDTR      Gdtr;
+} RTGDTRALIGNEDINT;
+#pragma pack()
+
+/** Wrapped RTGDTR for preventing misalignment exceptions. */
+typedef union RTGDTRALIGNED
+{
+    /** Try make sure this structure has optimal alignment. */
+    uint64_t            auAlignmentHack[ARCH_BITS == 64 ? 2 : 1];
+    /** Aligned structure. */
+    RTGDTRALIGNEDINT    s;
+} RTGDTRALIGNED;
+AssertCompileSize(RTGDTRALIGNED, ARCH_BITS * 2 / 8);
+/** Pointer to a an RTGDTR alignment wrapper. */
+typedef RTGDTRALIGNED *PRGDTRALIGNED;
+
 
 /**
@@ -130 +179 @@
     }
 # endif
+}
+#endif
+
+
+/**
+ * Gets the content of the IDTR.LIMIT CPU register.
+ * @returns IDTR limit.
+ */
+#if RT_INLINE_ASM_EXTERNAL
+DECLASM(uint16_t) ASMGetIdtrLimit(void);
+#else
+DECLINLINE(uint16_t) ASMGetIdtrLimit(void)
+{
+    RTIDTRALIGNED TmpIdtr;
+# if RT_INLINE_ASM_GNU_STYLE
+    __asm__ __volatile__("sidt %0" : "=m" (TmpIdtr.s.Idtr));
+# else
+    __asm
+    {
+        sidt    [TmpIdtr.s.Idtr]
+    }
+# endif
+    return TmpIdtr.s.Idtr.cbIdt;
 }
 #endif